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RAPTORModular Rapid Prototyping

The modular FPGA-based rapid prototyping

systems of the RAPTOR family integrate all

key components to realize circuit and system

designs with a complexity of up to 200 million

transistors. RAPTOR supports the acceleration

of computationally intensive applications

as well as partial dynamic reconfiguration.

HEINZ NIXDORF INSTITUTE

University of Paderborn

The RAPTOR FamilyModular Rapid Prototyping

Concept

2

The RAPTOR systems canbe equipped with a largevariety of extension modules

The modular FPGA-based rapid prototyping

systems of the RAPTOR family integrate all

key components to realize circuit and system

designs with a complexity of up to 200 million

transistors. RAPTOR supports the accelera-

tion of computationally intensive applications

as well as partial dynamic reconfiguration.

The RAPTOR systems follow a modular

approach, consisting of a base system and a

variety of extension modules. The base

system offers various communication and

management functionalities, used by exten-

sion modules, which realize the required

application-specific functionalities. Currently,

FPGA-, processor-, communication-, and I/O-

centric modules are available. Because of the

modular design of RAPTOR, the user can

easily integrate new FPGA technologies or

communication facilities by means of addi-

tional extension modules. The local bus and

the broadcast bus offer powerful communica-

tion infrastructures and guarantee a high

speed communication with the host system

and between individual modules. Additionally,

direct links between neighboring modules can

be used to exchange data with high bandwidth

and low latency. Furthermore, all extension

modules comprising Xilinx Virtex-4 and Virtex-

5 FPGAs provide additional high-speed serial

links for communication between the modules.

For communication with the host system all

RAPTOR base systems integrate a PCI inter-

face. Depending on the required performance,

the user can chose between PCI, PCI-X, or

PCIe. Furthermore, USB-2.0 interfaces enable

stand-alone applications.

RAPTOR2000Scalability by Means of Additional Modules

3

RAPTOR2000 offers all the required base

functionality for the prototypical realization of

microelectronic systems. Six independent

extension ports, each connected to the base

system by 456 signal lines, can be equipped

with a large variety of extension modules.

Each module is managed as an individual

subscriber of the multi-master-capable local

bus, which is used for communication

between the modules as well as for communi-

cation with the host. An additional broadcast

bus connects all modules and can be adapted

to meet user requirements. Furthermore,

direct links between neighboring modules can

be used to exchange data with a bandwidth of

more than 10 GBit/s. A PCI-bus interface

enables easy integration into the host PC for

data exchange, control, monitoring, and

(dynamic) FPGA reconfiguration.

Extension Modules

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6 extension ports

456 signal connections to the base system

32 Bit local-bus interface (1,6 GBit/s)

75 Bit broadcast-bus interface

128 direct links to neighboring

extension modules

Regulated power supply

(5V; 3,3V; 2,5V; 1,8V)

Architecture of theRAPTOR2000 base system

CFGCFGCFG

CTRL-Logic

Arbiter, MMU

Monitoring, CLK

Config.- Manager

JTAG, SelectMAP

PCI-Bus-

Bridge

Master, Slave,

DMA

Flash ROM

Dual-Port

SRAM

CTRL CTRLCTRL

Mo

du

le6

Mo

du

le4

Module 1 Module 2 Module 3PC

IB

us

(32

Bit

Da

ta/

32

Bit

Ad

dre

ss)

Local Bus (32Bit Data / 32Bit Address)

85

85

85

128 128 128 128

75

75

75

Broadcast Bus

RAPTOR2000 basesystem equipped withthree extension modules

Control Logic

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2 Xilinx XC95288 CPLDs

Local-bus arbiter (14 master)

Local-bus address decoder (16 slaves)

Programmable system clock

Software diagnosis, error management

PCI-bus Interface

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32 Bit PCI-bus interface

utilizing PLX PCI9054

Tight coupling between PCI-bus and

intra-system multi-master bus (local bus)

Communication interfaces are decoupled

using asynchronous FIFO-memories.

Master-, slave-, and DMA-transfers

2 programmable DMA-channels

64 kByte dual-port SRAM for easy

user access on the base system

Interrupt management

FPGA Configuration

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Hardware implementation of the

SelectMAP configuration protocol

(Re-)configuration bandwidth: 50 MByte/s

Configuration data can be located in the

RAPTOR system or in the host computer

Reconfiguration can be initialized by

any system component, including self-

reconfiguration of the FPGAs

Partial, dynamic, and complete

reconfiguration

Fields ofApplication

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SoC prototyping

Hardware/software co-verification

FPGA-computing

Dynamic reconfiguration

SelectMAP,

CFG-JTAG

SelectMAP,

CFG-JTAGSelectMAP,

CFG-JTAG

CTRL+Config Logic

Arbiter, MMU

Diagnostics, CLK,

Configuration, etc.

PC

I-X

-Bu

s(6

4B

itD

ata

/32

Bit

Ad

dre

ss)

PCI-Bus-

Bridge

Master, Slave,

DMA

Local Bus (32Bit Data / 32Bit Address)

Dual-Port

SRAM

85

CTRL,

SMB 85

CTRL,

SMB85

CTRL,

SMB

128

Mo

du

le6

Mo

du

le4

Module 1

128

Module 2

128

Module 3

128

75

75

75

Broadcast Bus

USB Logic

Local-Bus Master

Local-Bus Slave

OTG-Control

USB Controller

USB 2.0-High-Speed

USB-OTG

Xilinx

SystemACE CF

CF Access,

JTAG Control

TST-JTAG

CFG-JTAG

System Monitor

Voltage, Temperature,

Analog Inputs,

Clock

Management,

DistributionUSB

Compact

Flash

RaptorX64

4

RAPTOR-X64 base system

Architecture of theRAPTOR-X64base system

RAPTOR-X64, successor of RAPTOR2000,

adds additional functionalities, interfaces, and

management facilities to the base system.

Furthermore, all integrated communication

interfaces have been optimized in order to

maximize the available bandwidth between

modules and to the host computer.

RAPTOR-X64 is backward compatible to

the RAPTOR2000 base system, i.e., all

available extension modules can be reused.

Direct links between neighboring modules can

be used to exchange data with a bandwidth of

more than 20 GBit/s. For communication with

the host system either a PCI-X interface or an

integrated USB-2.0 interface can be used.

Both interfaces are directly connected to the

local bus and enable the utilization of the

system closely coupled to the host in a

PCI-X environment as well as independent

from a host system. Therefore, the system is

especially suitable for in-field evaluation and

test of embedded applications.

RAPTOR-X64 offers several diagnostic

functions: besides monitoring of the digital

system environment, e.g., voltages and

temperatures are recorded. All system

clocks can be adjusted over the whole

working range, allowing all applications to

operate at ideal speed. Configuration and

application data can be stored in the host

system or on an integrated compact flash

card.

RAPTOR-X64Rapid Prototyping of SoCs and Embedded Systems

RAPTOR-X64 New Functionalities–

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64Bit / 66MHz PCI-X interface

Integrated USB interface

(HI-Speed, OTG)

Backward compatible to its

predecessor RAPTOR2000

Extended stand-alone capabilities

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Optimized power supply

Compact flash memory card can be used

for configuration data and application data

All system clocks adjustable by the user

Comprehensive debug and monitoring

facilities

Configuration and Application of the RAPTOR Systems

Software Environment

For easy and comfortable use of the RAPTOR

systems, the software environment Raptor-

Suite has been developed. All software com-

ponents can be run under Linux and Windows

operating systems. Furthermore, the software

environment supports all RAPTOR base

systems and all extension modules.

RaptorSuite consists of three layers. The bot-

tom layer, called RaptorLib, offers a direct in-

terface to the hardware, supporting all avail-

able interfaces (USB, PCI, PCI-X, and PCIe),

so that an application can easily switch be-

tween these protocols. By using the

RaptorAPI, remote usage capabilities are

added, enabling to access the RAPTOR

systems using a client/server infrastructure

via the local network or the Internet.

The graphical user interface RaptorGUI

implements comfortable management

functionalities and allows basic tests of an

application without the need to develop a

specific software application.

5

RaptorGUIsoftware environment

RAPTOR-X64 and thesoftware environment RaptorSuite

RaptorLIB

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RaptorLIB realizes a direct interface to the

hardware. The C++ library is the basis for all

other software components. Additionally, it

can be used to integrate RAPTOR systems

into software developments of the user.

Available for Windows and Linux

operating systems

Interface abstraction (USB/PCI/PCI-X)

Supports all RAPTOR base boards

(Raptor2000/X64/XPress)

Management functionalities (FPGA config-

uration, clock management, monitoring, ...)

Library functions for various types of

data transfers

Data logger for debugging

RaptorAPI

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RaptorAPI enables the use of the functionality

of RaptorLIB via the local network or the

Internet using a client-server architecture.

Available for Windows and Linux

operating systems

Abstraction of the underlying

communication network

Client-Server-Architecture

RaptorGUI

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RaptorGUI provides an easy to use graphical

user interface for all RAPTOR systems.

The GUI can be used with locally installed

RAPTOR systems as well as remote, with

boards that are connected via Internet.

Selection of local or remote boards

Configuration of FPGA modules

(even partially and at run-time)

Parameterization of the communication

systems

Memory and module access

Clock management and IRQ/Reset

management

Ruby scripting for rapid implementation of

complex test programs

Development support

Various optimized development tools are

available for the implementation of microelec-

tronic circuits on the RAPTOR systems and

for hardware/software co-verification, respec-

tively. Furthermore, INDRA, our integrated

design-flow for dynamic reconfiguration of

Xilinx FPGAs enables partial reconfiguration

of the embedded FPGAs at run-time.

DB-VS, DB-V2Pro

FPGA-Module

Virtex-II Pro FPGA Module DB-V2Pro

The FPGA module DB-V2Pro integrates FPGAs of the second Xilinx Virtex generation with embedded PowerPC

processor cores. For efficient use and monitoring of the PowerPC processors the extension module comprises two

trace/debug interfaces. Access to the various interfaces and to the embedded memories is enables by IP cores,

which can be easily integrated into the FPGA designs if required.

6

Virtex FPGA Module DB-VS

The FPGA module DB-VS integrates Xilinx FPGAs of the first Virtex an Virtex-E generation into the RAPTOR

systems. Memory-intensive applications are supported by 128 MByte SDRAM, tightly coupled to the FPGA.

Like all other FPGA-based RAPTOR extension modules, DB-VS enables partial reconfiguration of the embedded

FPGAs at run-time. Reconfiguration is performed either by the host computer via PCI/USB or by other system

components within the RAPTOR environment.

Local Bus

128

85

CTRL DB-VS

Xilinx Virtex/-E

FPGA(BG560 Package)

SelectMAP,

JTAG75

128

Broadcast Bus

SDRAM

Controller

85

93 93

61

128 MByte

SDRAM

Local Bus

128

85

CTRL DB-V2Pro

Xilinx Virtex-II Pro

XC2VP20/30

(FF896)

CFG

75

128

Broadcast Bus

SDRAM

Controller

85

128 128

75 128 MByte

SDRAMPPC

Debug1

PPC

Debug2

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Xilinx Virtex (-E) FPGA

XCV400 up to XCV2000 applicable

Available system resources:

10.800 Logic Cells (XCV400) up to

43.200 Logic Cells (XCV2000E)

Variable core voltage (2,5V or 1,8V)

128 MByte SDRAM

Local bus interface

2 x 93 direct links to neighboring modules

75 broadcast bus signals

Stand-alone operation

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Virtex-II Pro FPGA XC2VP20/30

with embedded PowerPC processors


22.032 Logic Cells (XC2VP20)

30.816 Logic Cells (XC2VP30)

128/256 MB SDRAM

2 x 128 direct links to neighboring modules

75 broadcast bus signals

4 embedded system clocks

5x5 LED-matrix


Debug interface: 2x38-Pin Mictor connector

DB-VS, DB-V2Pro

FPGA-Modules

DB-V2, DB-V4

FPGA-Modules

7

The FPGA module DB-V2 integrates FPGAs of the second Xilinx Virtex generation. Since the largest available Xilinx

Virtex-2 FPGAs (XC2V8000) can be used, this extension module is especially suitable for large hardware designs.

Like with all other RAPTOR modules different assembly options are available, so that the user can choose between

various FPGAs of the Xilinx XC2V family. Depending on the requirements of the target application, both size and speed-

grade of the FPGA are selected. Apart from SDRAM, static memory is integrated to extend the embedded memory of the

FPGAs, enabling fast and easy data storage.

Virtex-2 FPGA Module DB-V2

Configuration,

JTAG

Local Bus

128

85

CTRL

22

DB-V2

75

Broadcast Bus

Xilinx Virtex-IIXC2V4000/6000/8000 [824/820 IOs]

+ XC2V3000 [720 IOs]

Replaceable

SDRAM-Modul

(128MB, 256MB, ...)

144Pin SODIMM Socket

85

128 128

75

SDRAM

Controller

5

8 MByte SRAM

(32bit Data Width)

CPLD 18

SRAM

Controller

XCHECKER &

JTAG

4 x external

Clock

5 x 5 LED

Matrix

Trace &

Debug

(2x38 IOs)

6 x external CLK, RESET,

LED + communication

for dynamic reconfig.

External

Power Supply

72

76

4

4

25

1215

22 9

5

76

101

128

Virtex-4 FX FPGA Module DB-V4

As an extension to the communication infrastructure of the base systems, the DB-V4 integrates serial high-speed links

into the RAPTOR environment. Via 20 RocketIO links, each capable of transceiving 6.5 GBit/s in full duplex mode,

modules can communicate even between different RAPTOR base systems. Utilizing these transceivers, four copper-

based data links with a throughput of up to 32.5 GBit/s each are realized on the DB-V4 module. Copper cables with a

length of up to 2 m can be used without bandwidth degradation. By adapting the cabling between modules, the

communication topology can be changed without affecting the communication via the RAPTOR base system. Special

attention has been directed to enable efficient partial dynamic reconfiguration of the FPGA. Therefore, even during

partial reconfiguration, the FPGA can access the embedded SDRAM and the communication interfaces.

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Xilinx Virtex-2 FPGAs

XC2V3000 up to XC2V8000


32.256 Logic Cells (XC2V3000) up to

104.832 Logic Cells (XC2V8000)

SODIMM socket for up to 4 GByte SDRAM

8 MB SRAM (32bit)

CPLD for fast partial reconfiguration

5x5 LED matrix


Completely interconnected local bus, broadcast

bus, and direct links to neighboring modules


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Xilinx Virtex-4 FX FPGAs

(XC4VFX40 up to XC4VFX100)

2 embedded PowerPC processors


41.904 Logic Cells (XC4VFX40) up to

94.896 Logic Cells (XC4VFX100)

SODIMM socket for up to 4 GByte DDR2-SDRAM


Optimized for partial dynamic reconfiguration


20 Rocket-IO Transceiver with 6,5 GBit/s each

Ex

tern

al

Co

nn

ec

tors

Local Bus

5

5

5

5

128

22

85

DB-V4

Configuration,

JTAG

CTRL /

I²C

75

Broadcast Bus

Xilinx Virtex-4 FXXC4FX40/60/100 [448/576/768 IOs]

Replaceable

DDR2-SODIMM-

Module200Pin SODIMM Socket

85

104

104

75

DDR2

SDRAM

Controller

5

JTAG

3x external

Clock

5 x 5 LED

Matrix

Trace &

Debug

(2x38 IOs)76

4

3

25

5

13

0

128

Hig

h-S

pe

ed

-

Se

ria

l-IO

Co

ntr

oll

er

22

20 Lanes(622Mbs – 10 Gbs

per Lane)

External

Power

Supply

DB-Ethernet, DB-Com

8

128

CTRL

CFGDB-Com

75

128

Broadcast Bus

80

71

10

IEEE1394

USB

LONRS232/

RS485IEEE1284

IrDA

I²C

CAN

Xilinx Spartan II

X2CS200

uni

IO

Communication Module DB-Com

The versatile communication module DB-Com provides various essential interfaces for the prototypical design of

system on chip architectures. Easy connection to other RAPTOR extension modules is established by a Xilinx

Spartan-2 FPGA for data preprocessing. The integrated interfaces comprise RS232, RS485, field bus protocols

like CAN or LON, USB, and Firewire. Additional protocols such as Interbus or Profibus can be implemented in the

embedded Spartan-2 FPGA because the required physical interfaces have been integrated into the DB-Com

module.

DB-Ethernet Rev. 2

Isolation

Port0

Port1

Port2

Port3

MII Management,

Sleep,LED

XC95144

CPLD

XC95144

CPLD

XC95144

CPLD

XC95144

CPLD

Intel

LXT 974

Quad PHY

10/100

Mbps

Port0

Port1

Port2

Port3

4 User LEDs

4x TX/RX/Link

LEDs

38

17

17

17

17

8

User interconnect

4 x RJ 45

16

16

16

16

Quad Ethernet PHY Module DB-Ethernet

The Quad Ethernet PHY module DB-Ethernet provides an easy way to integrate standard 10/100 Mbit Ethernet

interfaces into the RAPTOR environment. The four Ethernet ports are controlled by a PHY device on the extension

module, which exchanges data with neighboring modules by means of four embedded CPLDs. The MII interfaces

that are realized in the CPLDs can be adapted to the requirements of the user when necessary. If Gigabit Ethernet

is required, the expansion module DBE-Ethernet can be used.

I/O-Modules

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4 RJ45 Ethernet Ports

4 synchronous MII-interfaces, implemented as

IP-Cores in four Xilinx CPLDs (XC95144XL)

10/100 Mbps; full/half duplex

Intel Quad-Ethernet-PHY device

Galvanically isolated

4x3 LEDs indicating

link, transmission and receive

Four configurable LEDs

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IEEE1394a (Firewire)

USB 2.0 highspeed or

USB On-The-Go fullspeed

IEEE 1284 (Parallel)

4 x RS232 (serial, e.g., EIB) or

2 x RS485 (e.g., Interbus, Profibus)

CAN, LON, I²C, IrDA

2 x 18 Bit digital I/O

(e.g., for Bluetooth Modules)

80/71 direct links

to neighboring modules

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I/O-Modul DB-MC

DB-MC, DB-VGA

I/O-Module DB-MC

VGA-Module DB-VGA

The extension module DB-VGA enables the direct connection of VGA displays to the RAPTOR system.

By means of this module, a RAPTOR environment can directly visualize application-data independent of

the host computer. Thus, comfortable monitoring and debugging is feasible also for stand-alone applications

without a host computer.

The I/O module DB-MC realizes 20 analog input channels and eight analog output channels as well as four

Serial Synchronous Interfaces (SSI). The module is controlled by a Xilinx Spartan-IIE FPGA, which can also

be used to implement simple control applications. Via the broadcast bus all modules that are attached to the

RAPTOR base system can access the DB-MC. Thus, dynamically reconfigurable FPGA-based control

implementations can be realized. Furthermore, coupling several DB-MC modules facilitates the realization of

large virtual I/O subsystems.

I/O-Modules

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Physical DVI interface

Realized by means of

TI TFP410 DVI transceiver

Programmable clock generator

(programmable via I²C Bus)

Controlled by VGA IP-Core

on neighboring FPGA module

SDRAM used as video memory

16/24/32 bit color depth

Double buffering

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20 analog inputs

Input voltage: -10 V to +10 V

Sample rate: up to 200 kSps; 14 Bit

8 analog outputs

Output voltage: 0 V to +10 V

Sample rate: up to 2MSps; 16 Bit

4 Serial Synchronous Interfaces (SSI)

Xilinx Spartan-IIE FPGA for module configuration

and for the implementation of simple controllers

Connected to the base system via

64 broadcast bus links

DB-MC7

5

Broadcast Bus

64

Xilinx Spartan IIE

XC2S50E

ADC 5

TLC3578

ADC 4

TLC3578

ADC 3

TLC3578

ADC 2

TLC3578

ADC 1

TLC3578

DAC

LTC2600

OPV

LPC660

SSI

PROM

XC18V01

AO 1

AO 2

AO 8

...

SSI 1

SSI 2

SSI 3

SSI 4

AI 1/2

AI 1/3

AI 1/4

AI 2/2

AI 2/3

AI 2/4

AI 3/1

AI 3/2

AI 3/3

AI 3/4

AI 4/1

AI 4/2

AI 4/3

AI 4/4

AI 5/1

AI 5/2

AI 5/3

AI 5/4

AI 2/1

AI 1/1

DB-VGA DB-VX

Virtex-X FPGA

EEPROM PLLDVI

InterfaceSDRAM

SDRAM

Controller

VGA

Core

I2C

Core

EEPROM

Interface

LocalBus

Interface

Micro

Blaze

SideCon-

Interface

Analysis of system-internal signals is a key requirement for SoC design environments. In addition to software

solutions for the RAPTOR systems the test module DB-Eval is available. It enables monitoring of all 456

communication links between the base system and the extension module. Furthermore, the power supply can be

controlled for direct measurement of the power consumption of the evaluated module. DB-Eval is plugged between

the analyzed module and the base system and enables direct connection of logic analyzers.

DB-Eval

The trace/debug interfaces of the FPGA modules (Virtex-2 and above) provide an opportunity for small and cost-

efficient expansion modules, called DBE. Various simple modules with pin headers for logic analyzers or application-

specific extensions are available. The expansion module DBE-Ethernet integrates a Gigabit Ethernet interface, which

is directly attached to an FPGA. All components that are required for the realization of the physical interface are

embedded into the DBE-Ethernet; the MAC layer has to be implemented as a soft/hard macro in the FPGA.

Expansion Module DBE-Ethernet

DB-Eval, DBE-Ethernet and Additional Modules

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RAPTOR Modules

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Access to all 456 Module I/Os

for the analysis of

Local bus

Broadcast bus

FPGA reconfiguration

Direct links

Connection to logic analyzers

No impact on the analyzed module

Control of the power supply for specific

measurement of the power consumption

25Gigabit-Ethernet

PHY 1

8

Config

MEM

Config

EEPROM

GMII

RJ45

Gigabit-Ethernet

PHY 2

Config

MEM

Config

EEPROM

DBE-Ethernet

8 RJ45

25GMII

2

2

2

2I²C

I²C

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2 x 10/100/1000 Mbit Ethernet

(1000Base-T, Auto MDI-X)

Two independent PHY devices

Compatible to all FPGA modules

with trace/debug interface

(DB-V2Pro, DB-V2, DB-V4, DB-V5)

Integrated cable diagnostics

Implementation of the MAC layer

as a soft/hard macro in the FPGA

The number of available extension modules for the RAPTOR systems is steadily increasing. Additional I/O modules,

communication modules for PROFINET and software-defined radio, and special ASIC test modules are available.

Comprehensive libraries with elements for PCB design, IP cores for FPGA implementations, and software

components facilitate the design of new application-specific extension modules. Therefore, ASIC realizations can be

easily integrated into the RAPTOR environment, where they replace the FPGA prototypes and can be tested without

changing the hardware/software environment.

Additional RAPTOR Modules

11

RAPTOR-X64 in combination with the pro-

posed Virtex-4 modules can be used to set up

FPGA-based systems with tens of high-end

FPGAs and a high-speed communication in-

frastructure between the FPGAs. With a

growing number of FPGAs the requirements

on monitoring and debugging steadily in-

crease, requiring high-bandwidth communica-

tion between each individual FPGA and the

host computers. RAPTOR-XPress, the next

generation of RAPTOR base systems, will

facilitate FPGA-based cluster computing with

hundreds of FPGAs connected by a very flexi-

ble communication infrastructure.

The RAPTOR-XPress base system can be

equipped with up to four daughterboards and

provides extensive capabilities for system

management and communication. The host

connection is realized by eight PCI Express

2.0 channels. Using a dedicated PCI Express

switch on the base board, each daughter-

board can access the full bandwidth of

32 GBit/s to the host, allowing high-bandwidth,

low-latency data transfer between the host

CPU and each FPGA in the system. An addi-

tional PCIe to local-bus bridge enables simple

bus access to ease porting of legacy FPGA

designs and to reuse modules of the RAPTOR

family that do not offer PCIe links.

Furthermore, interfaces for USB 2.0 high-

speed and Gigabit Ethernet are available.

For communication between FPGA modules,

the RAPTOR-XPress base system offers di-

rect connections between adjacent modules.

This facilitates a ring topology between all

modules on one base system with a band-

width of 80 GBit/s and a latency of less than

10 ns. Furthermore, a central switch, imple-

mented in a dedicated FPGA on the base sys-

tem, provides the modules with an additional

bandwidth of 10 GBit/s in any topology.

For the communication between multiple

RAPTOR-XPress systems, four serial high-

speed connections are used. The technology

is basically the same as for the DB-V4, en-

abling reuse of the developed protocols and of

the switch IPs. The RAPTOR-XPress base

system realizes 24 serial high-speed (full du-

plex) lanes to each module and 84 lanes for

communication with other RAPTOR-XPress

systems. Each of these full-duplex lanes offers

a bandwidth of 11 GBit/s. The topology of

these connections can be changed at run-

time using a 192×192 crosspoint switch

(2112 GBit/s aggregate bandwidth) on the

base board.

DB-V5 is the first module that realizes these

new concepts; it integrates a Xilinx Virtex-5

FX100T and 4 GByte DDR3 memory. The

PCIe interface is realized in a dedicated

Virtex-5 FX30T on this module

so that the Virtex-5 FX100T

is completely available for

user applications.

Architecture of the RAPTOR-XPress base system

RAPTOR-XPress and DB-V5

Current Developments

Local Bus

132

85

PCIe 8x

24x11

Gbit/s

78

Broadcast/Config Bus

Xilinx Virtex-5LX50T, LX85T, LX110T, LX155T

SX50T, SX95TFX70T, FX100T

Replaceable

DDR3-SODIMM-

Module204Pin SODIMM Socket

132 132

78

DDR3

SDRAM

Controller

JTAG Managment

5 x 5 LED

Matrix

GPIO

(2x38 IOs)

25

132

Hig

h-S

pee

d-

Se

rial-

IO

Co

ntr

olle

r

Xilinx

Virtex-5

LX30T

PCIe 8x

Endpoint76

16x6.5 Gbit/s

PCIe µController

CTRL + Power SubsystemVoltage Monitoring

and Control

CTRL + Power SubsystemVoltage Monitoring

and Control

µController

JTAG

Power/CTRL I2CI2C

DB-V5

72

85

JTAG

130

JT

AGP

CIe

2.0

-Bu

s(H

osts

yste

m)

(8Lanes)

PCIe 2.0 Switch

(48 Lanes)

CT

RL-I

2C

PW

R-I

2C

132

Module 3

Module

2128

USB Controller

USB 2.0-High-Speed

USB-Host, USB-OTG

CTRL Logic

Power, I2C, USB, Ethernet, Operating System, etc.

SystemACE CF

CF Access,

JTAG Configuration

JTAG

System

Monitoring

Voltage,

Temperature

Clock

Management,

Distribution

132

Module 4

Module

1132

Bro

adcast/C

onfig

[1]

132

Module 1

Module

4128

132

Module

3132

Bro

adcast/C

onfig

[2]

Bro

adcast/C

onfig

[3]

Bro

adcast/C

onfig

[4]

Module 2

PCIe 8x [4]

PCIe 8x [3]

192x192

(24x

8x8)

Cro

ssp

oin

tS

wit

ch

21 x 11 Gbit/s

21 x 11 Gbit/s

21 x 11 Gbit/s

21 x 11 Gbit/s

Oth

er

RA

PT

OR

-XP

ress

Broadcast/Config [1]




JTA

G

JT

AG

JT

AG

PCIe 8x [1]

PCIe 8x [2]

PC

Ie8x

[1]

PC

Ie8x

[2]

PC

Ie8x

[3]

PC

Ie8x

[4]

Config+Broadcast Logic

Broadcast-Switch, Configuration, etc.

Inter

FPGA

PCIe to Local Bus

BridgePCIe 1x

Lo

calB

us

(32B

itD

ata

/32B

itA

ddre

ss)

24 x 11 Gbit/s

CT

RL-I

2C

PW

R-I

2C

CT

RL-I

2C

PW

R-I

2C

CT

RL-I

2C

PW

R-I

2C

JTAG

JTAG-

Multiplexer

CTRL-I2C

PWR-I2C

JT

AG

24 x 11 Gbit/s

24 x 11 Gbit/s 24 x 11 Gbit/s

Gigabit Ethernet

PHY

Local Bus Logic

Arbiter, MMU, Diagnostics, CLK, etc.

Inte

r

FP

GA

Flash

Memory

DDR2

SDRAM

Memory

Hotplug + Config

Crosspoint-Config

Power Subsystem

µC-Based Power Sequencing, Control,

Monitoring, System StartupGB Ethernet

USB

Compact

Flash

Architecture of theRAPTOR module DB-V5

Travelling by car

Travelling by air

Travelling by train

Contact

From the A33 take the exit Paderborn-Elsen. Turn onto

Bundesstraße (main road) B1 towards Bad

Lippspringe/Detmold. After approx. 1,5 km leave

Bundesstraße B1 at the exit Paderborn/Schloss

Neuhaus. Continue straight ahead at the traffic lights

(Heinz-Nixdorf-Ring, Dubelohstraße) onto the Heinz-

Nixdorf-Ring and turn left at the next set of lights

(Heinz-Nixdorf-Ring, Fürstenallee) onto Fürstenallee.

The Heinz Nixdorf Institute is approx. 300m along this

street on the right-hand side.

From Paderborn/Lippstadt airport take bus No.

400/460 towards Paderborn main stat ion

(Hauptbahnhof). From the main station take bus No. 11

towards Thuner Siedlung and get off at the

MuseumsForum stop (total journey time approx. 50

minutes).

From Paderborn main station (Hauptbahnhof) take bus

No. 11 towards Thuner Siedlung and get off at the

MuseumsForum stop (total journey time approx. 10

minutes)

Dr.-Ing. Mario Porrmann

Heinz Nixdorf InstituteSystem and Circuit TechnologyFuerstenallee 1133102 Paderborn

Phone: 05251 / 60 6352Fax: 05251 / 60 6351Email: [email protected]

Web: www.raptor2000.de

How to find us

Heinz Nixdorf InstituteHeinz Nixdorf Institute

How to find us

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