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Comp 212 Computer Org & ArchComp 212 Computer Org & ArchComp 212 Computer Org & ArchComp 212 Computer Org & Arch 1 Z. Li, 2008
COMP 212 Computer Organization & Architecture
COMP 212 Fall 2008
Lecture 8
MIPS Assembly Programming
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Cache & Disk System Review
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Cache System
• Cache system:
– Typically
» SRAM for cache
» DRAM for memory
– Memory / Cache Organization
» Memory into blocks
» Cache into lines
– Address mapping:
» Mem address W is mapped to cache
line location, and tags
CPU
Cache (SRAM)
size S1=500K
Memory (DRAM)
Size S2=2500K
access timet2=100ns
access timet1=10ns
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More on addressing
• For a 2-level cache/mem system
– Mem word address is W (e.g 8) bit, then we can
address 2W =256 words.
– If we group 2B word into a block, then we have
total 2W-B blocks, e.g., 4 word a block, we have
26=64 blocks.
– Cache organized into cache line, each
accommodate a mem block. If we have 2M cache
lines, then we need M bits as cache line address.
» E.g, 16 cache lines, need 4 bits.
– We have more memory blocks than cache lines,
e.g, 64>16. So cache addressing is to find ways
to map mem blocks into cache lines.
….….
2W-B=64blocks
2M=16Cache lines
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Direct Cache Mapping Example (W=8, 4 word block, 16 cache lines)
Block 0
Block 1
Block 62
Block 63
Addr: 000000xx
Addr: 000001xx
Addr: 010000xx
Addr: 111110xx
Addr: 111111xx
Cache Lines: 0~15
line: 0000line: 0001
line: 1111
00000000
0000001100000010
11111000
1111101111111010
90h76h35h12h
90h 76h 35h 12h
Block 1601000000
0100001101000010
22h10h99h45h
00
11
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Associative Mapping Example (W=8, 4 word block, 16 cache lines)
Block 0
Block 1
Block 62
Block 63
Addr: 000000xx
Addr: 000001xx
Addr: 010000xx
Addr: 111110xx
Addr: 111111xx
Cache Lines: 0~15
line: 0000line: 0001
line: 1111
00000000
0000001100000010
11111000
1111101111111010
90h76h35h12h
90h 76h 35h 12h
Block 1601000000
0100001101000010
22h10h99h45h
22h 10h 99h 45h 010000
000000
111110
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2-way Set Associative Cache Mapping Example
Block 0
Block 1
Block 62
Block 63
Addr: 000000xx
Addr: 000001xx
Addr: 010000xx
Addr: 111110xx
Addr: 111111xx
Cache Sets: 0~7
000
111
00000000
0000001100000010
11111000
1111101111111010
90h76h35h12h
Block 16
01000000
0100001101000010
22h10h99h45h
00190h 76h 35h 12h22h 10h 99h 45h
010000
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Disk I/O Performance
• Total time:
– T = Tseek + 1/ (2*rpm) + b / (rpm*N)
– Disk spin speed: rpm
– Disk data density: N bytes per track
– Tseek: how fast to locate a track,
related to disk electro-mechanical
system performance
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Numbers and Arithmetic in Computer
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Integer Conversion between Binary and Decimal Systems
2/)2...22(2/
)...(
01
12
21
1
20121
aaaaN
aaaaNn
nn
n
nn
+×++×+×=
=−
−−
−
−−
1 22
6
1 2
0 (a0)
00
13
22
1 )2...22( aaaa nn
nn +×++×+× −
−−
−Quotient
Remainder
62
3
6
0 (a1)
2
1
2
1 (a2)
3 2
0
0
1 (a3)
1
(12)10 = (a3 a2 a1 a0)2 = (1100)2,
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Fraction Conversion between Decimal and Binary Systems
)2...2.(
2)2...22.(2
)....(
1121
22
11
221
+−−
−−−
−−
−−
−−
−−−
×++×+=
××++×+×=×
=
mm
mm
m
aaa
aaaN
aaaNMultiply Method
Integer Fraction
(0.7)10 = (? )2
Procedure: 0.7 x 2 = 1.40.4 x 2 = 0.80.8 x 2 = 1.6
…..
(0.7)10 = 0.(101… )2
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Exercise 2: Decimal to Binary
(28.59)10= ( ? )2 (Calculate up to 5 bits for fraction)
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Binary Addition and Subtraction
Addition Rules: 0+0= sum-0 carry-01+0 = sum-0 carry-01+1 = sum-0 carry-1
Subtraction Rules: 0-0 = 1-1 = 0 1-0 = 1 0-1 = 1 with a borrow of 1
1 0 1 10 1 0 1
carry
+
1 0 0 0 0
1 1 1
1 0 1 10 1 0 1
borrows
-
0 1 1 0
1
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Binary Multiplications and Divisions
Multiplication:
1 0 1 1 1X 1 0 1 0
0 0 0 0 01 0 1 1 1
0 0 0 0 01 0 1 1 11 1 1 0 0 1 1 0
+
• Relatively straight forward:
– If multiplicate by 1, copy the row
– If multiplicate by 0, copy all zero
– Add them together
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Binary Divisions
• 147 / 11 ?
– Division:
– Solution: Quotient = 13= (1101)2, remainder = 4 = (100)2 .
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Signed Integers
– Sign + Magnitude : Rarely used
– 2’s Complement (n bit) : -X = [X]2 = 2n – (X)2
– Simple Two Steps: -X = [X] + 1, [] is the Boolean complement operator, flipping each bit.
1. Take the complement of each bit of N ( 0 � 1, 1 � 0 )
given: 0011,1100Flipping each bit: 1100,0011
2. Add 1. + 1The complement: 1100,0100 (sum: 1,000,0000)
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2’s complement arithmetic
• Addition very much the same as un-signed
• A-B = A+[B]2
• Overflow: iff A and B are the same sign while result not
the same sign
• Pad “1” to the negative number, and “0” to the positive
number:
– Eg. (-18)10 = 1001 0010 = 11111111 10010010
– (+18)10 = 00010010 = 00000000 00010010
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2’s complement arithmetic examples
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Floating Point Representation
• For the 32 bit example in Fig. 9.18:
– What is the sign, exponent, and significand of the following number ?
Eg.: 30.25 ?(1)Integer part: 30 = 16+8+4+2 = 11110(2) Fraction part: 0.25 = 0.01
(3) 30.25 = 11110.01, need to normalize s.t. the point is next to the msb 1.
(4)11110.01 = (1.111001)x24, ⇒ sign = 0 (positive), ⇒ exponent = 4+bias = 4+127=131 = 1000 0011⇒ Signifcand = 11100100000000000000
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Floating Point Representation
• For the 32 bit example in Fig. 9.18:
– What is the sign, exponent, and significand of the following number ?
(2)-45.125 ?Integer part: 45 = 101101Fraction part: 0.125 = 0.00145.125=101101.001, need to normalize s.t. the point is
next to the msb 1. 101101.001 = (1.01101001)x25,
⇒ sign = 1 (negative), ⇒ exponent = 5+bias = 5+127=132 = 1000 0100⇒ Signifcand = 01101001000000…000
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About Mid-term
• Coverage:
– Only covers materials in lectures 1~5
– Account for 25% of the final assessment, Quiz-1 will not be counted.
• Time & Venu:
– Oct 30th, 2008, 8:30am-10:50am
– Lecture Room N 001, the COMP 212 class room.
• Rules:
– Close book, close notes
– NO calculator
– Do it independently, no discussion
– Violation of Rules may result in zero marks for the mid-term.
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Mid-term Cover Page
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MIPS Assembly Programming
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Reference Materials
• MIPS simulator on PC:
– SPIM from Univ of Wisconsin:
http://pages.cs.wisc.edu/~larus/spim.html
– Contains a lot of useful info, check it out and download the simulator.
• MIPS Assembly Programming
– R. L. Britton
– Optional but very useful
– See to be available for download at:
» http://www.scribd.com/doc/3577342/MIPS-Assembly-Language-Programming
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Outline
• Introduction to MIPS architecture
• MIPS Assembly Language
– Arithmetic:
» add, sub, addi, addu, addiu, subu
– Data movement :
» lw, sw, lbu, sb, lui, ori
– Program Control:
» Branch, jump, stacks and procedure calls
– MIPS programming examples
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MIPS Architecture
Program Control
Arithmetic & Logic Ops
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About MIPS
• What is MIPS ?
– Microprocessor w/o Interlocked Pipeline Stages
• It is a RISC
– as compared with CISC processor like Pentium
– Very successful, 1/3 RISC chip is MIPS based.
– Used in SGI stations, CISCO routers, Motorola Set-Top Boxes,
SONY Play station, PSP, Nintendo 64….etc.
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MIPS register file
• Total 32 registers
– Each 32 bit
– In MIPS programming, named as $0~$31, or :
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MIPS Assembly Programs
• MIPS instructions and data
– Instructions are given in .text segments
» A MIPS program can have multiple .text segments
– Data are defined in .data segments using MIPS assembly directives
» .word, for example, defines the following numbers in successive memory
words
• Assembly Programs
– One instruction one line (32 bit)
– Use readable symbols instead of 32 bits 10101010 patterns
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Example: add rd, rs, rt
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addi rt, rs, imm
• I Type (Immediate) instruction:– rt = rt+rs+imm
– 5 bits to specify one of the 32 registers
– 16 bit for immediate number (signed)
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Arithmetic Instructions
• Additions:
– Add rd, rs, rt # rd=rs+rt, signed int
– Addu rd, rs, rt # rd=rs+rt, unsigned
– Addi rt, rs, imm # rt = rs + imm
– Addiu rt, rs, imm # rt = rs + imm, unsigned
• Subtraction:
– Sub rd, rs, rt # rd = rs – rt
– Subu rd, rs, rt # rd = rs - rt
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First MIPS Program
• How to compute:
– A = 19 + 20 – 24 ?
• Program:– Li reg, imm # load imm value to register
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Run it with SPIM simulator
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More complex arithmetic
• Compute: (x + 5 - y) * 35 / 3
• Use Macros: sub and mul
• MIPS program
– li $t0, x
li $t1, y
add $t0, $t0, 5 # x + 5
sub $t0, $t0, $t1 # x + 5 - y
mul $t0, $t0, 35 #(x + 5 - y)*35
div $t0, $t0, 3 #(x + 5 - y)*35/3
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Data Load and Movement
• MIPS memory– 32 bit mem address [0 232-1] mem address space– Organized in word (32 bit), has address in multiples of 4
• Load word from memory– Lw dest_reg, const(addr_start_reg) – Dest_reg : specify which register to load word to– Const: a constant number– Addr_start_reg: where data array starts– Effective address: (addr_start_reg) + const
• Example– Lw $s0, 4($s3) # load word at ($s3)+4– La $s4, grades # load array “grades” start addr to s4
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Example of Load/Save Data
• 3 students’ grades are saved in the memory, compute its
sum and store at the end of array:
• Grades = [94 90 83], store 94+90+83 at Total
• Use store register value to mem:
– Sw $s1, 12($s2) # store s1 to mem start at s2, with offset 12
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Program
• .text signal the start
of program
• .data signal the start
of data definitions
• Data labels, “grades”,
“total” has a mem addr.
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Execution in SPIM
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Address Mode
• Why this weird way of address memory ?
– To support array operation which is very typical
– A register offers base, or start of array address
– Immediate number provides the offset
– ! Notice that word address increment by 4, so element k in the array
has offset 4*k:
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Branch and Jumping
• How about the following program control:
• MIPS implementation
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Branch and Jumping
• The syntax:
– begz r1, r2, addr # if r1 >= r2, jump to addr
– beq r1, r2, addr # if r1==r2, jump to addr
– bne, r1, r2, addr # if r1 ~= r2, jump to addr
– bgtz, r1, addr # if r1>0, jump to addr
– b next # branch around jump to next
• Address labels: next, addr
– The address labels are offset relative to current PC
– Computed at the compiling time.
– Offset signed integer, so we can jump back and forwards
– Limitation: 15 bits for addr, limited jump space
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IF-THEN
• IF-THEN operation:
• MIPS Implementation:
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For Loop Operations
• For loop control:
• MIPS implementation
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While Loop Control
• While Loop:While ($a1 < $a2) do
{
$a1 = $a1 +1
$a2 = $sa - 1
}
• MIPS implementation:
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Example: String Copy
• String copy in C:
• Copy contents from mem location X to Y
• String by def are 0 terminated.
– X = [12, 3, 2, 19, 0], Y = [ 23, 4, 5, 0], then after strcpy(x, y)
– X = [23, 4, 5, 0]
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Example: String Copy
• MIPS implementation:
– Load/store byte from memory:
» lb $t0, 0($s2) # load byte to address in ($s2)
» sb $t0, 0($s3) # store byte to address in ($s3)
– Increment/Decrement register by 1, as byte address are incremented by 1
» addi $s0, $s0, 1 #s0++
» addi $s0, $s0, -1 # s0--
– System call to print a string to the console:
» li $v0, 4
» la $a0, str
» syscall
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MIPS implementation
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Subroutine Calls
• Goal:
– A segment of code for certain functions that can be called by others,
– Example: multiply, y = mult(x1, x2)
• Issues:
– How to call a subroutine ?
» How to pass parameters, e.g. x1, x2
» How to get return values ?, eg. Y ?
– How to write a subroutine ?
» Where to look for parameters ?
» Save registers, return value
» Return to the caller.
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Register usage convention
• $a0~$a4:
– registers for passing arguments
• $v0, $v1:
– return values
• $ra:
– return address register, sub routine should return to when finishing
up the operation. Use stack to implement
– Before calling the subroutine, save PC+4 to $ra,
» Use jump & link: jal mult_subroutine
– Return by calling jr $ra
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Save registers
• What if sub routines need to use registers ?
• Temp registers are ok
– $t0~$t7, no need to save their value
• Need to save before use:
– $s0~$s7
– Usually done by push to stack and pop out later before jr $ra
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An example
• Compute the sum of an array:
– int sum(*x, n)
– Psuedo code:
Sum=0;
For k=1:n
Sum=sum+x(k);
End
– parameters:
» $a0 : *x, array address, $a1: n
» Return: $v0
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MIPS implementation
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MIPS implementation
• Call it in main:
– Move parameters to $a0, $a1
– Call sum by: jal sum
– Retrieve results and print: $v0
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Run it in Simulator
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Summary-Useful MIPS instructionsMIPS assembly language
Category Instruction Example Meaning Commentsadd add $s1, $s2, $s3 $s1 = $s2 + $s3 Three operands; data in registers
Arithmetic subtract sub $s1, $s2, $s3 $s1 = $s2 - $s3 Three operands; data in registers
add immediate addi $s1, $s2, 100 $s1 = $s2 + 100 Used to add constants
load word lw $s1, 100($s2) $s1 = Memory[$s2 + 100] Word from memory to register
store word sw $s1, 100($s2) Memory[$s2 + 100] = $s1 Word from register to memory
Data transfer load byte lb $s1, 100($s2) $s1 = Memory[$s2 + 100] Byte from memory to register
store byte sb $s1, 100($s2) Memory[$s2 + 100] = $s1 Byte from register to memoryload upper immediate lui $s1, 100 $s1 = 100 * 216 Loads constant in upper 16 bits
branch on equal beq $s1, $s2, 25 if ($s1 == $s2) go to PC + 4 + 100
Equal test; PC-relative branch
Conditional
branch on not equal bne $s1, $s2, 25 if ($s1 != $s2) go to PC + 4 + 100
Not equal test; PC-relative
branch set on less than slt $s1, $s2, $s3 if ($s2 < $s3) $s1 = 1; else $s1 = 0
Compare less than; for beq, bne
set less than immediate
slti $s1, $s2, 100 if ($s2 < 100) $s1 = 1; else $s1 = 0
Compare less than constant
jump j 2500 go to 10000 Jump to target address
Uncondi- jump register jr $ra go to $ra For switch, procedure return
tional jump jump and link jal 2500 $ra = PC + 4; go to 10000 For procedure call
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MIPS Summary
• A RISC architecture
• 32 registers
• Instructions:
– Data movement
– Arithmetic
– Program Control
– Subroutine and System Calls