MICRO CONTROLLERS AND ITS APPLICATIONS

MOON INDER SINGH

Introduction

CPU

General-Purpose Micro-processor

RAM ROM I/O Port

TimerSerial COM Port

Data Bus

Address Bus

General-Purpose Microprocessor System

• CPU for Computers• No RAM, ROM, I/O on CPU chip itself• Example： Intel’s x86, Motorola’s 680x0

Many chips on mother’s board

General-purpose microprocessor

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RAM ROM

I/O Port

TimerSerial COM Port

Microcontroller

CPU

• A smaller computer• On-chip RAM, ROM, I/O ports...• Example：Motorola’s 6811, Intel’s 8051, Zilog’s Z8 and PIC 16X

A single chip

Microcontroller :

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Microprocessor • CPU is stand-alone, RAM,

ROM, I/O, timer are separate• designer can decide on the

amount of ROM, RAM and I/O ports.

• expansive• versatility • general-purpose

Microcontroller• CPU, RAM, ROM, I/O and

timer are all on a single chip• fix amount of on-chip ROM,

RAM, I/O ports• for applications in which cost,

power and space are critical• single-purpose

Microprocessor vs. Microcontroller

EMBEDDED SYSTEM

• Embedded system means the processor is embedded into that application.

• An embedded product uses a microprocessor or microcontroller to do one task only.

• In an embedded system, there is only one application software that is typically burned into ROM.(One time Programmable [OTP])

• Example： printer, keyboard, video game player

Number System-Hexadecimal System(Base 16)

To represent a binary number as itsequivalent hexadecimal number.

Start from the right and group 4 bits at a time, replacing each 4-bit binary number with its hex equivalent. Ex. 100111110101 in hex1001 1111 0101= 9 F 5 H

To convert from hex to binaryEach hex digit is replaced with its 4-bitbinary equivalentEx. To Convert hex 29B to binary2 9 B= 0010 1001 1011

Examples( Number System)

Ex1 Convert (629) to hex512 256 128 64 32 16 8 4 2 1 1 0 0 1 1 1 0 1 0 1 = 512+64+32+16+4+1 =(275)H

Ex2

FEATURES OF 8051

BLOCK DIAGRAM OF 8051

Comparison of 8051 family members.

Inside the CPU

Classification of Micro controllers on the basis of memory.8751 microcontroller: The PROM used in this processor is • UV-EPROM.• It requires a separate PROM burner and an eraser. It possesses a window on

the IC on to which the UV light is beamed.• UV-EPROM eraser takes 15-20 min to erase. Disadvantage: On line programming is not possible.

AT89C51 from Atmel Corporation : The PROM used in this processor is Flash type (erase before write)Requirement: ROM burner that supports flash. A separate eraser is not neededDisadvantage: Programme is Fully erased

DS89C4x0 from Dallas Semiconductor, (DS89C420, DS89C430 are the processors with features of 8051 and 8052) now part of Maxim Corp.

• Flash• Comes with on-chip loader, loading program to on-chip flash via PC COM port

DS5000 from Dallas Semiconductor

• NV-RAM (changed one byte at a time),• Also comes with on-chip loader

Versions of 8051 From Atmel (All ROM Flash)

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Introduction to Registers and corresponding instructions

• The microcontroller consists of number of registers which can be accessed directly or indirectly.

• By direct addressing we mean the Register/ RAM location is being accessed with its address in the instruction and indirect addressing we mean the Register/RAM location is being accessed by using an index register that carries the address of the particular location.

• Most of the registers used in 8051 are 8 bit registers except some special function registers like Data Pointer and Program Counter.

• Registers are used to store information temporarily, while the information could be a byte of data to be processed, or an address pointing to the data to be fetched from some memory location.

• The data values can be moved in these user accessible registers and some special I/O registers using a MOV instruction.

• The most common registers used in programming are

By default register bank 0 is selected. SEE PSW for details.

• An Assembly language instruction format consists of four fields:label: Mnemonic operands [;comment]

• MOV destination, source ;copy source to dest.• The instruction tells the CPU to COPY the source operand to the

destination operand.• Ex. MOV A,#25H when executed will copy the operand 25H into

accumulator.• Similarly MOV R0, #25H • MOV R1,A ;copy contents of A into R1 (now A=R0=R1=55H)• MOV R2,A ;copy contents of A into R2 (now A=R0=R1=R2=55H)• MOV R4,#95H ;load value 95H into R4 ;(now R4=95H)• MOV A,R4 and so on• NOTE: If source is not preceded with #, it means that value is immediate

value else if it is not preceded by #, means to load from a memory location.

• The maximum value(unsigned) that can be loaded into an eight bit register is 0FFH.

( WHY??)• MOV R0,#0FFH is a correct format• MOV R0,#FFH is a wrong format. 0 indicates

FFh is a hexadecimal value and not an alphabet.

• MOV A, #7F2H ; ILLEGAL: 7F2H>8 bits (FFH)

ADD Instruction• ADD A, source ;ADD the source operand to the

accumulator• The ADD instruction tells the CPU to add the source

byte to register A and store the result in register A• Here the source operand can be either a register, an

immediate data, or the address of a register containing the data to be added to an accumulator but the destination has to be register A always.

• “ADD R4, A” and “ADD R2, #12H” are invalid since A must be the destination of any arithmetic operation

Directives/pseudocodes

• Some instructions do not generate codes on assembling. They are called directives. Some of the most common directives used are:-

• DB (Define byte): It is used to define the type of 8-bit data. The data may be in decimal, binary, hex, or in ASCII format.

• Ex: ORG 000H DATA1: DB 28 ;DECIMAL (1C in Hex) DATA2: DB 00110101B ;BINARY (35 in Hex) DATA3: DB 39H ;HEX DATA4: DB '2591' ;ASCII NUMBERS DATA6: DB 'My name is Joe';ASCII CHARACTERS end

• ORG (origin) :The ORG directive indicates the beginning of the addressThe number that comes after ORG is an address pointed by the Program counter( at which the code of the first instruction is stored.)

• The program counter(16 bits wide) points to the address of the next instruction to be executed. As the CPU fetches the opcode from the program ROM, the program counter is increasing to point to the next instruction. Since the program counter is 16 bits wide this means that it can access program addresses 0000 to FFFFH, a total of 64K bytes of code.

At what address does a microcontroller wake up when powered up( Reset)

• All 8051 members start at memory address 0000 when they are powered up. The first opcode is burned into ROM address 0000H, since this is where the 8051 looks for the first instruction when it is booted. This is achieved by using the ORG statement in the source program.

Working of a Program counter• 0000 ORG 0000H ;start (origin) at 0• 0000 7D25 MOV R5,#25H ;load 25H into R5• 0002 7F34 MOV R7,#34H ;load 34H into R7• 0004 7400 MOV A,#0 ;load 0 into A• 0006 2D ADD A,R5 ;add contents of R5 to A• 0007 2F ADD A,R7 ;add contents of R7 to A• 0008 2412 ADD A,#12H ;add to A value

12H• 000A 80EF HERE: SJMP HERE ;stay in thisloop• 000C END ;end of asm source file

• END: This indicates to the assembler the end of the source (asm) file. It is a last instruction of the program. It directs the assembler to ignore anything after the END instruction.

• EQU (equate):- This is used to define a constant without occupying a memory location. The EQU directive does not set aside storage for a data item but associates a constant value with a data label

• When the label appears in the program, its constant value will be substituted for the label

Ex.

• COUNT EQU 36H• MOV R3, #COUNT• Address range of different processors

Program Status Word• Only 6 bits are used. These four are CY (carry),

AC (auxiliary carry), P (parity), and OV (overflow) are called conditional flags, meaning that they indicate some conditions that resulted after an instruction was executed

• The PSW3 and PSW4 are designed as RS0 and• RS1, and are used to change the bank. The

two unused bits are user-definable

Program Status Word• The program status word (PSW) register, also

referred to as the flag register, is an 8 bit register

CY=1 if Carry out from the d7 bit of ACC

AC=1 if carry from D3 to D4 of ACC

EXAMPLE

• Show the status of the CY, AC , OVand P flag after the addition of 9CH and 64H in the following instructions.MOV A, #9CHADD A, #64H ;after the addition A=00H, CY=1

• Solution:9C 10011100

+ 64 01100100 100 00000000

• CY = 1 since there is a carry beyond the D7 bit• AC = 1 since there is a carry from the D3 to the

D4 bit• P = 0 since the accumulator has an even

number of 1s (it has zero 1s)• OV=1 since there is a carry from the D6 to the

D7 bit

RAM MEMORY AND STACK• There are 128 bytes of RAM AVAILABLE in the 8051 which is assigned addresses from 00 to 7FH• The 128 bytes are divided into three different

groups as follows:1) A total of 32 bytes from locations 00 to 1F hex are set aside for four register banks and the stack.2) A total of 16 bytes from locations 20H to 2FH are set aside for bit-addressable read/write memory3) A total of 80 bytes from locations 30H to 7FH are used for read and write storage, called scratch pad

1) In 32 bytes divided into 4 banks of registers, each bankhas 8 registers, R0-R7

• RAM location from 0H to 7H are set aside for bank 0 of R0-R7 where R0 is RAM location 0H, R1 is RAM location 1H, R2 is RAM location 2H, and so on, until memory.location 7H which belongs to R7 of bank 0

• It is much easier to refer to these RAM locations with names such as R0, R1, and so on, than by their memory locations.

Register bank 0 is the default when8051 is powered up

• Bits D4 and D3 of the PSW are used to select the desired register bank

• Use the bit-addressable instructions SETBand CLR to access PSW.4 and PSW.3example: BY USINGSETB PSW.3CLR PSW.4Register bank 1can be selected. Now MOV R0,#20H will copy 25h into RAM location 08 H

Stack• The stack is a section of RAM used by the CPU to store

information(main function is to store address of the next instruction while executing subroutines) temporarily.

• The register used to access the stack area is called the SP (stack pointer) register.

• The stack pointer in the 8051 is only 8 bit wide, which means that it can take value of 00 to FFH

• When the 8051 is powered up, the SP register contains value 07H

• RAM location 08 is the first location used for the stack by the 8051.

• The storing of a CPU register in the stack is called a PUSH

• SP points to the last used location in the stack• As we push data onto the stack, the SP is

incremented by one.• Loading the contents of the stack back into a

CPU register is called a POP.• With every pop, the top byte of the stack is

copied to the register specified by the instruction and the stack pointer isdecremented by one.

• Show the stack and stack pointer from the following. Assume the default stack area.MOV R6, #25HMOV R1, #12HMOV R4, #0F3HPUSH 6; direct address(Push r6 is a wrong format)PUSH 1PUSH 4POP 4END

RESULT??

LOOP & JUMP INSTRUCTIONS• Repeating a sequence(OR a single) of instruction(s) a

certain number of times is called a loop.Loop action is performed by

• DJNZ reg, Label (conditional jump instruction)• The register is decremented and If it is not

zero(comparison), it jumps to the target address referred to by the label. After the counter register is zero, it falls through the loop and executes the next instruction immediately below it.

• Prior to the start of loop the register is loaded with the counter(reg. ex Mov r0,#30) for the number of repetitions

• Counter can be R0 – R7 or RAM location

Ex.

• WAP to add the contents of acc with ro 5 times.Sol

ORG 000HMOV A,#20MOV R0,#20MOV R1,#5

BACK: ADD A,RO DJNZ R1,BACKMOV 4FH,AEND

# The maximum number of times a loop can be repeated by using one counter is 255 because??

WAP to find the sum of numbers 1 to5 using a loop instruction.

• Sol 1+2+3+4+5

NESTED LOOP• A LOOP inside a loop is called nested loop

ADDRESSING MODES• The various ways of accessing the data are

called addressing modes. In 8051 the CPU can access data in 5 ways,

• Immediate• Register• Direct• Register indirect• Indexed

Immediate addressing mode• In this mode the source operand is a constant

and is in the instruction itself• The immediate data must be preceded by

the pound sign, “#”• Can load information into any registers,

including 16-bit DPTR register

ex• MOV A,#25H ;load 25H into A• MOV R4,#62 ;load 62 into R4• MOV B,#40H ;load 40H into B• MOV DPTR,#4521H ;DPTR=4512H• MOV DPL,#21H ;This is the same• MOV DPH,#45H ;as above• MOV DPTR,#68975 ;illegal!! Value > 65535

(FFFFH)

Register addressing mode

• Use registers to hold the data to be manipulated

• The source and destination registersmust match in size. MOV DPTR,A will give an error

• The movement of data between Rn registers is not allowed

• MOV A,R0 ;copy contents of R0 into A• MOV R2,A ;copy contents of A into R2• ADD A,R5 ;add contents of R5 to A• ADD A,R7 ;add contents of R7 to A• MOV R6,A ;save accumulator in R6

• MOV DPTR,#25F5H• MOV R7,DPL• MOV R6,DPH

Direct Addressing Mode• It is most often used to access RAM locations 30 – 7FH• The entire 128 bytes of RAM can be accessed• Contrast this with immediate addressing mode

There is no “#” sign in the operand.Ex.

• MOV R0,40H ;save content of 40H in R0• MOV 56H,A ;save content of A in 56H• MOV A,4 ;is same as• MOV A,R4 ;which means copy R4 into A

Register

Indirect Addressing Mode• A register is used as a pointer to the data• Only register R0 and R1 are used for this

purpose• R2 – R7 cannot be used to hold the address of

an operand located in RAM• When R0 and R1 hold the addresses of RAM

locations, they must be preceded by the “@” sign

Indexed addressing mode• Indexed addressing mode is widely used in

accessing data elements of look-up table entries located in the program ROM.

• The instruction used for this purpose isMOVC A,@A+DPTR “C” means code

• The contents of A are added to the 16-bit register DPTR to form the 16-bit address of the needed data i.e A+DPTR points to the address where the code is stored

• Another way is to use MOVC A,@A+PC

• The DPTR can be initialised( address can be read into it) by using instructions

• MOV DPTR,#100h • or MOV DPTR,#label

Write a program to store the word THAPAR in ROM memory address starting from 90h and copy the code in RAM starting from 3FH

Special Function Registers

• The Special Function Register or SFR can be accessed by their names or by their addresses

• The SFR registers have addresses between 80H and FFH

• Not all the address space of 80 to FF is used by SFRs. The unused locations 80H to FFH are reserved and must not be used by the 8051 programmer.(NOTE: See the specification sheets of aduc812)

BIT ADDRESSABLE RAM, SFRs,I/O PORTS

• One unique and powerful feature of the 8051 is single-bit operation

• Single-bit instructions allow the programmer to set, clear, move, and complement individual bits of a port, memory, or register

• It is registers, RAM, and I/O ports that need to be bit-addressable

• ROM, holding program code for execution, is not bit-addressable

• The bit-addressable RAM locationS are 20H to 2FH• These 16 bytes provide 128 bits of RAM bit-

addressability, since 16 × 8 = 128 ie 0 to 127 (in decimal) or 00 to 7FH

• The first byte of internal RAM location 20H has bit address 0 to 7H

• The last byte of 2FH has bit address 78H to 7FH• Internal RAM locations 20-2FH are both byte-

addressable and bit addressable• Bit address 00-7FH belong to RAM byte addresses

20-2FH

The first byte of internal RAM location 20H has bit address 0 to 7H

The last byte of 2FH has bit address 78H to 7FH

• Bit address 80-F7H belong to SFR P0, P1