mic24053 - 12v, 9a high-efficiency buck regulator with hyper … · 2016. 11. 7. · en logic level...

2015 Microchip Technology Inc. DS20005668A-page 1

MIC24053

Features• Hyper Speed Control® Architecture Enables:

- High Delta V Operation (VIN = 19V and VOUT = 0.8V)

- Small Output Capacitance• 4.5V to 19V Voltage Input• 9A Output Current Capability, Up to 95%

Efficiency• Adjustable Output from 0.8V to 5.5V• ±1% Feedback Accuracy• Any Capacitor Stable-Zero-to-High ESR• 600 kHz Switching Frequency• No External Compensation• Power Good (PG) Output• Foldback Current-Limit and “Hiccup Mode”

Short-Circuit Protection• Supports Safe Startup into a Pre-Biased Load• –40°C to +125°C Junction Temperature Range• Available in 28-pin 5 mm x 6 mm QFN Package

Applications• Servers, Workstations• Routers, Switches, and Telecom Equipment• Base Stations

General DescriptionThe MIC24053 is a constant-frequency, synchronousbuck regulator featuring a unique adaptive on-timecontrol architecture. The MIC24053 operates over aninput supply range of 4.5V to 19V and provides aregulated output of up to 9A of output current. Theoutput voltage is adjustable down to 0.8V with aguaranteed accuracy of ±1%, and the device operatesat a switching frequency of 600 kHz.

The Hyper Speed Control® architecture allows forultra-fast transient response while reducing the outputcapacitance and also makes (High VIN)/(Low VOUT)operation possible. This adaptive tON ripple controlarchitecture combines the advantages offixed-frequency operation and fast transient responsein a single device.

The MIC24053 offers a full suite of features to ensureprotection of the IC during fault conditions. Theseinclude undervoltage lockout to ensure properoperation under power-sag conditions, internalsoft-start to reduce inrush current, foldback currentlimit, “hiccup mode” short-circuit protection, andthermal shutdown. An open-drain Power Good (PG)pin is provided. pin is provided.

Typical Application CircuitMIC240535x6 QFN

VDDPVDD

SW

FB

2.49k

2.00k

PG0.1μF

19.6k

2.2μF

VOUT1.8V/9A

2.2μHSGND

100μFx2

MIC24053

PG

4.7nF

0.1μFBST

4.7μFx2 PGND

PVINVIN

4.5V to 19V

ENEN

10k

CSVIN

10k

12V, 9A High-Efficiency Buck Regulator with Hyper Speed Control

MIC24053

DS20005668A-page 2 2015 Microchip Technology Inc.

Package Type

Functional Block Diagram

MIC240535x6 QFNTop View

PV

INSW

SW

SWSW

PV

IN

1

23

4

5

678

9 10 11 12 13 14

1516

24 23

2221

20

19

1817

28 27 26 25

CSPGNDBST

PVINPVINPVINPVINPVIN

PVDDPGND

NC

SWPGNDPGNDPGNDPGND

FBPG

EN

VINVD

D

SG

ND

PGND

SW PVIN

R12.49k

R22.00k

0.1μF

19.6k

2.2μF

2.2μH

100μFx24.7nF

0.1μFCBST

BST

SW

FB

VDD

EN

PGND

VIN

PVIN VIN4.5V to 19V

4.7μFx2

gm EACOMP

CSCL AND ZCDETECTION

CONTROLLOGICTIMER

SOFT-START

FIXED TONESTIMATE

UVLO

LDO

THERMALSHUTDOWN

SOFTSTART PVDD

VREF0.8V

COMPENSATION

SGND

MODIFIEDTOFF

PG

10k

VDD

VDD

8%

92%

10k

VIN

HSD

LSDINTERNAL

RIPPLE INJECTION

VOUT1.8V/9A

PVDD

MIC24053


MIC240531.0 ELECTRICAL CHARACTERISTICS

Absolute Maximum Ratings †PVIN to PGND ............................................................................................................................................ –0.3V to +29VVIN to PGND ...............................................................................................................................................–0.3V to PVINPVDD, VDD to PGND .................................................................................................................................... –0.3V to +6VVSW, VCS to PGND......................................................................................................................... –0.3V to (PVIN +0.3V)VBST to VSW ................................................................................................................................................... –0.3V to 6V VBST to PGND.............................................................................................................................................. –0.3V to 35VVFB, VPG to PGND ......................................................................................................................... –0.3V to (VDD + 0.3V)VEN to PGND ................................................................................................................................... –0.3V to (VIN +0.3V)PGND to SGND ........................................................................................................................................ –0.3V to +0.3VESD Rating (Note 1). ................................................................................................................................. ESD Sensitive

Operating Ratings ††Supply Voltage (PVIN, VIN)............................................................................................................................. 4.5V to 19VPVDD, VDD Supply Voltage (PVDD, VDD)....................................................................................................... 4.5V to 5.5VEnable Input (VEN) ............................................................................................................................................. 0V to VINMaximum Power Dissipation.................................................................................................................................. Note 2† Notice: Exceeding the absolute maximum rating can damage the device.†† Notice: The device is not guaranteed to function outside its operating range.

Note 1: Devices are ESD sensitive. Handling precautions are recommended. Human body model, 1.5 kΩ in serieswith 100 pF.

2: PD(MAX) = (TJ(MAX) – TA)/ΘJA, where ΘJA depends on the printed circuit layout. A 5 in2, 4-layer, 0.62”, FR-4PCB with 2 oz finish copper weight per layer is used for the ΘJA.

ELECTRICAL CHARACTERISTICS Electrical Characteristics: Unless otherwise indicated, PVIN = VIN = VEN = 12V, VBST – VSW = 5V; TA = 25°C. Bold values indicate –40°C ≤ TJ ≤ +125°C

Parameters Sym. Min. Typ. Max. Units Conditions

Power Supply Input

Input Voltage Range (VIN, PVIN) 4.5 — 19 V —

Quiescent Supply Current — 730 1500 μA VFB = 1.5V (non-switching)

Shutdown Supply Current — 5 10 μA VEN = 0V

VDD Supply Voltage

VDD Output Voltage 4.8 5 5.4 V VIN = 7V to 19V, IDD = 40 mA

VDD UVLO Threshold 3.7 4.2 4.5 V VDD Rising

VDD UVLO Hysteresis — 400 — mV —

Dropout Voltage (VIN – VDD) — 380 600 mV IDD = 25 mA

DC - DC Controller

Output-Voltage Adjust Range (VOUT) 0.8 — 5.5 V —

Note 1: Specification for packaged product only.2: Measured in test mode.3: The maximum duty-cycle is limited by the fixed mandatory off-time (tOFF) of typically 300 ns.

MIC24053


Reference

Feedback Reference Voltage0.792 0.8 0.808

V0°C TJ 85°C (±1.0%)

0.788 0.8 0.812 40°C TJ 125°C (±1.5%)

Load Regulation — 0.25 — % IOUT = 0A to 9A (Continuous Mode)

Line Regulation — 0.25 — % VIN = 4.5V to 19V

FB Bias Current — 50 — nA VFB = 0.8V

Enable Control

EN Logic Level High 1.8 — — V —

EN Logic Level Low — — 0.6 V —

EN Bias Current — 6 30 μA VEN = 12V

Oscillator

Switching Frequency (Note 2) 450 600 750 kHz VOUT = 2.5V

Maximum Duty Cycle (Note 3) — 82 — % VFB = 0V

Minimum Duty Cycle — 0 — % VFB = 1.0V

Minimum Off-Time — 300 — ns —

Soft-Start

Soft-Start Time — 3 — ms —

Short-Circuit Protection

Peak Inductor Current-Limit Threshold

12.5 14 20 A VFB = 0.8V, TJ = 25°C

11.25 14 20 A VFB = 0.8V, TJ = 125°C

Short-Circuit Current — 8 — A VFB = 0V

Internal FETs

Top-MOSFET RDS(ON) — 27 — mΩ ISW = 3A

Bottom-MOSFET RDS(ON) — 10.5 — mΩ ISW = 3A

SW Leakage Current — — 60 μA VEN = 0V

VIN Leakage Current — — 25 μA VEN = 0V

Power Good (PG)

PG Threshold Voltage 85 92 95 %VOUT Sweep VFB from Low to High

PG Hysteresis — 5.5 — %VOUT Sweep VFB from High to Low

PG Delay Time — 100 — μs Sweep VFB from Low to High

PG Low Voltage — 70 200 mV Sweep VFB 0.9 VNOM, IPG = 1 mA

ELECTRICAL CHARACTERISTICS (CONTINUED)Electrical Characteristics: Unless otherwise indicated, PVIN = VIN = VEN = 12V, VBST – VSW = 5V; TA = 25°C. Bold values indicate –40°C ≤ TJ ≤ +125°C




MIC24053

Thermal Protection

Overtemperature Shutdown — 160 — °C TJ Rising

Overtemperature Shutdown Hysteresis

— 15 — °C —

ELECTRICAL CHARACTERISTICS (CONTINUED)Electrical Characteristics: Unless otherwise indicated, PVIN = VIN = VEN = 12V, VBST – VSW = 5V; TA = 25°C. Bold values indicate –40°C ≤ TJ ≤ +125°C



MIC24053


TEMPERATURE SPECIFICATIONSParameters Sym. Min. Typ. Max. Units Conditions

Temperature RangesJunction Temperature Range — — — +150 °C —Junction Operating Temperature TJ –40 — +125 °C —Storage Temperature Range TS –65 — +150 °C —Lead Temperature — — 260 — °C Soldering, 10sPackage Thermal Resistances (Note 1)Thermal Resistance, 5 x 6 QFN-28Ld JA — 28 — °C/W —Note 1: PD(MAX) = (TJ(MAX) – TA)/ΘJA, where ΘJA depends on the printed circuit layout. A 5in2, 4-layer, 0.62”, FR-4

PCB with 2 oz finish copper weight per layer is used for the ΘJA.


MIC240532.0 TYPICAL PERFORMANCE CURVES

FIGURE 2-1: VIN Operating Supply Current vs. Input Voltage.

FIGURE 2-2: VIN Shutdown Current vs. Input Voltage.

FIGURE 2-3: VDD Output Voltage vs. Input Voltage.

FIGURE 2-4: Feedback Voltage vs. Input Voltage.

FIGURE 2-5: Total Regulation vs. Input Voltage.

FIGURE 2-6: Output Current Limit vs. Input Voltage.

Note: The graphs and tables provided following this note are a statistical summary based on a limited number ofsamples and are provided for informational purposes only. The performance characteristics listed hereinare not tested or guaranteed. In some graphs or tables, the data presented may be outside the specifiedoperating range (e.g., outside specified power supply range) and therefore outside the warranted range.

0

5

10

15

20

25

4 7 10 13 16 19

SUPP

LY C

UR

REN

T (m

A)

INPUT VOLTAGE (V)

VOUT = 1.8VIOUT = 0ASWITCHING

0

15

30

45

60

4 7 10 13 16 19INPUT VOLTAGE (V)

VEN = 0VREN = OPEN

SHU

TDO

WN

CU

RR

ENT

(µA

)

0

2

4

6

8

10

4 7 10 13 16 19

VDD

VO

LTA

GE

(V)

INPUT VOLTAGE (V)

VFB = 0.8VIDD = 10mA

0.792

0.796

0.800

0.804

0.808

4 7 10 13 16 19

FEED

BA

CK

VO

LTA

GE

(V)

INPUT VOLTAGE (V)

VOUT = 1.8VIOUT = 0A

-0.2%

-0.1%

0.0%

0.1%

0.2%

4 7 10 13 16 19

INPUT VOLTAGE (V)

VOUT = 1.8VI OUT = 0A to 9A

0

5

10

15

20

4 7 10 13 16 19

CU

RR

ENT

LIM

IT (A

)

INPUT VOLTAGE (V)

VOUT = 1.8V

MIC24053


FIGURE 2-7: Switch Frequency vs. Input Voltage.

FIGURE 2-8: Enable Input Current vs. Input Voltage.

FIGURE 2-9: PG/VREF Ratio vs. Input Voltage.

.

FIGURE 2-10: VIN Operating Supply Current vs. Temperature.

FIGURE 2-11: VIN Shutdown Current vs. Temperature.

FIGURE 2-12: VDD UVLO Threshold vs. Temperature.

350

400

450

500

550

600

650

700

4 7 10 13 16 19

FREQ

UEN

CY

(kH

z)

INPUT VOLTAGE (V)

VOUT = 1.8VIOUT = 0A

0

4

8

12

16

4 7 10 13 16 19

EN IN

PUT

CU

RR

ENT

(µA

)

INPUT VOLTAGE (V)

VEN = VIN

80%

85%

90%

95%

100%

4 7 10 13 16 19

V PG

THR

ESH

OLD

/VR

EF (%

)

INPUT VOLTAGE (V)

VFB = 0.8V

0.0

5.0

10.0

15.0

20.0

25.0

30.0

-50 -25 0 25 50 75 100 125

SUPP

LY C

UR

REN

T (m

A)

TEMPERATURE (°C)

VIN = 12VVOUT = 1.8VIOUT = 0ASWITCHING

0

2

4

6

8

10

12

14

-50 -25 0 25 50 75 100 125

SHU

TDO

WN

CU

RR

ENT

(uA

)

TEMPERATURE (°C)

VIN = 12VIOUT = 0AVEN = 0V

0

1

2

3

4

5

-50 -25 0 25 50 75 100 125

VDD

THR

ESH

OLD

(V)

TEMPERATURE (°C)

Rising

Falling

Hyst


MIC24053

FIGURE 2-13: Feedback Voltage vs. Temperature.

FIGURE 2-14: Load Regulation vs. Temperature.

FIGURE 2-15: Line Regulation vs. Temperature.

FIGURE 2-16: Switching Frequency vs. Temperature.

FIGURE 2-17: VDD vs. Temperature.

FIGURE 2-18: Output Current Limit vs. Temperature.

0.788

0.792

0.796

0.800

0.804

0.808

-50 -25 0 25 50 75 100 125

FEEB

AC

K V

OLT

AG

E (V

)

TEMPERATURE (°C)

VIN = 12VVOUT = 1.8VIOUT = 0A

-1.0%

-0.5%

0.0%

0.5%

1.0%

-50 -25 0 25 50 75 100 125

LOA

D R

EGU

LATI

ON

(%)

TEMPERATURE (°C)

VIN = 12VVOUT = 1.8VIOUT =0A to 9A

-0.6%

-0.5%

-0.4%

-0.3%

-0.2%

-0.1%

0.0%

0.1%

0.2%

0.3%

-50 -25 0 25 50 75 100 125

LIN

E R

EGU

LATI

ON

(%)

TEMPERATURE (°C)

VIN = 4.5V to 19VVOUT = 1.8VIOUT = 0A

350

400

450

500

550

600

650

700

-50 -25 0 25 50 75 100 125

FREQ

UEN

CY

(kH

z)

TEMPERATURE (°C)


2

3

4

5

6

-50 -25 0 25 50 75 100 125

VDD

(V)

TEMPERATURE (°C)


0

5

10

15

20

-50 -25 0 25 50 75 100 125

CU

RR

ENT

LIM

IT (A

)

TEMPERATURE (°C)

VIN = 12VVOUT = 1.8V

MIC24053


FIGURE 2-19: Switching Frequency vs. Output Voltage.

FIGURE 2-20: Feedback Voltage vs. Output Current.

FIGURE 2-21: Output Voltage vs. Output Current.

FIGURE 2-22: Line Regulation vs. Output Current.

FIGURE 2-23: Switching Frequency vs. Output Current.

FIGURE 2-24: Output Voltage (VIN = 5V) vs. Output Current.

250

300

350

400

450

500

550

600

650

700

750

0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5

FREQ

UEN

CY

(kH

z)

OUTPUT VOLTAGE (V)

VIN = 12VIOUT = 0A

0.792

0.796

0.800

0.804

0.808

0 1.5 3 4.5 6 7.5 9

FEED

BA

CK

VO

LTA

GE

(V)

OUTPUT CURRENT (A)


1.782

1.787

1.791

1.796

1.800

1.805

1.810

1.814

1.819

0 1.5 3 4.5 6 7.5 9

OU

TPU

T VO

LTA

GE

(V)

OUTPUT CURRENT (A)


-1.0%

-0.5%

0.0%

0.5%

1.0%

0 1.5 3 4.5 6 7.5 9

LIN

E R

EGU

LATI

ON

(%)

OUTPUT CURRENT (A)

VIN = 4.5V to 19VVOUT = 1.8V

500

550

600

650

700

0 2 4 6 8 10

FREQ

UEN

CY

(kH

z)

OUTPUT CURRENT (A)


3.0

3.4

3.8

4.2

4.6

5.0

0 2 4 6 8 10 12

OU

TPU

T VO

LTA

GE

(V)

OUTPUT CURRENT (A)

VIN = 5VVFB < 0.8V

TA25ºC

125ºC85ºC


MIC24053

FIGURE 2-25: Efficiency (VIN = 5V) vs. Output Current.

FIGURE 2-26: IC Power Dissipation (VIN = 5V) vs. Output Current.

FIGURE 2-27: Die Temperature (VIN = 5V) vs. Output Current (Note 1).

FIGURE 2-28: Efficiency (VIN = 12V) vs. Output Current.

FIGURE 2-29: IC Power Dissipation (VIN = 12V) vs. Output Current.

FIGURE 2-30: Thermal Derating vs. Ambient Temperature (Note 1).

Note 1: Die Temperature: The temperature measurement was taken at the hottest point on the MIC24053 casemounted on a 5in2, 4 layer, 0.62”, FR-4 PCB with 2oz finish copper weight per layer; see the Thermal Mea-surements section. Actual results depend on the size of the PCB, ambient temperature, and proximity toother heat-emitting components.

50

55

60

65

70

75

80

85

90

95

100

0 3 6 9 12

EFFI

CIEN

CY (%

)

OUTPUT CURRENT (A)

VIN = 5V

3.3V2.5V1.8V1.5V1.2V1.0V0.9V0.8V

VIN = 5V

0.0

0.5

1.0

1.5

2.0

2.5

3.0

3.5

4.0

0 1.5 3 4.5 6 7.5 9

POW

ER D

ISSI

PATI

ON (W

)

OUTPUT CURRENT (A)

VIN = 5V

VOUT = 3.3V

VOUT = 0.8V

0

20

40

60

80

100

0 1.5 3 4.5 6 7.5 9

DIE

TEM

PER

ATU

RE

(°C)

OUTPUT CURRENT (A)

VIN = 5VVOUT = 1.8V

50

55

60

65

70

75

80

85

90

95

100

0 2 4 6 8 10 12

EFFI

CIEN

CY (%

)

OUTPUT CURRENT (A)

5.0V3.3V2.5V1.8V1.5V1.2V1.0V0.9V0.8V

VIN = 12V

0.0

0.5

1.0

1.5

2.0

2.5

3.0

3.5

4.0

0 1.5 3 4.5 6 7.5 9

OUTPUT CURRENT (A)

POW

ER D

ISSI

PATI

ON (W

) VIN = 12V

VOUT = 5V

VOUT = 0.8V

0

2

4

6

8

10

12

14

-50 -25 0 25 50 75 100 125

AMBIENT TEMPERATURE (°C)

OU

TPU

T C

UR

REN

T (A

)

1.5V

0.8V

VIN = 5VVOUT = 0.8, 1.2, 1.5V

MIC24053





FIGURE 2-34: VIN Soft Turn-On.

FIGURE 2-35: VIN Soft Turn-Off.

FIGURE 2-36: Enable Turn-On Delay and Rise Time.

0

2

4

6

8

10

12

14

-50 -25 0 25 50 75 100 125


OU

TPU

T C

UR

REN

T (A

)

3.3V

1.8V

VIN = 5VVOUT = 1.8, 2.5, 3.3V

0

2

4

6

8

10

12

14

-50 -25 0 25 50 75 100 125


OU

TPU

T C

UR

REN

T (A

)

VIN = 12V VOUT = 0.8, 1.2, 1.8V

1.8V

0.8V

0

2

4

6

8

10

12

14

-50 -25 0 25 50 75 100 125


OU

TPU

T C

UR

REN

T (A

)

VOUT = 2.5, 3.3, 5VVIN = 12V

5V

2.5V


Time (2ms/div)

VSW(10V/div)

VIN(10V/div)

VOUT(2V/div)

IL(10A/div)


Time (1ms/div)

VSW(10V/div)

VIN(10V/div)

VOUT(2V/div)

IL(10A/div)


Time (1ms/div)

VEN(2V/div)

VOUT(1V/div)

IL(10A/div)


MIC24053

FIGURE 2-37: Enable Turn-Off Delay and Fall Time.

FIGURE 2-38: VIN Start-Up with Pre-Biased Output.

FIGURE 2-39: Enable Turn-On/Turn-Off.

FIGURE 2-40: Enable Thresholds.

FIGURE 2-41: VIN UVLO Thresholds.

FIGURE 2-42: Power Up into Short Circuit.


Time (40μs/div)

VEN(2V/div)

VOUT(1V/div)

IL(10A/div)

VIN = 12VVOUT = 1.8VIOUT = 9AVPRE-BIAS = 1V

Time (2ms/div)

VIN(10V/div)

VOUT(1V/div)

VSW(10V/div)


Time (4ms/div)

VEN(2V/div)

VOUT(1V/div)

IL(10A/div)


Time (10ms/div)

VEN(1V/div)

VOUT(1V/div)

VIN = 2V to 6VVOUT = 1.8VIOUT = 2A

Time (10ms/div)

VIN(2V/div)

VOUT(1V/div)

VIN = 12V VOUT = 1.8VIOUT = Short

Time (1ms/div)

VIN(10V/div)

VOUT(200mV/div)

IL(5A/div)

MIC24053


FIGURE 2-43: Enabled into Short.

FIGURE 2-44: Short Circuit.

FIGURE 2-45: Output Recovery from Short Circuit.

FIGURE 2-46: Output Current Limit Threshold.

FIGURE 2-47: Output Recovery from Thermal Shutdown.

FIGURE 2-48: Switching Waveforms, IOUT = 9A.

VIN = 12V VOUT = 1.8VIOUT = Short

Time (1ms/div)

VEN(2V/div)

VOUT(200mV/div)

IL(5A/div)

VIN = 12V VOUT = 1.8V

Time (100μs/div)

VOUT(1V/div)

IL(5A/div)


Time (2ms/div)

VOUT(1V/div)

IL(5A/div)


Time (40ms/div)

VOUT(1V/div)

IL(5A/div)

VIN = 12V VOUT = 1.8VIOUT = 2A

Time (2ms/div)

VOUT(1V/div)

VSW(10V/div)


Time (1μs/div)

VOUT(10mV/div)

(AC-COUPLED)

VSW(10V/div)

IL(10A/div)


MIC24053

FIGURE 2-49: Switching Waveforms, IOUT = 0A.

FIGURE 2-50: Transient Response.

Time (1μs/div)

VOUT(10mV/div)

(AC-COUPLED)

VSW(10V/div)

IL(10A/div)


VIN = 12V VOUT = 1.8VIOUT = 2A to 8A

Time (40μs/div)

VOUT(200mV/div)

(AC-COUPLED)

IOUT(5A/div)

MIC24053


3.0 PIN DESCRIPTIONSThe descriptions of the pins are listed in Table 3-1.

TABLE 3-1: PIN FUNCTION TABLE Pin Number Pin Name Description

1 PVDD

5V Internal Linear Regulator output. PVDD supply is the power MOSFET gate drive supply voltage created by internal LDO from VIN. When VIN 5.5V, PVDD should be tied to PVIN pins. A 2.2 μF ceramic capacitor from the PVDD pin to PGND (pin 2) must be placed next to the IC.

2, 5, 6, 7, 8, 21 PGND

Power Ground. PGND is the ground path for the MIC24053 buck converter power stage. The PGND pins connect to the low-side N-Channel internal MOSFET gate drive supply ground, the sources of the MOSFETs, the negative terminals of input capacitors, and the negative terminals of output capacitors. The loop for the power ground should be as small as possible and separate from the Signal ground (SGND) loop.

3 NC No Connect.

4, 9, 10, 11, 12 SWSwitch Node output. Internal connection for the high-side MOSFET source and low-side MOSFET drain. Because of the high-speed switching on this pin, the SW pin should be routed away from sensitive nodes.

13, 14, 15, 16, 17, 18, 19 PVIN

High-Side N-internal MOSFET Drain Connection input. The PVIN operating voltage range is from 4.5V to 19V. Input capacitors between the PVIN pins and the power ground (PGND) are required; keep the connection short.

20 BST

Boost output. Bootstrapped voltage to the high-side N-channel MOSFET driver. A Schottky diode is connected between the PVDD pin and the BST pin. A boost capacitor of 0.1 μF is connected between the BST pin and the SW pin. Adding a small resistor at the BST pin can slow down the turn-on time of high-side N-Channel MOSFETs.

22 CS

Current Sense input. The CS pin senses current by monitoring the voltage across the low-side MOSFET during the OFF-time. Current sensing is necessary for short circuit protection. To sense the current accurately, connect the low-side MOSFET drain to SW using a Kelvin connection. The CS pin is also the high-side MOSFET’s output driver return.

23 SGND Signal ground. SGND must be connected directly to the ground planes. Do not route the SGND pin to the PGND Pad on the top layer.

24 FBFeedback input. Input to the transconductance amplifier of the control loop. The FB pin is regulated to 0.8V. A resistor divider connecting the feedback to the output is used to adjust the desired output voltage.

25 PG Power Good output. Open-drain output. The PG pin is externally tied with a resistor to VDD. A high output is asserted when VOUT 92% of nominal.

26 ENEnable input. A logic level control of the output. The EN pin is CMOS-compatible. Logic high = enable, logic low = shutdown. In the off state, the device’s supply current is greatly reduced (typically 5 μA). Do not leave the EN pin floating.

27 VIN Power Supply Voltage input. Requires bypass capacitor to SGND.

28 VDD

5V Internal Linear Regulator output. VDD supply is the power MOSFET gate drive supply voltage and the supply bus for the IC. VDD is created by internal LDO from VIN. When VIN 5.5V, tie VDD to PVIN pins. A 1 μF ceramic capacitor from the VDD pin to SGND pins must be placed next to the IC.


MIC240534.0 FUNCTIONAL DESCRIPTIONThe MIC24053 is an adaptive ON-time synchronousstep-down DC/DC regulator with an internal 5V linearregulator and a Power Good (PG) output. It is designedto operate over a wide input-voltage range, from 4.5Vto 19V, and provides a regulated output voltage at up to9A of output current. It uses an adaptive ON-timecontrol scheme to get a constant switching frequencyand to simplify the control compensation. Overcurrentprotection is implemented without using an externalsense resistor. The device includes an internalsoft-start function, which reduces the power supplyinput surge current at start-up by controlling the outputvoltage rise time.

4.1 Theory of OperationThe MIC24053 operates in a continuous mode, asshown in the Package Type.

4.2 Continuous ModeIn continuous mode, the MIC24053 feedback pin (FB)senses the output voltage through the voltage divider(R1 and R2), and compares it to a 0.8V referencevoltage (VREF) at the error comparator through alow-gain transconductance (gm) amplifier. If thefeedback voltage decreases and the output of the gmamplifier is below 0.8V, the error comparator triggersthe control logic and generates an ON-time period. TheON-time period length is predetermined by the “FIXEDtON ESTIMATION” circuitry:

EQUATION 4-1:

At the end of the ON-time period, the internal high-sidedriver turns off the high-side MOSFET and the low-sidedriver turns on the low-side MOSFET. In most cases,the OFF-time period length depends on the feedbackvoltage. When the feedback voltage decreases and theoutput of the gm amplifier is below 0.8V, the ON-timeperiod is triggered and the OFF-time period ends. If theOFF-time period determined by the feedback voltage isless than the minimum OFF-time (tOFF(min)), which isabout 300 ns, the MIC24053 control logic applies thetOFF(min) instead. tOFF(min) is required to maintainenough energy in the boost capacitor (CBST) to drivethe high-side MOSFET.

The maximum duty cycle is obtained from the 300 nstOFF(min):

EQUATION 4-2:

It is not recommended to use using the MIC24053 withan OFF-time close to tOFF(min) during steady-stateoperation. Also, as VOUT increases, the internal rippleinjection increases and reduces the line regulationperformance. Therefore, the maximum output voltageof the MIC24053 should be limited to 5.5V and themaximum external ripple injection should be limited to200mV. Please refer to the Setting Output Voltagesubsection in the Application Information section formore details.

The actual ON-time and resulting switching frequencyvary with the part-to-part variation in the rise and falltimes of the internal MOSFETs, the output load current,and variations in the VDD voltage. Also, the minimumtON results in a lower switching frequency in high VIN toVOUT applications, such as 18V to 1.0V. The minimumtON measured on the MIC24053 evaluation board isabout 100 ns. During load transients, the switchingfrequency is changed due to the varying OFF-time.

To illustrate the control loop operation, analysis of boththe steady-state and load transient scenarios isneeded.

Figure 4-1 shows the MIC24053 control-loop timingduring steady-state operation. During steady-state, thegm amplifier senses the feedback voltage ripple totrigger the ON-time period. The feedback voltage rippleis proportional to the output voltage ripple and theinductor current ripple. The ON-time is predeterminedby the tON estimator. The termination of the OFF-timeis controlled by the feedback voltage. At the valley ofthe feedback voltage ripple, which occurs when VFBfalls below VREF, the OFF period ends and the nextON-time period is triggered through the control logiccircuitry.

tON estimated V OUT

V IN 600kHz-----------------------------------=

Where:VOUT = Output voltage

VIN = Power stage input voltage

DmaxtS tOFF min –

tS---------------------------------- 1 300ns

tS---------------–= =

Where:ts = 1/600 kHz = 1.66 μs

MIC24053


FIGURE 4-1: MIC24053 Control Loop Timing.Figure 4-2 shows the operation of the MIC24053 duringa load transient. The output voltage drops due to thesudden load increase, which causes the VFB to be lessthan VREF. This causes the error comparator to triggeran ON-time period. At the end of the ON-time period, aminimum OFF-time (tOFF(min)) is generated to chargeCBST because the feedback voltage is still below VREF.Then, the next ON-time period is triggered because ofthe low feedback voltage. Therefore, the switchingfrequency changes during the load transient, butreturns to the nominal fixed frequency after the outputhas stabilized at the new load current level. Because ofthe varying duty cycle and switching frequency, theoutput recovery time is fast and the output voltagedeviation is small in the MIC24053 converter.

FIGURE 4-2: MIC24053 Load Transient Response.Unlike true current-mode control, the MIC24053 usesthe output voltage ripple to trigger an ON-time period.The output voltage ripple is proportional to the inductor

current ripple if the ESR of the output capacitor is largeenough. The MIC24053 control loop has the advantageof eliminating the need for slope compensation.

To meet the stability requirements, the MIC24053feedback voltage ripple should be in phase with theinductor current ripple and large enough to be sensedby the gm amplifier and the error comparator. Therecommended feedback voltage ripple is20 mV~100 mV. If a low-ESR output capacitor isselected, then the feedback voltage ripple may be toosmall to be sensed by the gm amplifier and the errorcomparator. Also, the output voltage ripple and thefeedback voltage ripple are not necessarily in phasewith the inductor current ripple if the ESR of the outputcapacitor is very low. In these cases, ripple injection isrequired to ensure proper operation. Please refer to theRipple Injection subsection in Application Informationfor more details about the ripple injection technique.

4.3 VDD RegulatorThe MIC24053 provides a 5V regulated output for inputvoltage VIN ranging from 5.5V to 19V. WhenVIN < 5.5V, tie VDD to the PVIN pins to bypass theinternal linear regulator.

4.4 Soft-StartSoft-start reduces the power supply input surge currentat start-up by controlling the output voltage rise time.The input surge appears while the output capacitor ischarged up. A slower output rise time draws a lowerinput surge current.

The MIC24053 implements an internal digital soft-startby making the 0.8V reference voltage (VREF) rampfrom 0 to 100% in about 3 ms with 9.7 mV steps.Therefore, the output voltage is controlled to increaseslowly by a staircase VFB ramp. After the soft-startcycle ends, the related circuitry is disabled to reducecurrent consumption. VDD must be powered up at thesame time or after VIN to make the soft-start functioncorrectly.

4.5 Current LimitThe MIC24053 uses the RDS(ON) of the internallow-side power MOSFET to sense overcurrentconditions. This method reduces cost, board space,and power losses taken by a discrete current senseresistor. The low-side MOSFET is used because itdisplays much lower parasitic oscillations duringswitching than the high-side MOSFET.

In each switching cycle of the MIC24053 converter, theinductor current is sensed by monitoring the low-sideMOSFET in the OFF period. If the peak inductorcurrent is greater than 14A, the MIC24053 turns off thehigh-side MOSFET and a soft-start sequence istriggered. This mode of operation is called “hiccupmode.” Its purpose is to protect the downstream load in

IL

IOUT

VOUT

VFB

VREF

ΔIL(pp)

ΔVOUT(pp) = ESRCout * ΔIL(pp)

Estimated ON-Time

HSD

ΔVFB(pp) = ΔVOUT(pp) * R2

R1+R2

Trigger ON-time if VFB is below VREF

IOUT

VOUT

VFB

HSD

No load

Full load

VREF

TOFF(min)


MIC24053case of a hard short. The load current-limit thresholdhas a foldback characteristic related to the feedbackvoltage as shown in Figure 4-3.

FIGURE 4-3: MIC24053 Current-Limit Foldback Characteristic.

4.6 Power Good (PG)The Power Good (PG) pin is an open-drain output thatindicates logic high when the output is nominally 92%of its steady-state voltage. A pull-up resistor of morethan 10 kΩ should be connected from PG to VDD.

4.7 MOSFET Gate DriveThe Package Type shows a bootstrap circuit consistingof D1 (a Schottky diode is recommended) and CBST.This circuit supplies energy to the high-side drivecircuit. Capacitor CBST is charged, while the low-sideMOSFET is on, and the voltage on the SW pin isapproximately 0V. When the high-side MOSFET driveris turned on, energy from CBST is used to turn theMOSFET on. As the high-side MOSFET turns on, thevoltage on the SW pin increases to approximately VIN.Diode D1 is reverse biased and CBST floats high whilecontinuing to keep the high-side MOSFET on. The biascurrent of the high-side driver is less than 10 mA, so a0.1 μF to 1 μF capacitor is sufficient to hold the gatevoltage with minimal droop for the power stroke(high-side switching) cycle; that is, ΔBST = 10 mA x1.67 μs/0.1 μF = 167 mV. When the low-side MOSFETis turned back on, CBST is recharged through D1. Asmall resistor (RG), which is in series with CBST, can beused to slow down the turn-on time of the high-sideN-channel MOSFET.

The drive voltage is derived from the VDD supplyvoltage. The nominal low-side gate drive voltage is VDDand the nominal high-side gate drive voltage isapproximately VDD – VDIODE, where VDIODE is thevoltage drop across D1. An approximate 30 ns delaybetween the high-side and low-side driver transitions isused to prevent current from simultaneously flowingunimpeded through both MOSFETs.

0

4

8

12

16

20

0.0 0.2 0.4 0.6 0.8 1.0

FEEDBACK VOLTAGE (V)

CURR

ENT

LIMI

T TH

RESH

OLD

(A)

MIC24053


5.0 APPLICATION INFORMATION

5.1 Inductor SelectionSelecting the output inductor requires values forinductance, peak, and RMS currents. The input andoutput voltages and the inductance value determinethe peak-to-peak inductor ripple current. Generally,higher inductance values are used with higher inputvoltages. Larger peak-to-peak ripple currents increasethe power dissipation in the inductor and MOSFETs.Larger output ripple currents also require more outputcapacitance to smooth out the larger ripple current.Smaller peak-to-peak ripple currents require a largerinductance value and therefore a larger and moreexpensive inductor. A good compromise between size,loss, and cost is to set the inductor ripple current to beequal to 20% of the maximum output current. Theinductance value is calculated by Equation 5-1:

EQUATION 5-1:

The peak-to-peak inductor current ripple is:

EQUATION 5-2:

The peak inductor current is equal to the averageoutput current plus one half of the peak-to-peakinductor current ripple.

EQUATION 5-3:

The RMS inductor current is used to calculate the I2Rlosses in the inductor.

EQUATION 5-4:

The proper selection of core material and minimizingthe winding resistance is required to maximizeefficiency. The high-frequency operation of theMIC24053 requires the use of ferrite materials for allbut the most cost-sensitive applications. Lower-costiron powder cores may be used, but the increase incore loss will reduce the efficiency of the power supply.This is especially noticeable at low output power. Thewinding resistance decreases efficiency at the higheroutput current levels. The winding resistance must beminimized although this usually comes at the expenseof a larger inductor. The power dissipated in theinductor is equal to the sum of the core and copperlosses. At higher output loads, the core losses areusually insignificant and can be ignored. At loweroutput currents, the core losses can be a significantcontributor. Core loss information is usually availablefrom the magnetics vendor. Copper loss in the inductoris calculated by Equation 5-5.

EQUATION 5-5:

The resistance of the copper wire, RWINDING, increaseswith the temperature. The value of the windingresistance used should be at the operatingtemperature.

EQUATION 5-6:

5.2 Output Capacitor SelectionThe type of the output capacitor is usually determinedby its equivalent series resistance (ESR). Voltage andRMS current capability are two other important factorsfor selecting the output capacitor. Recommendedcapacitor types are ceramic, low-ESR aluminumelectrolytic, OS-CON, and POSCAP. The outputcapacitor’s ESR is usually the main cause of the outputripple. It also affects the stability of the control loop.

Where:fSW = Switching Frequency, 600 kHz

20% = Ratio of AC ripple current to DC output current

VIN(max) = Maximum power stage input voltage

LV OUT V IN max V OUT–

V IN max f SW 20% IOUT max ------------------------------------------------------------------------------------------=

I L pp V OUT V IN max V OUT–

V IN max f SW L----------------------------------------------------------------------=

I K pk IOUT max 0.5+ I L pp =

I L RMS IOUT max 2 I L PP

2

12----------------------+=

pINDUCTOR Cu I L RMS 2 RWINDING=

PWINDING Ht RWINDING 20C 1 0.0042 T H T 20C– +

=

Where:TH = Temperature of wire under full

loadT20°C = Ambient Temperature

RWINDING(20°C) = Room temperature winding resistance (usually specified by the manufacturer)


MIC24053The maximum value of ESR is calculated withEquation 5-7.

EQUATION 5-7:

The total output ripple is a combination of the ESR andoutput capacitance. The total ripple is calculated inEquation 5-8:

EQUATION 5-8:

As described in the Theory of Operation subsection inthe Functional Description section, the MIC24053requires at least 20 mV peak-to-peak ripple at the FBpin to make the gm amplifier and the error comparatorbehave properly. Also, the output voltage ripple shouldbe in phase with the inductor current. Therefore, theoutput voltage ripple caused by the output capacitors’value should be much smaller than the ripple causedby the output capacitor ESR. If low-ESR capacitors,such as ceramic capacitors, are used for the outputcapacitors, a ripple injection method should be appliedto provide enough feedback voltage ripple. Please referto the Ripple Injection subsection for more details.

The voltage rating of the capacitor should be twice theoutput voltage for a tantalum and 20% greater foraluminum electrolytic or OS-CON. The output capacitorRMS current is calculated in Equation 5-9:

EQUATION 5-9:

The power dissipated in the output capacitor is:

EQUATION 5-10:

5.3 Input Capacitor SelectionThe input capacitor for the power stage input (VIN)should be selected for ripple current rating and voltagerating. Tantalum input capacitors may fail whensubjected to high inrush currents, caused by turning onthe input supply. A tantalum input capacitor’s voltagerating should be at least two times the maximum inputvoltage to maximize reliability. Aluminum electrolytic,OS-CON, and multilayer polymer film capacitors canhandle the higher inrush currents without voltagede-rating. The input voltage ripple primarily depends onthe input capacitor’s ESR. The peak input current isequal to the peak inductor current, so:

EQUATION 5-11:

The input capacitor must be rated for the input currentripple. The RMS value of the input capacitor current isdetermined at the maximum output current. Assumingthe peak-to-peak inductor current ripple is low:

EQUATION 5-12:

The power dissipated in the input capacitor is:

EQUATION 5-13:

5.4 Ripple InjectionThe VFB ripple required for proper operation of theMIC24053 gm amplifier and error comparator is 20 mVto 100 mV. However, the output voltage ripple isgenerally designed as 1% to 2% of the output voltage.For a low output voltage, such as 1V, the output voltageripple is only 10 mV to 20 mV, and the feedback voltageripple is less than 20 mV. If the feedback voltage rippleis so small that the gm amplifier and error comparatorcannot sense it, then the MIC24053 will lose controland the output voltage is not regulated. To have someamount of VFB ripple, a ripple injection method isapplied for low output voltage ripple applications.

ESRCOUTV OUT PP I L PP

-----------------------------

Where:ΔVOUT(PP) = Peak-to-peak output voltage

rippleΔIL(PP) = Peak-to-peak inductor current

ripple

V OUT PP

I L PP COUT f SW 8----------------------------------------- 2 I L PP ESRCOUT 2+

=

Where:D = Duty cycle

COUT = Output capacitance valuefSW = Switching frequency

ICOUT RMS I L PP

12-------------------=

PDISS COUT ICOUT RMS 2 ESRCOUT=

V IN I L pk ESRCIN=

ICIN RMS IOUT MAX D 1 D– =

PDISS ON ICIN RMS 1 ESRCIN=

MIC24053


The applications are divided into three situationsaccording to the amount of the feedback voltage ripple:

1. Enough ripple at the feedback voltage due to thelarge ESR of the output capacitors.

FIGURE 5-1: Enough Ripple at FB.As shown in Figure 5-1, the converter is stable withoutany ripple injection. The feedback voltage ripple is:

EQUATION 5-14:

2. Inadequate ripple at the feedback voltage due tothe small ESR of the output capacitors.

FIGURE 5-2: Inadequate Ripple at FB.The output voltage ripple is fed into the FB pin througha feedforward capacitor (Cff) in this situation, as shownin Figure 5-2. The typical Cff value is between 1nF and100 nF. With the feedforward capacitor, the feedbackvoltage ripple is very close to the output voltage ripple:

EQUATION 5-15:

3. Virtually no ripple at the FB pin voltage due tothe very-low ESR of the output capacitors.

FIGURE 5-3: Invisible Ripple at FB.In this situation, the output voltage ripple is less than20 mV. Therefore, additional ripple is injected into theFB pin from the switching node (SW) using a resistor(Rinj) and a capacitor (Cinj), as shown in Figure 5-3.The injected ripple is:

EQUATION 5-16:

EQUATION 5-17:

In Equation 5-16 and Equation 5-17, it is assumed thatthe time constant associated with Cff must be muchgreater than the switching period:

EQUATION 5-18:

If the voltage divider resistors (R1 and R2) are in the kΩrange, a Cff of 1 nF to 100 nF can easily satisfy thelarge time constant requirement. Also, a 100 nFinjection capacitor (Cinj) is used in order to beconsidered as short for a wide range of thefrequencies.

MIC24053SW

FB

L

R1

R2 ESR

COUT

V FB pp R2R1 R2+-------------------- ESRCOUT I L pp =

Where:ΔIL(pp) = Peak-to-peak value of the

inductor current ripple.

MIC24053SW

FB

L

R1

R2 ESR

COUTCff

V FB pp ESR I L pp

MIC24053SW

FB

L

R1

R2 ESR

COUTCffRinj

Cinj

V FB pp V IN Kdiv D 1 D– 1f SW --------------------=

L

KdivR1 R2

Rinj R1 R2----------------------------------=

Where:VIN = Power stage input voltage

D = Duty CyclefSW = Switching frequencyτ = (R1//R2//Rinj) × Cff

1f SW -------------------- T

--- 1»=


MIC24053The process of sizing the ripple injection resistor andcapacitors is:

1. Select Cff to feed all output ripples into the feed-back pin and make sure the large time constantassumption is satisfied. Typical choice of Cff is1 nF to 100 nF if R1 and R2 are in the kΩ range.

2. Select Rinj according to the expected feedbackvoltage ripple using Equation 5-19:

EQUATION 5-19:

Then the value of Rinj is calculated as:

EQUATION 5-20:

3. Select Cinj as 100 nF, which could be consid-ered as short for a wide range of the frequen-cies.

5.5 Setting Output VoltageThe MIC24053 requires two resistors to set the outputvoltage as shown in Figure 5-4.

The output voltage is determined by Equation 5-21:

EQUATION 5-21:

A typical value of R1 can be between 3 kΩ and 10 kΩ.If R1 is too large, it may allow noise to be introducedinto the voltage feedback loop. If R1 is too small, it willdecrease the efficiency of the power supply, especiallyat light loads. Once R1 is selected, R2 can becalculated using Equation 5-22

EQUATION 5-22:

FIGURE 5-4: Voltage-Divider Configuration.In addition to the external ripple injection added at theFB pin, internal ripple injection is added at the invertinginput of the comparator inside the MIC24053, as shownin Figure 5-5. The inverting input voltage (VINJ) isclamped to 1.2V. As VOUT increases, the swing of VINJis clamped. The clamped VINJ reduces the lineregulation because it is reflected as a DC error on theFB terminal. Therefore, the maximum output voltage ofthe MIC24053 should be limited to 5.5V to avoid thisproblem.

FIGURE 5-5: Internal Ripple Injection.

5.6 Thermal MeasurementsIt is a good idea to measure the IC’s case temperatureto make sure it is within its operating limits. Althoughthis might seem like a very elementary task, it is easyto get false results. The most common mistake is to usethe standard thermal couple that comes with a thermalmeter. This thermal couple wire gauge is large, typically22 gauge, and behaves like a heat-sink, resulting in alower case measurement.

Two methods of temperature measurement are to usea smaller thermal couple wire or an infraredthermometer. If a thermal couple wire is used, it mustbe constructed of 36 gauge wire, or higher (smallerwire size), to minimize the wire heat-sinking effect. Inaddition, the thermal couple tip must be covered in

Where:VFB 0.8V

LdivV FB pp V IN

------------------------f SW

D 1 D– -----------------------------=

Rinj R1//R2 1Kdiv----------- 1– =

V OUT V FB 1 R1R2-------+

=

R2V FB R1

V OUT V FB–-------------------------------=

gm Amp FB

R1

R2

VREF

INTERNALRIPPLE

INJECTION

COMPENSATION

SW

FBCOMP VINJ

gm EA

VREF0.8V

MIC24053


either thermal grease or thermal glue to make sure thatthe thermal couple junction is making good contact withthe case of the IC. Omega brand thermal couple(5SC-TT-K-36-36) is adequate for most applications.

Wherever possible, an infrared thermometer isrecommended. The measurement spot size of mostinfrared thermometers is too large for an accuratereading on small form factor ICs. However, an IRthermometer from Optris has a 1 mm spot size, whichmakes it a good choice for measuring the hottest pointon the case. An optional stand makes it easy to hold thebeam on the IC for long periods of time.


MIC240536.0 PACKAGING INFORMATION

6.1 Package Marking Information

XXXXXXXXXXX

WNNN

28-lead QFN* Example

24053YJLMIC

1215

Legend: XX...X Product code or customer-specific informationY Year code (last digit of calendar year)YY Year code (last 2 digits of calendar year)WW Week code (week of January 1 is week ‘01’)NNN Alphanumeric traceability code Pb-free JEDEC® designator for Matte Tin (Sn)* This package is Pb-free. The Pb-free JEDEC designator ( )

can be found on the outer packaging for this package.

●, ▲, ▼ Pin one index is identified by a dot, delta up, or delta down (trianglemark).

Note: In the event the full Microchip part number cannot be marked on one line, it willbe carried over to the next line, thus limiting the number of availablecharacters for customer-specific information. Package may or may not includethe corporate logo.

Underbar (_) and/or Overbar (‾) symbol may not be to scale.

3e

3e

MIC24053


28-Pin 5 mm 6 mm QFN Packagev Outline and Recommended Land Pattern


MIC24053APPENDIX A: REVISION HISTORY

Revision A (November 2016)• Converted Micrel Document MIC24053 to Micro-

chip datasheet DS20005668A.• Minor grammatical text changes throughout all

sections.

MIC24053


NOTES:


MIC24053PRODUCT IDENTIFICATION SYSTEMTo order or obtain information, e.g., on pricing or delivery, contact your local Microchip representative or sales office.

Examples:a) MIC24053YJL-TR: 12V, 9A High-Efficiency Buck

Regulator with HyperSpeed Control, –40°C to +125°C Junction Tempera-ture Range, 28-Pin 5 mm × 6 mm QFN package, 1000/Reel.

PART NO. X XX

PackageTemperatureRange

Device

Device: MIC24053: 12V, 9A High-Efficiency Buck Regulator with HyperSpeed Control

Temperature Range:

Y = Industrial Temperature Grade –40°C to +125°C

Package: JL = 28-Pin 5 mm × 6 mm QFN

Media Type: TR = 1000/Reel

XX

MediaType

-

MIC24053


NOTES:


Information contained in this publication regarding deviceapplications and the like is provided only for your convenienceand may be superseded by updates. It is your responsibility toensure that your application meets with your specifications.MICROCHIP MAKES NO REPRESENTATIONS ORWARRANTIES OF ANY KIND WHETHER EXPRESS ORIMPLIED, WRITTEN OR ORAL, STATUTORY OROTHERWISE, RELATED TO THE INFORMATION,INCLUDING BUT NOT LIMITED TO ITS CONDITION,QUALITY, PERFORMANCE, MERCHANTABILITY ORFITNESS FOR PURPOSE. Microchip disclaims all liabilityarising from this information and its use. Use of Microchipdevices in life support and/or safety applications is entirely atthe buyer’s risk, and the buyer agrees to defend, indemnify andhold harmless Microchip from any and all damages, claims,suits, or expenses resulting from such use. No licenses areconveyed, implicitly or otherwise, under any Microchipintellectual property rights unless otherwise stated.

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ISBN: 978-1-5224-1099-7

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