metrology of silicide contacts for future cmos

40
TM Freescale™ and the Freescale logo are trademarksof Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © Freescale Semiconductor, Inc. 2007. 2007 Int. Conference on Frontiers of Characterization and Metrology for Nanoelectronics Gaithersburg, MD, March 28, 2007 Metrology of Silicide Contacts for Future CMOS Stefan Zollner , Rich Gregory, Mike Kottke, Victor Vartanian, Xiang-Dong Wang, Michael Canonico, David Theodore, Peter Fejes, Mark Raymond, Xiaoyan Zhu, Dean Denning, Scott Bolton, Kyuhwan Chang, Ross Noble, Mo Jahanbani, Marc Rossow, Darren Goedeke, Stan Filipiak, Ricardo Garcia, Dharmesh Jawarani, Bill Taylor, Bich-Yen Nguyen, Phil Crabtree, Aaron Thean Freescale Semiconductor, Inc., ATMC, Austin, TX 78721

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Page 1: Metrology of Silicide Contacts for Future CMOS

TM

Freescale™ and the Freescale logo are trademarksof Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © Freescale Semiconductor, Inc. 2007.

2007 Int. Conference on Frontiers of Characterization and Metrology for NanoelectronicsGaithersburg, MD, March 28, 2007

Metrology of Silicide Contacts for Future CMOS

Stefan Zollner, Rich Gregory, Mike Kottke, Victor Vartanian, Xiang-Dong Wang, Michael Canonico, David Theodore, Peter Fejes, Mark Raymond, Xiaoyan Zhu, Dean Denning, Scott Bolton, Kyuhwan Chang, Ross Noble, Mo Jahanbani, Marc Rossow, Darren Goedeke, Stan Filipiak, Ricardo Garcia, Dharmesh Jawarani, Bill Taylor, Bich-Yen Nguyen, Phil Crabtree, Aaron TheanFreescale Semiconductor, Inc., ATMC, Austin, TX 78721

Page 2: Metrology of Silicide Contacts for Future CMOS

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OutlineCurrent silicide device topics

• NiSi contacts for 45nm and 32nm CMOS• Fully silicided gates (FUSI)• Low-resistance Ohmic contacts (PtSi for PMOS, ErSi2 for NMOS, etc)• Schottky-barrier S/D devices• Barrier height tuning by interface engineering

(1) Metal thickness metrology using x-ray fluorescence (XRF)• Why XRF?• XRF standards (RBS, TEM, etc)• XRF results and issues

(2) Silicide materials properties• Transformation and crystal structure (X-ray diffraction)• Depth profiles (Auger spectrometry)• Influence of surface preparation (X-ray reflectivity)

Page 3: Metrology of Silicide Contacts for Future CMOS

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Self-aligned silicide (salicide) formation process flow

1. Silicide preclean2. Blanket metal

deposition3. Silicide anneal4. Selective etch• Silicide anneal

S D

G

SiO2 oxide

silicon

1 2 3

4

Page 4: Metrology of Silicide Contacts for Future CMOS

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Self-aligned silicide (salicide) process

1. Blanket metal deposition2. Thermal annealing (RTA1)3. Selective etch to remove

unreacted metal4. Thermal annealing (RTA2)

Process issues needing metrology:• Process control for blanket metal film thickness (~10 nm)• Formation of thin silicide on narrow active and poly lines (<50 nm)• Optimizing the silicide preclean process (ICMI 2006, UCPSS 2006)• Choosing anneal temperature and time (ICMI 2006, MAM 2006)• Selective etch development (ICMI 2006)

Si substrate

SiO2

D S

GWW

Si

Page 5: Metrology of Silicide Contacts for Future CMOS

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XRF Measurement Principle

13αKEE LK ⇒−

22αKEE LK ⇒−

13 βKEE MK ⇒−

153αLEE ML ⇒−

M

L

K

1

2

Kn=1

Ln=2

Mn=3

(1) A primary x-ray photon ejects an electron from an inner shell, leaving behind a hole. (2) This hole is filled by an electron from an outer shell, leading to the emission of a

secondary characteristic x-ray photon.

KL

M

Source: Dileep Agnihotri, Jesus Gallegos, Jeremy O’Dell

Page 6: Metrology of Silicide Contacts for Future CMOS

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Thin-film metrology for metals: Why XRF?Why not ellipsometry?

Proven optical thin-film metrology techniques such as ellipsometry or reflectometry measure transparent films such as dielectrics or thin silicon. They do not work well for metals (including silicides).

Why X-ray fluorescence (XRF)?• Commercial fab tools available.• High throughput (10 s per site for 10 nm Ni)• Small spot size (~50 µm) with pattern recognition achievable• Robust (areal density independent of chemical composition)• No fitting or models required.

What are XRF issues?• XRF needs standards• Interference issues (different element, same peak energy)• Diffraction background depends on substrate type

Page 7: Metrology of Silicide Contacts for Future CMOS

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Why XRF standards? XRF spectrum for 10 nm Ni on oxide

Si Kα Ni Kα7480 eV

Energy-dispersive x-ray fluorescence30 s data acquisition per site (fast)Small spot sizeStrong characteristic Ni peak.Good signal to background ratio.

Standards translate the Ni peak height into a layer thickness.

Advantage: No fitting required.

Diffraction peaks

Background

Diffraction peaks independent of notch rotation for Si (100) surface!

Page 8: Metrology of Silicide Contacts for Future CMOS

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XRF standards

XRF standards translate XRF peak intensity into film thickness.

Two standards are often sufficient:(1) Bare Si substrate (0 nm standard)(2) Metal film of known thickness (10 to 100 nm)

How do we obtain a metal film of “known” thickness?(1) Does “known” mean NIST-traceable?(2) Match other existing metrology (“golden” wafer).(3) Sheet resistance measurement (assume bulk resistivity).(4) SEM or TEM microscopy: Consider calibration errors!(5) Rutherford backscattering: Very good for transition metals!(6) X-ray reflectivity (XRR) of metal film on oxide.

Page 9: Metrology of Silicide Contacts for Future CMOS

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X-ray reflectivity: Ni on oxide as XRF standardNi on SiO2:Best fit using thin interfacial layer (fixed 1 Å thickness) with Ni density fitted, others fixed. Very good fit. Range: θ=0.15 to 3.5°.Background: 15 countsTotal parameters: 7 (3+4 roughnesses).

Ni density gradient or artifact ?

Add 50% of top and bottom thickness to main Ni thickness for total thickness.

Ni density a little lower than bulk Ni (8.9 g/cm3)

Page 10: Metrology of Silicide Contacts for Future CMOS

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Ni PVD, center

91

92

93

94

95

96

1 6 11 16 21

Ni X

RF

thic

knes

s

Day 1Day 2Day 3Day 4Day 5Linear (Day 1)Linear (Day 2)Linear (Day 3)Linear (Day 4)Linear (Day 5)

1 2 3 4 5 5 Dynamic repeats5 Static repeats

XRF measurement results: 10 nm Ni on SiO2Average: 93.8 Å,σ: 1.0 Å, 10 s acquisition.No obvious repeat or day-to-day trend.

Page 11: Metrology of Silicide Contacts for Future CMOS

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y = 21.208x-0.4958

1

10

10 100 1000Acquisition Time (s)

Six

-sig

ma

Pre

cisi

on (A

)XRF Precision is shot-noise limited

Standard deviation: σ=1 ÅPrecision: P=6σ=6 ÅTolerance: 20 Å (example)P/T=30% for 10 s acquisition time

10% P/T desirable Increase acquisition time for improved P/T ratio.

Poisson statistics

Page 12: Metrology of Silicide Contacts for Future CMOS

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XRF application: 49-point wafer map

x

y

806040200-20-40-60-80

80

60

40

20

0

-20

-40

-60

-80

t

85.5 - 86.086.0 - 86.586.5 - 87.087.0 - 87.587.5 - 88.0

<

88.0 - 88.588.5 - 89.089.0 -

85.0

89.589.5 - 90.0

> 90.0

85.0 - 85.5

Average: 86.8 Åσ: 1.4 Å across waferthick in center30 s acquisition

49-point map with 0.5 Å contours: 9 nm Ni on oxide

Page 13: Metrology of Silicide Contacts for Future CMOS

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XRF measurement results: 2 nm TiN on SiO2TiN PVD, center

21

22

23

24

25

26

27

1 6 11 16 21

TiN

XR

F th

ickn

ess

Day 1Day 2Day 3Day 4Day 5Linear (Day 1)Linear (Day 2)Linear (Day 3)Linear (Day 4)Linear (Day 5)Average: 24.6 Å,

σ: 1.0 Å, 10 s acquisitionNo obvious repeat or day-to-day trend.

1 2 3 4 5 Dynamic repeatsStatic repeats

Page 14: Metrology of Silicide Contacts for Future CMOS

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XRF application: Anneal and selective etch development

0.0

0.5

1.0

1.5

2.0

2.5

3.0

3.5

280C 300C 320C 340C 360C

XRF

Ni t

hick

ness

(a.u

.)

bulkSOIbefore etch

Deposition, anneal, selective etchOptimize anneal temperature

Anneal temperature

Page 15: Metrology of Silicide Contacts for Future CMOS

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XRF application to patterned wafersMetrology pads on mask sets:(1) Uniform active Si block(2) Uniform poly-Si block(3) Active Si lines and spaces(4) Poly-Si lines and spacesSize: 70 by 100 µm.

Page 16: Metrology of Silicide Contacts for Future CMOS

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50556065707580859095

0 10 20 30 40 50 60 70 80 90

Die Index (2 wafers)

Ni X

RF th

ickn

ess

(A)

Active Block 1Poly on Active Block 4Poly on Field Block 7

XRF application to patterned wafers: Uniform block

9 nm Ni on Si

NiSi formation similar on active and poly Si.

Normal across-wafer variations (flyers!).

Page 17: Metrology of Silicide Contacts for Future CMOS

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XRF application to patterned wafers: Lines and spaces

Good uniformity for active Si lines and spaces.Large variations in Ni coverage for poly-Si lines on oxide (patterning issue).

0102030405060708090

100

0 10 20 30 40 50 60 70 80 90

Die Index (2 wafers)

Ni X

RF th

ickn

ess

(A)

Active blockPoly on active block 4Poly on field block 7Active lines 2Poly lines on field 8poly lines on active 5

Page 18: Metrology of Silicide Contacts for Future CMOS

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XRF issues

Light elements cannot be measured (Al or higher are practical).

Hard to measure low impurity levels (Example: 5% Pt in Ni)

XRF background depends on substrate choice.

XRF is an excellent thin-film metrology technique, because XRF does not get confused by details of materials science, such as

• Chemical reactions• Chemical composition• Surface and interface effects• Crystal structure• Crystal orientation and texture• Interdiffusion of layers• Surface roughness and agglomeration (evenly distributed across surface?)This lack of sensitivity is also a limitation for XRF!

Page 19: Metrology of Silicide Contacts for Future CMOS

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XRF experimental setup: Four detectors improve throughput

Deviation by Channel

-6

-4

-2

0

2

4

6

0 5 10 15 20 25

Ni X

RF

thic

knes

s (A

)

Ch 1Ch 2Ch 3Ch 4Linear (Ch 1)Linear (Ch 2)Linear (Ch 3)Linear (Ch 4)

Random variations (up to ±5 Å, with σ=2 Å) between each detector and the average.Systematic differences between four detector channels are smaller than 1 Å.These measurements performed for Ni film on Si (100) surface (symmetric diffraction).

Difference between each detector and average signal

Page 20: Metrology of Silicide Contacts for Future CMOS

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Bulk Si (110)

70

80

90

100

110

120

130

140

1 6 11 16 21

Ni t

hick

ness

(A)

XRF issues: Diffraction varies with surface orientation

SOI Si (100)

90

95

100

105

Ni t

hick

ness

(A)

Det. 1Det. 2Det. 3Det. 4

Bulk Si (100)

90

95

100

105

Ni t

hick

ness

(A)

Det. 1Det. 2Det. 3Det. 4

SOI Si (100): 98.5 Å, 2.5 Å σ

Bulk Si (100): 96.9 Å, 2.9 Å σ

Bulk Si (110): 105 Å, 21 Å σ

Recipe optimized for Ni on Si (100) does not work for Ni on Si (110).

Similarly: Bare Si and TEOS test wafers show different results than Si test wafers with silicon nitride.

Page 21: Metrology of Silicide Contacts for Future CMOS

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Pt thickness from XRF (patterned wafer)

100

120

140

160

180

0 10 20 30 40 50 60Die Index

Pt th

ickn

ess

(A)

Channel 1Channel 2Channel 3Channel 4AverageLinear (Average)

Channel 2 and 3 signal independent of die and similar to average. Channels 1 and 4 are high/low and show variation by die (instrument artifact).

Page 22: Metrology of Silicide Contacts for Future CMOS

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60

80

100

120

140

160

180

200

220

0 10 20 30 40 50

Point on wafer

Pt X

RF

thic

knes

s (A

)

Ch. 1Ch. 2Ch. 3Ch. 4Average

Pt thickness from XRF (blanket wafer)

Channel 2 and 3 signal independent of location and distributed around average. Channels 1 and 4 are high/low and show variation by point (instrument artifact).No background subtraction was used.

Page 23: Metrology of Silicide Contacts for Future CMOS

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Pt thickness from XRF (blanket wafer)

60

80

100

120

140

160

180

200

220

0 10 20 30 40 50Point on wafer

Pt X

RF

thic

knes

s (A

)

Ch. 1Ch. 2Ch. 3Ch. 4Average

With background subtraction and digital filtering to find the peaks, the data look much cleaner, but there are still large variations.Four-channel σ=11 Å. After averaging: σ=3 Å.

Page 24: Metrology of Silicide Contacts for Future CMOS

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Wavelength-dispersive XRFWavelength dispersive XRF uses an x-ray crystal monochromator:• Higher resolution• Much larger spot size (~10 mm)• Much lower throughput (5 min per data point)• Less susceptible to background variations or interferences.

10 nm Ni on Si substrate with different surface orientations.

Energy-dispersive XRF yields consistent results without variations due to substrate orientations. Background subtraction was used.

(No standards were used for this tool).4.1

4.2

4.3

4.4

1 2 3 4Location on wafer (quadrant)

Ni t

hick

ness

(a.u

.)

SOI (100)Bulk Si (100)Bulk Si (110)

Page 25: Metrology of Silicide Contacts for Future CMOS

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Why not X-ray reflectivity (XRR) ?

• XRR spectra for metal films vary with processing and depend on many factors (composition, interface and surface layers, processing, etc).

• Difficult line shape fitting is required for new film stacks.

215A

NiSi

Low-densityLayer Observed

215A

NiSi

Low-densityLayer Observed

1.E+00

1.E+01

1.E+02

1.E+03

1.E+04

1.E+05

1.E+06

1.E+07

1.E+08

0 1 2 3theta (degrees)

Inte

nsity

(a.u

.)

Fit RF etchData RF etchFit H-termData H-term

Page 26: Metrology of Silicide Contacts for Future CMOS

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Materials science of silicide formation

Need metrology techniques for• Surface roughness and agglomeration

(AFM, TEM, scatterometry, Raman, XRD)• Chemical reactions• Chemical composition• Surface and interface effects • Crystal structure (XRD)• Crystal orientation and texture (XRD, lab or synchrotron, EBSD)• Interdiffusion (SIMS or Auger depth profiling)

Many non-routine techniques are needed during process development.

Page 27: Metrology of Silicide Contacts for Future CMOS

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Agglomeration: Formation of nano-islands

TEM

Surface energy vs.bulk energy

Ref:Niranjan, PRB 73 & 75

0

10

20

30

40

50

60

70

80

90

100

0 100 200 300 400 500 600 700 800RTA1 Anneal Temp (C)

Post RTA1Post RTA1 / EtchRTA1 / Etch / RTA2

Sheet resistance versus anneal temperature

NiNiSi

Agglo-meration

She

et re

sist

ance

(Ohm

s)

Thin Ni films agglomerate after annealing,do not form continuous silicide film.

Page 28: Metrology of Silicide Contacts for Future CMOS

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UV-Raman spectra of the Si LO mode from the Si substrate.

800C750C

TEM

Agglomeration: Observed with UV Raman and XRD

500 520 540

substrate Si LO

Inte

nsity

(a.u

.)

Raman Shift (cm-1)

Si substrate LO Raman signal increases due to agglomeration.

0

50

100

150

200

250

300 400 500 600 700 800 900

RTA1 (deg C)

Inte

nsity

o-N

iSi (

020)

NiSi XRD intensity: orthorhombic (020)

Page 29: Metrology of Silicide Contacts for Future CMOS

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NiSi Crystal orientation influences agglomeration

C. Detavernier et al., Nature 426, 641 (2003).

NiSi (002) pole figure obtained using synchrotron x-ray diffraction.

Spots: epitaxial alignmentRings: Conventional fiber textureArcs: Tilted fiber texture (axiotaxy)

Texture is influenced by lattice constants of Si and NiSi.

Good lattice match produces tilted fiber texture, which leads to early agglomeration.

Page 30: Metrology of Silicide Contacts for Future CMOS

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Reducing contact resistance and Schottky barrier height

GdS

i2D

ySi2

HoS

i2YS

i1.7

YbSi

(?)

HfS

iZr

Si2

CrS

i2Ta

Si2

NbS

i2VS

i2

MnS

i

MoS

i2W

Si2

Ni2

SiN

iSi2

MnS

i1.7

FeSi

2C

oSi

Pd2S

iR

u2Si

3R

hSi

ReS

i2 OsS

i1.8

Ir2Si

3Pt

2Si IrS

iIrS

i3

ErSi

2

PtSi

NiS

i

TiSi

2 CoS

i2

0.3

0.4

0.5

0.6

0.7

0.8

0.9

1.0

1.1

Barr

ier H

eigh

t on

n-ty

pe S

i (eV

)

conventionalCMOS

PMOSNMOS

Future CMOS devices will lose 20% of their power in the contacts.New materials for low-barrier contacts are crucial to reduce power.

Page 31: Metrology of Silicide Contacts for Future CMOS

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PtSi film properties:TEM, RBS, AFM

Silicon

600°C0.8 nm rms

PtSi formed by• Si substrate preclean• Pt sputtering (PVD)• Thermal annealing• Selective etch

101

102

103

104

105

200 250 300 350 400 450 500

experimentalsimulated

Bac

ksca

ttere

d Yi

eld

Channel No.

Si

Ar

substrate

Pt

Si(PtSi)

RBS600°C anneal380 Å PtSi

Page 32: Metrology of Silicide Contacts for Future CMOS

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X-ray reflectivity (XRR) of as-deposited Pt on Si

Complex graded-density model:PtO-Pt-Pt2Si-PtSi-SiAll densities fixed except Pt.Excellent fit at all angles.

Reaction of Pt with Si already started without anneal.

Perhaps amorphous Pt/Si interfacial layer

Effective Pt thickness: 177 Å(normalized to Pt density of 21.7 g/cm3)

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PtSi phase diagram and transformation

0 10 20 30 40 50 60

Sputter Time (min)

Pt

OSi in Pt

2Si

Pt Metal

Pt in Pt2Si

Si

0 10 20 30 40 50 60

Aug

er P

eak

Am

plitu

de

Sputter Time (min)

Pt

OSi in Pt

2Si

Pt Metal

As deposited 300°C

0 10 20 30 40 50 60

Sputter Time (min)

Pt

Si

O

Si in PtSi

Pt in PtSi

SiSi in Pt

2Si

3?

0 10 20 30 40 50 60

Sputter Time (min)

Pt

Si

O

Si in PtSi

Pt in PtSi

SiSi in Pt

2Si

3?

550C, 30s RTA in N2600C, 30s RTA in O2/N2Intermediate T 600°C

PtSi

Pt2SiPt

Page 34: Metrology of Silicide Contacts for Future CMOS

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PtSi phase transformation by XRD

20 30 40 50 60101

102

103

104

105

X-ra

y co

unts

2-theta

Si (200)

c-Pt(111)

t-Pt2Si(202)

t-Pt12Si5(231)

20 30 40 50 60101

102

103

104

X-ra

y co

unts

2-theta

Si (200)

t-Pt2Si(101)

t-Pt2Si(002)

t-Pt2Si(101)

t-Pt2Si(202)

t-Pt2Si(112)

20 30 40 50 60101

102

103

X-ra

y co

unts

2-theta

Si (2

00)

(110

) (101

)

(020

)(2

00) (211

)(1

21)

(220

)

(310

)(0

02)

(130

)

(112

)

(231

)

(022

)(2

02)

20 30 40 50 60101

102

103

X-ra

y co

unts

2-thetaS

i (20

0)

(110

)

(101

)

(020

)(2

00) (211

)(1

21)

(220

)

(310

)(0

02)

(130

)

(112

)

(231

)

(022

)(2

02)

As deposited:Cubic Pt

300°Ct-Pt2Si

Intermediate T: o-PtSi 600°C: o-PtSi

Page 35: Metrology of Silicide Contacts for Future CMOS

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PtSi surface orientations

LDA structure calculations indicate many different surface orientations with similar surface energies (Niranjan, Demkov, Kleinman, PRB 73 & 75).

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Optical properties of Pt

Platinum

Energy (eV)1 2 3 4 5 6

epsi

lon

-40

-20

0

20

40

60

80

100

Ley et al.Lynch and Hunterthis work

ε1

ε2

Stefan Zollner, phys. status solidi (a) 177, R7 (2000).

Penetration depth: 100 to 150 Å

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Optical properties of Pt, Pt2Si, and PtSi

T. Stark et al.Thin Solid Films 358, 73 (2000).

• Drude tail for Pt (diverges at E=0).• Weaker divergence plus peak near 4 eV for Pt2Si.

• Weak absorption plus peak near 3.2 eV for PtSi.

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PtSi phase transformation by ellipsometry

PtSiDrude

divergence

Photon Energy (eV)0.0 1.0 2.0 3.0 4.0 5.0 6.0 7.0

<n> <k>

1.5

2.0

2.5

3.0

3.5

4.0

1.5

2.0

2.5

3.0

3.5

4.0

4.5Exp <n>-E 65°Exp <n>-E 70°Exp <n>-E 75°Exp <k>-E 65°Exp <k>-E 70°Exp <k>-E 75°

PtSiDrude

divergence

Photon Energy (eV)0.0 1.0 2.0 3.0 4.0 5.0 6.0 7.0

<n> <k>

1.5

2.0

2.5

3.0

3.5

4.0

1.5

2.0

2.5

3.0

3.5

4.0

4.5Exp <n>-E 65°Exp <n>-E 70°Exp <n>-E 75°Exp <k>-E 65°Exp <k>-E 70°Exp <k>-E 75°

Photon Energy (eV)0.0 1.0 2.0 3.0 4.0 5.0 6.0 7.0

<n> <k>

0

2

4

6

8

10

1.0

2.0

3.0

4.0

5.0

6.0

7.0Model Fit Exp <n>-E 65°Exp <n>-E 70°Exp <n>-E 75°Model Fit Exp <k>-E 65°Exp <k>-E 70°Exp <k>-E 75°

Siliconcritical points

Drudedivergence

Photon Energy (eV)0.0 1.0 2.0 3.0 4.0 5.0 6.0 7.0

<n> <k>

0

2

4

6

8

10

1.0

2.0

3.0

4.0

5.0

6.0

7.0Model Fit Exp <n>-E 65°Exp <n>-E 70°Exp <n>-E 75°Model Fit Exp <k>-E 65°Exp <k>-E 70°Exp <k>-E 75°

Siliconcritical points

Drudedivergence

Photon Energy (eV)0.0 1.0 2.0 3.0 4.0 5.0 6.0 7.0

<n> <k>

1.0

2.0

3.0

4.0

5.0

1.0

2.0

3.0

4.0

5.0

6.0

Exp <n>-E 65°Exp <n>-E 70°Exp <n>-E 75°Exp <k>-E 65°Exp <k>-E 70°Exp <k>-E 75°

Drudedivergence

Pt2Si

Photon Energy (eV)0.0 1.0 2.0 3.0 4.0 5.0 6.0 7.0

<n> <k>

1.0

2.0

3.0

4.0

5.0

1.0

2.0

3.0

4.0

5.0

6.0

Exp <n>-E 65°Exp <n>-E 70°Exp <n>-E 75°Exp <k>-E 65°Exp <k>-E 70°Exp <k>-E 75°

Drudedivergence

Pt2Si

As dep.No anneal

300°C

Photon Energy (eV)0.0 1.0 2.0 3.0 4.0 5.0 6.0 7.0

<n> <k>

1.5

2.0

2.5

3.0

3.5

4.0

1.5

2.0

2.5

3.0

3.5

4.0

4.5

Exp <n>-E 65°Exp <n>-E 70°Exp <n>-E 75°Exp <k>-E 65°Exp <k>-E 70°Exp <k>-E 75°

PtSi ???

Photon Energy (eV)0.0 1.0 2.0 3.0 4.0 5.0 6.0 7.0

<n> <k>

1.5

2.0

2.5

3.0

3.5

4.0

1.5

2.0

2.5

3.0

3.5

4.0

4.5

Exp <n>-E 65°Exp <n>-E 70°Exp <n>-E 75°Exp <k>-E 65°Exp <k>-E 70°Exp <k>-E 75°

PtSi ???

600°C

Intermediatetemperature

Partially filled d-states

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Summary: Silicide NanowiresModern CMOS devices need low-resistance current electrode

contacts (between silicon transistor and metal interconnects)• PtSi for PMOS• Rare earth silicides (ErSi1.7) for NMOS• Fermi level of silicide should be aligned with the conduction and valence

bands of silicon, respectively.

Much silicide on THICK films was carried out many years ago.

Thin silicide films and narrow lines behave differently.• Surface preparation (atomically clean, preamorphized, etc.)• Bulk energy versus surface energy

• Agglomeration• Crystal structure, texture• Measurement techniques, modeling using ab initio theory.

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