memory management design & implementation segmentation chapter 4

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Memory Management Design & Implementation Segmentation Chapter 4

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Page 1: Memory Management Design & Implementation Segmentation Chapter 4

Memory ManagementDesign & Implementation

Segmentation

Chapter 4

Page 2: Memory Management Design & Implementation Segmentation Chapter 4

Design & implementation issues

• Thrashing– A process is thrashing if it spending more time

paging than executing.

• Global vs. local page frame allocation• Page size• Separate instruction & data spaces• Page sharing• Paging daemon

Page 3: Memory Management Design & Implementation Segmentation Chapter 4

Why thrashing occurs• When CPU utilization is low, the OS

increases the degree of multiprogramming.• If some process enters a new phase and

needs more frames, these frames may be taken away from other processes– These other processes then begin to create page

faults

• As the processes wait for paging devices, CPU utilization decreases, so more processes are added…

Page 4: Memory Management Design & Implementation Segmentation Chapter 4

How to stop thrashing

• Decrease the degree of multiprogramming by suspending some processes and writing their pages out to storage, thus freeing up some frames.

• Use a local page-replacement algorithm. – Then, if one process starts thrashing, it cannot

take away pages from another process and cause that process to thrash also.

• Use a working set algorithm

Page 5: Memory Management Design & Implementation Segmentation Chapter 4

Global vs Local Allocation

• Global replacement schemes allow a process to select a replacement frame from the set of all frames, even if that frame has been allocated to another process.– Thrashing is a common side effect

• Local replacement requires that each process select from its own set of allocated frames.– The number of frames allocated to a process is

fixed.

Page 6: Memory Management Design & Implementation Segmentation Chapter 4

Page Size

• Advantages of small page size– less internal fragmentation – better fit for various data structures, code

sections– less unused program in memory

• Disadvantages– programs need many pages, larger page

tables

Page 7: Memory Management Design & Implementation Segmentation Chapter 4

Separate Instruction and Data Spaces

One address space Separate I and D spaces

Separate page tables

Page 8: Memory Management Design & Implementation Segmentation Chapter 4

Sharing Pages

• Two processes can share code– Best to have only one copy of the code in

main memory

• If instructions and data have separate page tables, it is easy to share only those pages with instructions

Page 9: Memory Management Design & Implementation Segmentation Chapter 4

Sharing Pages

Two processes share a program bysharing its instruction page table

P1

P2

Page 10: Memory Management Design & Implementation Segmentation Chapter 4

Paging daemon• Periodically inspects the state of memory

– If too few frames are free, it uses the page replacement algorithm to select pages to evict

• It may also maintain a list of modified pages.– Whenever the paging device is idle, the paging daemon

may select a modified page and writes it out to the disk. It then sets the modified bit back to 0.

– This increases the probability that a page will be clean when it is selected for replacement

Page 11: Memory Management Design & Implementation Segmentation Chapter 4

Segmentation

• When we write a structured program, we create a main function and other functions.– Each of these functions is a code segment of

variable length

• Locations within a segment are offset from the beginning of the segment

• Segmentation is a memory-management scheme that supports this user’s view of memory

Page 12: Memory Management Design & Implementation Segmentation Chapter 4

Segments

• The logical & physical address spaces store each segment as a unit. – Each segment has a name and a length– Addresses specify the segment and the offset

• The user specifies addresses in terms of segment name and offset– Compare this with paging, where and the

hardware divides the process into pages

Page 13: Memory Management Design & Implementation Segmentation Chapter 4

Hardware requirements for segmentation

• To map the logical to the physical address we need a segment table

• Each entry in the segment table has a segment base and a segment limit– The segment base contains the starting

physical address of the segment– The segment limit specifies the length of the

segment

Page 14: Memory Management Design & Implementation Segmentation Chapter 4

Advantages of segmentation• Protection can be assigned per segment

• Code segments can be defined as read-only or execute only

• Arrays can be placed in their own segment. This means that the hardware will check for attempts to stray outside array boundaries (by using illegal indexes)

Page 15: Memory Management Design & Implementation Segmentation Chapter 4

Paging, segmentation & fragmentation

• Paging – eliminates external fragmentation

• pages & frames are fixed sizes / a page is 2k bytes

– a small amount of internal fragmentation is introduced

• Segmentation– segments are of variable length, so external

fragmentation is still a problem – swapping is more difficult

Page 16: Memory Management Design & Implementation Segmentation Chapter 4

Comparing paging and segmentation