main (4)

1

PresentatiPresentation by:on by:

SHISHIRASHISHIRA11stst sem MTech sem MTech

CET DIGITAL SIGNAL PROCESSING

OVERVIEW OF THE PRESENTATON

2

• Introduction

• RICA architecture overview

• Features

• System architecture

• System design environment

• System assessment

• Advantages

• Conclusion

CET DIGITAL SAL PROCESSING

INTRODUCTIONSDR is a radio wherein the radio’s physical layer behaviour is primarily defined in software.

It is a radio wherein the operating parameters of frequency range, modulation type or maximum output power can be altered by making changes to software.

3


BLOCK DIAGRAM OF SDR TRANSMITTER

4


5

BLOCK DIAGRAM OF SDR RECEIVER


6

• SDR is one of the most important topics in the area of mobile and personal communications.

• SDR promises mobile communication technology a major increase in flexibility, capability and durability.

• As communication standards are moving forward more complex algorithms and management schemes are being introduced and they consume much more power than the older versions.


7

RICA ARCHITECTURE OVERVIEW

RICA core design high level flowCET DIGITAL SIGNAL PROCESSING

8

FEATURES

•RICA uses eclipse C IDE as the development tool, hence provides the programmers to map applications.

• ARM controller is also programmed in C.

• Accelerates development speed and reduces cost.

• Both RICA core and ARM core are 32 bit architectures.


9

Hardware architecture diagram

SYSTEM ARCHITECTURE


10

SYSTEM DESIGN ENVIRONMENT

The design flow consists of two main steps:

ARM development suit (ADS)

RICA Eclipse C IDE.


11

SYSTEM ASSESMENT OFDM physical layer has been mapped into this

proposed system.

The system works in full duplex mode.

Data frames are fed into the individual RICA processors following a frame segmentation method.


12

ADVANTAGES

Maintainability enhanced. Flexibility, capability and durability. High receiver and transmitter throughput. Low power compared to other programmable

applications. Easy programming model from high level C.


13

CONCLUSION

Higher transmitter and receiver throughput with lower frequency is achieved.

Heterogeneous architecture targeting mobile SDR has been proposed.

The hardware platform is composed of an ARM controller and several Reconfigurable Instruction Cells based array processors.


14CET DIGITAL SIGNAL PROCESSING

15CET DIGITAL SIGNAL PROCESSING

main (4)

Education

proposed system

features rica

mobile sdr

introduction sdr

heterogeneous architecture

arm core

individual rica processors

design flow