machxo™ mini development kit - farnell element14 · 2014-01-31 · 3 machxo mini development kit...
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March 2009Revision: EB41_01.0
MachXO™ Mini Development Kit
User’s Guide
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MachXO Mini Development KitLattice Semiconductor User’s Guide
Introduction
Thank you for choosing the Lattice Semiconductor MachXO Mini Development Kit!
This user’s guide describes how to start using the MachXO Mini Development Kit, an easy-to-use platform for eval-uating and designing with MachXO PLDs. Along with the evaluation board and accessories, this kit includes a pre-loaded Mini System-on-Chip (SoC) demonstration design based on the LatticeMico8™ microcontroller.
Note: Static electricity can severely shorten the life span of electronic components. See the MachXO Mini Develop-ment Kit QuickSTART Guide for handling and storage tips.
Features
The MachXO Mini Development Kit includes:
•
MachXO Mini Evaluation Board
– The Mini board is a small board (about the size of a business card) with the following on-board components and circuits:
– MachXO LCMXO2280C-4TN144C– 2-Mbit SPI Flash memory– 1-Mbit SRAM– I
2
C temperature sensor– USB connectors (JTAG, RS-232)– 2x16 expansion header for general I/O, I
2
C, and SPI– Push-buttons for sleep mode and global set/reset– 4-bit DIP switch – DAC/ADC circuit– MachXO Sleep Mode circuit– Eight status LEDs
•
Pre-loaded Reference Designs and Demos
– The kit includes a pre-loaded demo design (Mini SoC) that inte-grates several Lattice reference designs including the LatticeMico8 microcontroller, SRAM controller, I
2
C control-ler, SPI Flash memory controller, and a UART peripheral. Firmware supports a temperature monitor demo and, when connected to a host PC, allows you to use a terminal program to use advanced demonstrations.
•
Two USB Connector Cables
– The Mini board is powered from the mini B USB port (DEBUG) when connected to a host PC. The DEBUG port provides a general communication and debug port via a USB-to-RS-232 physical channel. A second USB channel (PROG) provides a programming interface to the MachXO JTAG port.
•
QuickSTART Guide
– Provides information on connecting the Mini board, installing Windows hardware drivers, and running the basic temperature monitor demo.
•
MachXO Mini Development Kit Web Page
— The MachXO Mini Development Kit web page on the Lattice web site provides access to the latest documentation, demo designs and drivers for the kit.
The contents of this user’s guide include demo operation, top-level functional descriptions of the various portions ofthe evaluation board, descriptions of the on-board connectors, switches and a complete set of schematics of theMini board.
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Figure 1. MachXO Mini Evaluation Board, Top Side
MachXO Device
This board features a MachXO PLD with a 3.3V core supply. It can accommodate all pin-compatible MachXOdevices in the 144-pin TQFP (20x20 mm) package. A complete description of this device can be found in theMachXO Family Data Sheet.
Note: The connections referenced in this document refer to the LCMXO2280C-4TN144C device. Available I/Os andassociated sysIO™ banks may differ for other densities within this device family. However, only the LCMXO2280C-4TN144C device offers full functional use of the entire evaluation board.
Demonstration Designs
Lattice provides three demos that illustrate key applications of the MachXO device:
•
Mini SoC
– Illustrates use of the LatticeMico8 microcontroller, firmware, and peripherals (UART communication, SPI Flash memory controller, SRAM controller, and I
2
C peripheral controller). The Mini SoC demo design is pre-programmed into the MachXO Mini Evaluation Board by Lattice.
•
MachXO Sleep Mode
– Shows application of an external “sleep circuit” to cycle the low-power, sleep mode input of the MachXO PLD.
•
TransFR
– Shows the Lattice transparent field reconfiguration (TransFR™) technology with the MachXO.
Note: It is very likely that you will obtain your Mini board after it has been reprogrammed. To restore the factorydefault demo or program it with other Lattice-supplied examples see the Download Demo Designs and Program-ming Demo Designs with ispVM™ sections of this document.
Mini SoC Demo
The Mini SoC demo is pre-programmed into the non-volatile Flash memory of the MachXO PLD and is operationalupon power-up. The design provides the following features:
• Reads the on-board I
2
C temperature sensor and displays real-time results as a level meter onto the LED bank (D0-D7).
• Logs temperature measurements into the on-board SRAM or non-volatile SPI Flash Memory.
Header
S2 Push-button
Power LED LEDs
S1 Push-button
I2C Temperature Sensor
Program USB
Debug USB
DIP Switch Bank
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• Displays current temperature and the most recent transaction results of the Mini board onto a host PC running a terminal program.
The demo design integrates the following Lattice reference designs:
• LatticeMico8 Microcontroller (RD1026)
• WISHBONE UART (RD1042)
• SPI WISHBONE Controller (RD1044)
• I
2
C Master with WISHBONE Bus Interface (RD1046)
• LatticeMico8 to WISHBONE Interface Adapter (RD1043)
Firmware running on the LatticeMico8 demonstrates control logic for the peripherals connected to a shared on-chipWISHBONE bus and communication between the Mini board and a host PC connected to the USB-to-RS232debugging path.
Figure 2. Mini SoC Block Diagram
Download Windows Hardware Drivers
Before you begin, you will need to obtain the necessary hardware drivers for Windows from the Lattice web site.
To download Windows Hardware Drivers:
1. From the MachXO Mini Development Kit web page, locate the hardware device drivers for the RS-232/USB debug interface.
2. Download the ZIP file to your system and unzip it to a location on your PC.
Linux Support:
The debug interface drivers for the evaluation board are included in Linux kernel 2.4.20 or greater including distri-butions compatible with ispLEVER
®
7.2 SP1 (Red Hat Enterprise v3, v4 or Novell SUSE Enterprise V10).
Download and Program the Mini SoC Demo Design
The Mini SoC Demo is preprogrammed into the Mini board, however over time it is likely that your board will bemodified.
MachXO Mini Evaluation Board
LED Bank
UART
I2C Master
I2C SPI SRAM
RS-232/USB
JTAG/USB
PC Host
SPI MemoryController
SRAM MemoryController
I2C TemperatureSensor
SPI 2-MbitFlash Memory
SRAM 1-MbitMemory
LatticeMico8
WISHBONE Bus
Switch Bank
MachXO PLD
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To download the Mini SoC Demo source files and reprogram the Mini board:
1. See the Download Demo Designs and Programming Demo Designs with ispVM sections of this document.
2. Use
.\Demo_MachXO_Mini_SoC\project\mini_soc_demo.jed
to restore the Mini SoC demo design.
Connect to the MachXO Mini Evaluation Board
Use the USB cables provided to connect the evaluation board to your PC:
1. Connect one USB cable from a USB port on your PC to the board’s RS-232/USB Debug socket (DEBUG-J8) on the top-left side of the board as shown in Figure 2. After connection is made, a blue Power LED (PWR) will light up indicating the board is powered on.
2. If you are prompted, “Windows may connect to Windows Update” select
No, not this time
from the available options and click
Next
to proceed with the installation. Choose the
Install from specific location (Advanced)
option and click
Next
.
3. Select
Search for the best driver in these locations
and click the
Browse
button to browse to the Windows driver folder that has been created (see the Download Windows Hardware Drivers section of this document). Select the
CDM 2.04.06 WHQL Certified
folder and click
OK
.
4. Click
Next
. A screen will display as Windows copies the required driver files. Windows will display a message indicating that the installation was successful.
5. Click
Finish
to install the USB driver. A second “Found New Hardware” screen will appear.
6. Repeat instructions 2-4 to install the USB-to-Serial Port driver.
Setup Windows HyperTerminal
Windows HyperTerminal is a terminal program found on most PCs that can be used to communicate with the Miniboard.
To set up Windows HyperTerminal:
1. From the
Start
menu, select
Control Panel > System
. The System Properties dialog appears.
2. Select the
Hardware
tab and click
Device Manager
. The Device Manager dialog appears.
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3. Expand the
Ports (COM & LPT)
entry and note the COM port number for the
USB Serial Port
.
4. From the
Start
menu, select
Programs > Accessories > Communications > HyperTerminal
. The HyperTer-minal application and a Connection Description dialog appear.
5. Specify a Name and Icon for the new connection. Click
OK
. The Connect To dialog appears.
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6. Select the
COM
port identified in Step 3 from the
Connect using:
list. Click
OK
. The COM
n
Properties dialog appears where
n
is the COM port selected from the list.
7. Select the following Port Settings.
Bits per second:
1115200
Data bits:
8
Parity:
None
Stop bits:
1
Flow control:
None
Click
OK
. The HyperTerminal window appears.
8. From the Mini board, press the
S1
push-button (Reset). The Mini SoC demo Main Menu appears in HyperTer-minal.
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=========================================================================Welcome to the MachXO Mini Evaluation BoardMini SoC Demonstration Rev 1.0, February 2009
Main Menu------------------------------------------------------------ 0: Re-display Main Menu 1: Read SPI Flash Memory IDCode 2: Read I2C Temperature Sensor 3: Read DIP Switch Bank 4: Normalize Temperature Output 5: Read Data History from SRAM 6: Copy Data History from SRAM to SPI Flash Memory 7: Read Data History from SPI Flash Memory
Press 0-7 to select an option. =========================================================================
Set Up Linux Minicom
Minicom is a terminal program found with most Linux distributions. It can be used to communicate with the Miniboard.
To setup Minicom:
1. Check active serial ports:
#dmesg | grep tty
Note the tty label assigned to the USB port.
2. From a command prompt, start Minicom:
#minicom -s
The configuration menu appears.
3. Highlight
Serial port setup
and press
Enter
. Serial port settings appear.
4. Press
A
(Serial Device). Specify the active serial device noted in Step 1 and press
Enter
.
5. Press
E
(Bps/Par/Bits). Specify
115200
,
None
,
8
and press
Enter
.
6. Press
F
(Hardware Flow Control). Specify
None
and press
Enter
.
7. Press
Esc
. The configuration menu appears.
8. Select
Save setup as dfl
. Minicom saves the port setup as the new default.
9. Select
Exit
. The Minicom interface appears.
10. From the Mini board, press the
S1
push-button (Reset). The Mini SoC demo Main Menu appears.
Scan the SPI Flash Memory IDCode
This demo uses the SPI Flash Memory Controller and UART modules of the Mini SoC to scan the memory deviceidentification code of the on-board SPI Flash Memory and display it on the terminal output. The transaction islogged to the on-board SRAM through the SRAM controller module.
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To scan the SPI Flash Memory IDCode:
1. From the terminal Main Menu, press
1
.
The ID number is returned as a hex value and the transaction is logged to the on-board SRAM and the currentaddress pointer is indicated.
Example:
ID:0x12 (SRAM ADDR:0x00010)
Note: The ID for your board may differ.
Reading the I
2
C Temperature Sensor
This demo uses the I
2
C Controller and UART modules of the Mini SoC to read the on-board I
2
C temperature sen-sor, convert the raw data to Celsius units and display it on the terminal output. The transaction is logged to the on-board SRAM through the SRAM controller module.
To monitor temperature:
1. From the terminal window press
4
. The Mini SoC normalizes the meter output for the ambient temperature and lights 4 (D0-D3) of the LED bank (D0-D7).
2. Place your finger on the on-board
I
2
C Temperature Sensor (U14)
for 2 to 5 seconds. Depending on your skin temperature, the level should influence the temperature monitor (1 LED = 0.25°C).
3. From the terminal window, press
2
. The current temperature in degrees Celsius appears and the transaction is logged to the on-board SRAM and the current address pointer is indicated.
Example:
Temp:30.50°C (SRAM ADDR:0x0000B)
Reading the DIP Switch Bank
This demo uses the UART module of the Mini SoC to read the user-input switch inputs 1-3 of the DIP Switch Bank(SW1) and output it to the terminal as a hex value. The transaction is logged to the on-board SRAM through theSRAM controller module.
Note: SW1D (Schematic Sheet 3 of 8) of SW1: SW_SPST_4 is reserved to enable/disable the on-board SleepMode circuit.
To read the DIP Switch:
1. From the terminal window press 3. The switch setting is returned as a hex value and the transaction is logged to the on-board SRAM.
Example:
SW:0x0 (SRAM ADDR:0x0000A)
Reading the Transaction Data History from On-Board SRAMThis demo uses the SRAM controller module of the Mini SoC to read the transaction history logged to on-boardSRAM during the period the Mini board has been powered.
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To read data history from SRAM:
1. From the terminal window press 5. The transaction log is listed.
Example:
SRAM: Temp:30.50°C ID:0x12 SW:0X0
Copy Data History from On-Board SRAM to SPI Flash MemoryThis demo uses both the SRAM and SPI Flash Memory controller modules of the Mini SoC to copy the transactionhistory logged to the volatile on-board SRAM to the non-volatile on-board SPI Flash Memory.
To copy data history from SRAM to SPI Flash memory:
1. From the terminal window press 6. The data log is transferred and the terminal indicates “Done”.
Example:
Done.
SPI Flash: Temp:30.50°C ID:0x12 SW:0X0
Read SPI Flash MemoryThis demo uses the SPI Flash Memory controller module of the Mini SoC to read the on-board SPI Flash Memory.To illustrate the non-volatile nature of the Flash memory, you may power-off the Mini board at any time by discon-necting both USB cables. Reattach the cables, restart the terminal application, and then perform the memory readto confirm the data is intact.
To read data history from SRAM:
1. From the terminal window press 7. The transaction log is listed.
Example:
SPI Flash: Temp:30.50°C ID:0x12 SW:0X0
Note: To clear the Flash memory, press SW1 to reset the Mini board and clear the on-board SRAM. Copy datahistory (currently cleared) from the SRAM to the Flash memory.
Re-Display the Main MenuDuring the demo session the main menu will scroll off-screen. To redisplay the menu, press 0.
You may confirm that the SPI Flash memory will retain data in a power-off condition by removing both USB cablesto power-down the Mini board. Rerun the memory read to confirm the data is intact.
While the Mini board is powered, a running log of all transactions is logged to the on-board SRAM.
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MachXO Sleep Mode DemoThe MachXO sleep mode demo illustrates one possible implementation for power savings. Using this method, theMachXO device provides supervisory logic to control its own SLEEPN pin. Periodically, the device becomes activeto monitor a trigger event. If the event is not present, it deactivates to save power.
When the SLEEPN pin is asserted (low), the following occur:
• The device powers down internally, dropping power consumption to less than 100µA
• All I/Os are tristated
When the SLEEPN pin is de-asserted (high), power is restored and the MachXO is reconfigured and ready to oper-ate in 1ms or less. Due to the dramatic reduction in power consumption and the fast “instant-on” capability, ascheme can be implemented with a few simple, inexpensive external components deactivate the device and reacti-vate with a duty cycle ratio that saves substantial power.
Figure 3. Sleep Circuit (Abbreviated)
When I/O pin 89 goes low, C60 discharges. PNP transistor Q5 then conducts, discharging C59. Provided SW1D isclosed, this value is forced onto the SLEEPN pin of the MachXO device, putting it into low power sleep mode.
Once in sleep mode, all I/O pins are tristated, allowing C60 to slowly charge. This then turns off Q5 and allows C59to charge. Once the amount of charge is sufficient to place a logic high level on SLEEPN, the device returns to nor-mal operating mode.
The MachXO begins operating, as defined by its programmed function. In this demonstration, I/O pin 89 is drivenhigh initially to allow the device an opportunity to remain active long enough to check whether switch S1 is pressed.
If S1 is not pressed, I/O pin 89 is driven low and the cycle repeats.
If S1 is pressed at that moment, the device remains operational for the entire cycle of an internal counter (~3 sec)and the LEDs are illuminated during this time. S1 is then checked after each subsequent cycle.
To exit sleep mode or to reprogram the device, open switch SW1D (SW1-4).
Download and Program the MachXO Sleep Mode Demo DesignTo download the MachXO Sleep Mode Demo source files and reprogram the Mini board:
1. See the Download Demo Designs and Programming Demo Designs with ispVM sections of this document.
2. Use .\Demo_MachXO_Mini_Sleep\project\mini_auto_sleep.jed to restore the MachXO Sleep Mode demo design.
MachXO
I/O (89)
SLEEPN (70)
R5910K
C600.33uF
Q5C5933uF
R2010K
SW1D
I/O (14)
R5610K
S1
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Operating the Sleep Mode DemoTo operate the Sleep Mode Demo:
1. To observe the sleep/wake power savings, place voltmeter leads across J2 (VCC CORE) or J3 (VCC AUX). Each number attaches across a 0.2 ohm resistor between the +3.3V supply rail and VCC_CORE or VCC_AUX. The average voltage level will drop significantly during the sleep/wake cycle. You may estimate current con-sumption with Ohm’s Law where I = V / 0.2 ohms.
2. Toggle SW1_1 (A), SW1_2 (B), and SW1_3 (C) to the OFF position. All user LEDs D7-D2 are dim and user LED D1-D0 are lit. The DIP switch inputs 1-3 are tied directly to the LED bank according to the table below.
3. Adjust DIP switches 1-3 and note the pattern on the LED array.
4. Enable the MachXO Sleep Mode circuit, toggle the SW1D (4) to the ON position. The MachXO enters a sleep/wake cycle.
According to the parameters of the external Sleep Mode circuit the MachXO will periodically wake to check foruser input and drive the LED bank. If no inputs have changed it will return to the sleep state. The LED bank willflicker during the sleep/wake cycle.
5. Depress SW1. The MachXO wakes for ~3s and the LED array is lit according the SW1 values. Once the SW1 is released the Mini board reverts to the sleep/wake cycle.
To exit sleep mode or to reprogram the device, open switch SW1D (4).
Note: Pressing push-button SW2 will assert the dedicated MachXO SLEEPN input with any design.
TransFR DemoThis demo illustrates the TransFR (TransparentFieldReconfiguration) feature of the MachXO PLD. The TransFRsolution uniquely allows logic to be updated in the field without interrupting system operation.
The demo first programs the MachXO device with a count-up function, which drives eight LEDs. It then freezesthese outputs while a count-down function is loaded into the device’s SRAM configuration space. The demo thenconcludes by releasing the outputs to display the count-down function.
The TransFR feature allows the MachXO to lock its I/Os in a deterministic state while a new configuration is loadedinto the device’s SRAM configuration space. This minimizes system interruption by dynamically configuring theMachXO with a new pattern without tri-stating its output pins.
The inputs for the incrementing and decrementing design are:
• CLK: Clock to drive the counter and internal logic
• RSTn: Resets counter to 0, asserted low.
• CNTEN: Enables counting when asserted high.
• CAP_EN: Captures the counter value on LEDs when asserted high.
• LOADn: When asserted high, enables the counter values to be displayed on LEDs. When asserted low, this input tristates the pins that drive the LEDS, and forces a synchronous load of the values captured by the CAP_EN.
SW1 LED
N/A 0, 1 (ON)
_1 (A) 2, 5
_2 (B) 3, 6
_3 (C) 4, 7
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The CLK connects directly to the oscillator on the board. The RSTn (global reset) is connected to user push-button(S1) of the Mini board. The other three inputs come from the SW1 DIP switch bank at the right hand side of the Miniboard.
The outputs of the MachXO device are as follows:
• LED_OUT[7:0]: Most significant eight bits of the counter to be displayed through eight LEDs to show the counter values in binary format.
Download the TransFR Demo DesignTo download the TransFR Demo source files, see the Download Demo Designs section of this document.
Programming the Initial Up-Counter DesignTo program the up-counter design JEDEC file:
1. Set the control signals with the Mini board SW1 DIP switches as follows:
• LOADn (SW1_1) is set to 1 (OFF)• CNTEN (SW1_2) is set to 0 (ON)• Cap_en (SW1_3) is set to 0 (ON)
2. Use ispVM to download the Mini board with the .\Demo_MachXO_Mini_TransFR_Up_Counter\project\up_count.jed file.
See the Programming Demo Designs with ispVM section of this document for details on programming the Miniboard with ispVM.
The up-counter design is first loaded into Flash then immediately into SRAM space. In doing so, the LEDs willlight up, showing the initial value of the counter (all 1s). The SRAM and Flash configuration spaces are nowboth programmed with the count-up function.
3. Toggle SW1_2 CNTEN to the OFF (1) position. The LEDs show the up-counter values.
In the following procedure you will load a down-count function into the MachXO Flash program space. After theTransFR operation is complete, the down-counter results will be displayed on LEDs.
4. Toggle SW1_2 CNTEN to the ON (0) position. Note the up-counter value.
Download the Down-Counter Design to the MachXO Flash SpaceTo program the down-counter design JEDEC file:
1. From ispVM System, choose ispTools > Scan Chain. The New Scan Configuration Setup window appears.
2. Double-click the LCMXO2280C entry in the Device List. The Device Information dialog appears.
3. From the Data File section click the Browse button. The Open Data File dialog appears.
4. Browse to the .\Demo_MachXO_Mini_TransFR_Down_Counter\project folder, select down_count.jed, and click the Open button.
5. From the Device Access Option section, choose Flash Background Mode.
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6. From the Operation section, choose: XFLASH Erase, Program, Verify, and click OK.
7. Choose Project > Download. ispVM reprograms the Mini board.
Programming requires about 20 to 40 seconds. A small timer window will appear to show elapsed program-ming time. At the end of programming, the configuration setup window should show a “PASS” in the “Status”column.
The down-counter program is now loaded into the Flash configuration space. Since the up-counter function isstill programmed into the SRAM configuration space, the count up function still appears on the LED bank. Thecount-down function will be loaded in the SRAM space when the TransFR operation is performed in the nextprocedure.
Transfer the MachXO Flash to SRAM SpaceAt this point in the demo, the down-counter function is loaded into the Flash configuration space, and the up-counter function is loaded into the SRAM space. In this section, an *.svf file is generated and used in the ispVMSVF debugger tool. The debugger tool steps through the SVF file to lock the I/Os at their current state (via TransFRtechnology), load the Flash configuration space into the SRAM space, then release the I/Os. This allows the load-ing of a new configuration without the I/Os ever having been tri-stated.
To prepare the transfer of Flash configuration contents to the SRAM space of the MachXO:
1. From ispVM System, choose ispTools > Scan Chain. The New Scan Configuration Setup window appears.
2. Double-click the LCMXO2280C entry in the Device List. The Device Information dialog appears.
3. From the Device Access Options section select Flash Background Mode.
4. From the Operation section select XFLASH TransFR.
5. Click on the Expand button.
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6. From the I/O State section, select Leave Alone. Click OK.
7. Choose File > Save As... The Save As .XCF File dialog appears.
8. Browse to the .\Demo_MachXO_Mini_TransFR_Down_Counter\project directory, specify TransFR.xcf and choose Save.
9. Choose Project > Generate SVF File... The Generate SVF File dialog appears.
10. From Source File (*.xcf) section, choose the Browse button. The Browse Source *.XCF file dialog appears.
11. Browse to the .\Demo_MachXO_Mini_TransFR_Down_Counter\project directory, choose the TransFR.xcf file and click Open.
12. From the Save SVF File as: section, choose the Browse button. The Browse SVF File dialog appears.
13. Specify TRANSFR.svf file and choose the Save button.
14. Click the Generate button. ispVM reports: Build Single SVF File: Successful.
15. Click OK and click the Close button.
You have now built the TransFR serial vector format (SVF) file that you will use in the ispVM SVF Debugger pro-gram.
To transfer the Flash configuration contents to the SRAM space of the MachXO:
1. Choose ispTools > SVF Debugger... The SVF Debugger application initial Svf File1 screen appears.
2. Choose File > Open. The Open Data File dialog appears.
3. Browse to the to the .\Demo_MachXO_Mini_TransFR_Down_Counter\project directory, choose the TransFR.svf file, and click Open. The TransFR.svf code appears in the SVF Debugger window.
4. Choose Configuration > Cable and IO Port Setup... The Cable and IO Port Setup dialog appears.
5. Click the Auto-Detect button. The SVFDebugger detects the EzUSB port and USB cable.
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6. Click OK.
7. Place the cursor at the top of the file, above the first instruction. This will ensure that you step through all the instructions in order.
8. Press the Step key F11 (Command > Step). The SVF Debugger advances to the next line of executable code.
9. Step 2-3 more times. Each time you click the STEP button, it executes an instruction, then advances to the next instruction. Each time you step through an instruction, it is translated, goes through the USB download cable, and is executed in the MachXO device.
10. Continue to slowly step through the code and stop just before getting to the instruction that reads (about Line 51):
! Shift in ISC ERASE(0x03) instructionSIR 8 TDI (03);
Note that LEDs are still counting up. Now step once while watching the displays. Note that the displays havestopped. The device outputs are now under boundary scan control. A TransFR operation (embedded in the justexecuted instruction) has locked the outputs at whatever count values they were at when the TransFR actionoccurred.
11. From the Mini board, toggle the SW1_2 CNTEN to the ON (0) position. This will stop the counter from counting once the device is out of the boundary scan mode.
12. Press F11 until the cursor highlights the BYPASS instruction:
! Shift in BYPASS(0xFF) instructionSIR 8 TDI (FF);
13. Press F11 once more. The cursor highlights:
RUNTEST IDLE...;
At this point, the new pattern has been loaded into the SRAM memory space and the switch inputs are moni-tored, but the outputs are still controlled by boundary scan and are still frozen at the same values.
14. Press F11. SVFDebugger reports “Process Done. No Error”. Click OK.
The MachXO I/Os are now released from boundary scan control and counter’s initial value (0xFF) is driven tothe LED displays. The displays do not start counting yet because the CNTEN is deasserted.
15. From the Mini board, toggle the SW1_2 CNTEN to the OFF (1) position. The LED display starts counting down from the initial value.
The MachXO has exchanged the up-counter for the down-counter function, without disrupting the output PIOs.
Another variation of the demo is to initialize the down-counter with the current state of the up-counter. After step 12in the procedure, toggle CAP_EN (SW1_3) up and down once (toggle from ‘ON’ (0) to ‘OFF’ (1) and back to ‘ON’(0)), then toggle LOADn (SW1_1) down and up once (go from ‘OFF’ (1) to ‘ON’ (0) and back to ‘OFF’ (1)). Followingstep 14, the counter value displayed on the LEDs will not change. Following Step 15, the down-counter will beginfrom the value displayed on the LED bank.
Note: See TN1087, Minimizing System Interruption During Configuration Using TransFR Technology for more infor-mation.
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Download Demo DesignsLattice distributes source and programming files for a variety of demonstration designs compatible with the Miniboard.
To download demo designs:
1. Browse to the MachXO Mini Development Kit web page of the Lattice web site. Select the Demo Applications download and save the file.
2. Extract the contents of MachXO_Mini_Dev_Kit.zip to an accessible location on your hard drive. Four demo design directories (Demo_MachXO_Mini_<demo>) are unpacked.
Where:
• \project – ispLEVER project (.syn), preferences (.lpf), and programming file (.jed). This directory may contain intermediate results of the ispLEVER build process.
• \source – HDL source for the ispLEVER project.
• .\LatticeMico8_V3_0_Verilog – LatticeMico8 Microcontroller Reference Design (RD1026).
• .\RDxxxx – Reference Designs integrated by the Mini SoC Demo.
Programming Demo Designs with ispVMThe Mini SoC demo design is pre-programmed into the Mini board by Lattice. To restore a Mini board to factory set-tings or load an alternative demo design, use the procedure described in this section.
To program a demo programming file:
1. Connect the Mini board to a host PC using both USB DEBUG and PROG ports.
2. From the Mini board toggle SW1D to the OFF position.
Demo Directories
Mini SoC Demo Demo_MachXO_Mini_SoC .\project .\source .\LatticeMico8_V3_0_Verilog .\RD1042 .\project .\source .\RD1043 .\project .\source .\RD1044 .\project .\source .\RD1046 .\project .\source
MachXO Sleep Mode Demo_MachXO_Mini_Sleep .\project .\source
TransFR Demo_MachXO_Mini_TransFR_Down_counter .\project .\sourceDemo_MachXO_Mini_TransFR_Up_counter .\project .\source
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MachXO Mini Development KitLattice Semiconductor User’s Guide
3. From the Start menu run ispVM System. ispVM appears.
4. Choose Options > Cable and IO Port Setup... The Cable and I/O Port Setup dialog appears.
5. Click Auto Detect. ispVM will detect Cable Type USB and Port Setting EzUSB.
6. Click OK.
7. Choose ispTools > Scan Chain. The New Scan Configuration Setup window appears. The LCMXO2280C appears in the device list.
8. Right-click the LCMXO2280C entry and choose Edit Device... The Device Information dialog appears.
9. From the Data File section, click the Browse button. The Open Data File dialog appears.
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MachXO Mini Development KitLattice Semiconductor User’s Guide
10. Browse to the <Demo Dir>\project folder, select <Demo>.jed, and click Open. From the Operation list choose Flash Erase, Program, Verify and click OK.
11. Choose Project > Download. ispVM reprograms the Mini Board.
Programming requires about 20-40 seconds. A small timer window will appear to show elapsed programmingtime. At the end of programming, the configuration setup window should show a “PASS” in the “Status” column.
Rebuilding a Demo Project with ispLEVERUse the procedure described below to rebuild any of the demo projects for the MachXO Mini Evaluation Board.
1. Install and license ispLEVER software
2. Install and license ispVM System software.
3. Download the demo source files from the MachXO Mini Development Kit web page.
4. Run the ispLEVER Project Navigator.
5. Create a new project and add the HDL files from the <demo>\source directory. Note that some demos provide a <demo>.syn project file.
6. Import the logical preference file (<demo>.lpf) with I/O plan and timing requirements.
7. Run the Generate Data File (JEDEC) process.
8. See the MachXO Sleep Mode Demo section of this document for details on downloading a programming file to the Mini board.
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MachXO Mini Development KitLattice Semiconductor User’s Guide
Reassembling the Demo LatticeMico8 FirmwareUse this procedure to reassemble and download changes to the LatticeMico8 microcontroller firmware.
1. Install the LatticeMico8 Tool Code Revision 3.0.
Note: The LatticeMico8 tool executables are also provided in the . \Demo_MachXO_Mini_SoC\LatticeMico8_V3_0_Verilog\utils directory.
2. Optional Compile the LatticeMico8 Assembler and Simulator
3. Modify the Assembly source (.s) file and recompile to a memory image (.hex). Source for the Mini SoC demo is provided as mini_soc_demo.s.
4. Use the Memory Initialization tool of the ispLEVER Project Navigator to update the physical database NCD.
5. Rerun Generate Data File (JEDEC) process.
6. See the Programming Demo Designs with ispVM section of this document for details on downloading a pro-gramming file to the Mini board.
MachXO Mini Evaluation BoardThis section describes the features of the MachXO Mini Evaluation Board in detail.
OverviewThe Mini board is a complete USB-powered development platform for the Lattice MachXO PLD. The board includeson-board SRAM and SPI Flash memory, I2C and SPI microcontroller communication interfaces, a USB pro-gram/debug port, and an expansion header to support test connections.
Figure 4. MachXO Mini Evaluation Board Block Diagram
MachXOLCMXO2280C-4TN144C
2x16Header
I2C Temp.Sensor
SPI 2 MbitFlash
SPI
I2C/SMBus
1 MbitSRAM
Push-button
Push-button
8 LEDs
4-Bit DIP Switch
25 MHzCrystal
ADC/DACCircuit
SleepCircuit
A/Mini-BUSB Cable
USBController
JTAGProgramming
28
4
3
30
USB to Serial(RS-232)
USB Mini-BSocket
A/Mini-BUSB Cable
SerialDebugging
3
2
8
4
16 GPIO
SLEEPN
GSRN/IO
USB Mini-BSocket
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MachXO Mini Development KitLattice Semiconductor User’s Guide
Table 1 describes the components on the board and the interfaces it supports.
Table 1. MachXO Mini Evaluation Board Components and Interfaces
SubsystemsThis section describes the principle subsystems for the Mini board in alphabetical order.
Clock SourcesThree clock sources are available to the MachXO, an unconditioned input from a 25MHz crystal or a 48MHz origi-nating from the FTDI USB Device controller.
Table 2. Clock Sources Pin Information
Component/Interface Type Schematic Reference Description
Circuits
USB Controller Circuit U3:CY7C68013A-QFN56 USB-to-JTAG interface
USB to Serial (RS-232) Circuit U1:FT232R / 32-QFN USB-to-Serial interface
Components
25 MHz Crystal Clock X2:25 MHz MachXO clock source
1Mbit SRAM Memory U8:CY128X8TSOP 1Mb of SRAM
MachXO PLD PLD U16:MachXO_2280_TQ144 LCMXO2280T144
I2C Temperature Sensor I/O U14:TMP101 Measures board temperature
2Mbit SPI Flash Memory Memory U11 2Mb FLASH memory
8 LEDs Output D7-D0 User-definable LEDs
Interfaces
2x16 Header I/O J6 User-definable I/O
USB Mini B Sockets I/O J1, J8 Programming and debug interface
Push-button switches I/O S1, S2 GSR and Sleep push buttons
Jumper I/O J2 MachXO Core current
Jumper I/O J3 MachXO AUX current
Jumper I/O J4 MachXO I/O current
Jumper I/O J5 MachXO TSALL input
SourceFrequency
(MHz) DescriptionMachXO
Pin
FTDI USB Device U1 48 Available only when DEBUG connector J8 is connected to a USB host. 124
Cypress USB Device U3 48 Available only when PROG connector J1 is connected to a USB host. 127
Crystal X2 25 Crystal 25MHz. See Figure 5 for MachXO logic required for the X2 con-nection. 23, 22
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MachXO Mini Development KitLattice Semiconductor User’s Guide
Figure 5. MachXO Logic for Crystal X2 Connection
DIP SwitchThe evaluation board includes a 4-bit input toggle switch located on the right side of the board. Three are availableas general purpose inputs. When in the ON position, a connection to ground is made for a logical low input to thecorresponding MachXO pin. When open, the line is pulled high through external resistors.
Table 3. DIP Switch Reference
Table 4. DIP Switch Pin Information
Expansion HeaderThe expansion header provides 25 user I/Os connected to the MachXO, five for the on-board SPI bus, and three forthe on-board I2C/SMBus. The remaining pins serve as power and clock supplies for expansion boards. The expan-sion connector is configured as one 2x16 100mil centered pin header.
Eight pins of the MachXO top bank (which provides PCI clamp support) and eight pins of the left or right bank (dif-ferential output support) are connected to the connector.
Table 5. Expansion Connector Reference
Item Description
Reference Designators SW1
Part Number 219-4MST
Manufacturer CTS
Web Site www.ctscorp.com
SW1 Description MachXO Pin
A/1 User-defined. 92
B/2 User-defined. 91
C/3 User-defined. 90
D/4 Connected to MachXO sleep circuit. 70
Item Description
Reference Designators J6
Part Number 90131-0800
Manufacturer Molex/Waldom Electronics
Web Site www.molex.com
Pin 22LVCMOS33 Output
Pin 23LVCMOS33 Input
Internal Pullup Disabled
Crystal + RCNetwork
MachXO
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MachXO Mini Development KitLattice Semiconductor User’s Guide
I2C Temperature SensorThe temperature sensor is a TI TMP101NA/250 device. It uses an I2C/SMBus interface to provide the temperaturereading on the board. The temperature sensor is located in the lower-right corner of the board.
Table 7. I2C Temperature Sensor Reference
Table 6. Expansion Header Pin Information
J6 Pin Function MachXO Pin Other Connections Notes
1 +3.3V —
2 +3.3V —
3 8 80
4 0 119
5 9 78
6 1 116
7 10 79
8 2 114
9 11 76
10 3 113
11 12 77
12 4 112
13 13 74
14 5 111
15 14 75
16 6 110
17 15 73
18 7 109
19 I2C Alert 120 Temp Sensor U14 2.2K external pull-up.
20 Clock 127 48MHz clock from Cypress USB device.
21 I2C Data 122 Temp Sensor U14 2.2K external pull-up.
22 SPI Chip Select 87 SPI CS signal for expansion header.
23 I2C Clock 121 Temp Sensor U14 2.2K external pull-up.
24 SPI Clock 85 SPI Flash U11 Shared SPI Interface.
25 Reserved
26 SPI Data Output 81 SPI Flash U11 Shared SPI Interface.
27 Reserved
28 SPI Data Input 84 SPI Flash U11 Shared SPI Interface.
29 GND —
30 GND —
31 Analog Input — Comparator U15
32 PWM Output — Transistor Q3 Output as high as 5V1.
1. MachXO I/O pins are not 5V tolerant. This signal should not be connected to any MachXO pins.
Item Description
Reference Designators U14
Part Number TMP101NA/250
Manufacturer TI
Web Site www.ti.com
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MachXO Mini Development KitLattice Semiconductor User’s Guide
Table 8. I2C Temperature Sensor Pin Information
JTAG Programming Interface A USB B-type mini socket on the board serves as the JTAG programming interface.
For JTAG programming, a preprogrammed Cypress CY7C68013A USB peripheral controller, and boot PROM areprovided on the Mini board to serve as the programming interface to the MachXO PLD. Programming requires theispVM System software. The programming connection will appear to the ispVM System software as if a regularUSB-based ispDOWNLOAD cable is connected to the PC.
Table 9. JTAG Programming Reference
Table 10. JTAG Programming Pin Information
JumpersOne jumper is provided on the right side of the board for general use. When a jumper is installed, a connection toground is made. When the jumper is removed, the line is pulled high through an external resistor.
Table 11. Jumper Reference
Table 12. Jumper Pin Information
Function Direction U14 Pin Description MachXO Pin
SCL I/O 1 Pulled high through 2.2K resistor pack RN2. 121
SDA I/O 6 Pulled high through 2.2K resistor pack RN2. 122
ALERT O 3 Pulled high through 2.2K resistor pack RN2. 120
ADD0 I 5 Hard-wired high. —
Item Description
Reference Designators U2
Part Number CY7C68013A-56LFXC
Manufacturer Cypress
Web Site www.cypress.com
Signal Name Description MachXO Pin
XO_TDO Test Data Output 47
XO_TDI Test Data Input 51
XO_TMS Test Mode Select 39
XO_TCK Test Clock 42
Item Description
Reference Designators J5
Part Number Jumpers Red 1x2
Manufacturer Tyco Electronics AMP
Web Site www.tycoelectronics.com
Item Notes MachXO Pins
J5 MachXO TSALL pin, can also be used as general-purpose I/O. 24
J4 VCCIO current 135, 117, 98, 82, 38, 63, 10, 26
J3 VCCAUX current 53, 128
J2 VCCCORE current 21, 52, 93, 129
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MachXO Mini Development KitLattice Semiconductor User’s Guide
MachXO PLDThe MachXO PLD device (LCMXO2280C-4TN144C) on the board provides 2280 LUTs, 7.5 Kbits of distributedRAM, 27.6 Kbits of EBR SRAM and 101 user I/Os in an 8x8 mm chip scale package.
Table 13. MachXO PLD Reference
Power SupplyA single 3.3V supply voltage for the board components is provided from the USB DEBUG connection.
Push-buttonsThe board has two user push-button switches (S1 and S2). S1 connects to the GSRN pin which asserts the GlobalSet/Reset input on the MachXO. In order for the GSR to operate, it is necessary to instantiate the GSR macro inthe VHDL/Verilog HDL source, otherwise it may be used as a general input pin. S2 is routed to the SLEEPN pinwhich asserts the MachXO Sleep Mode. Both push-buttons are normally pulled high, and when pressed areasserted to ground.
Table 14. Push-button Reference
Table 15. Push-button Pin Information
RS-232 InterfaceFor serial communications and on-chip debugging a FTDI USB-RS232 converter provides an RS-232-like serialcommunication interface between a PC host and an embedded system running in the MachXO.
Table 16. RS-232 Interface Reference
Item Description
Reference Designators U1
Part Number LCMXO2280C-4TN144C
Manufacturer Lattice Semiconductor
Web Site www.latticesemi.com
Item Description
Reference Designators S1, S2
Part Number EVQ-Q2K03W
Manufacturer Panasonic ECG
Web Site www.panasonic.com/industrial/components/components.html
Button Description MachXO Pin
S1 MachXO GSRN or general-purpose I/O. 14
S2 Connected to MachXO SLEEPN pin. 70
Item Description
Reference Designators U1
Part Number FT232R
Manufacturer FTDI (Future)
Web Site www.ftdichip.com
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MachXO Mini Development KitLattice Semiconductor User’s Guide
Table 17. RS-232 Interface Pin Information
SPI Flash MemoryThe board is populated with a Numonyx/ST Micro non-volatile 2-Mbit SPI Flash memory located near the upper-right corner of the board.
Table 18. SPI Flash Memory Reference
Table 19. SPI Flash Memory Pin Information
SRAMThe board is populated with a Cypress 1-Mbit (128K x 8) Static RAM with a data bus width of 8 bits. The 15-bitaddress bus, the data bus and the control signals are connected directly to the CPLD. The 15-bit address bus,named MEMORY_A0 through MEMORY_A14, addresses 1-byte locations.
A 1Mb asynchronous SRAM is located at the bottom-center of the board.
Table 20. SRAM Reference
Function Direction U1 Pin Description MachXO Pin
TXD O 30 Transmit Data 7
RXD I 2 Receive Data 6
RTS# O 32 Request to Send 5
CTS# I 8 Clear to Send 4
DTR# O 31 Data Terminal Ready 1
DSR# I 6 Data Set Ready 2
DCD# I 7 Data Carrier Detect 3
RI# I 3 Ring Indicator 8
Item Description
Reference Designators U11
Part Number M25PE20-VMN6TP
Manufacturer Numonyx/ST Micro
Web Site www.numonyx.com
Function Dir U11 Pin Description MachXO PinS# I 1 SPI Flash chip select. 86
C I 6 SPI Flash dlock input. 85
D I 5 SPI Flash data input. 84
Q O 2 SPI Flash data output. 81
W# I 3 Hard-wired high. —
RESET# I 7 Hard-wired high. —
Item Description
Reference Designators U8
Part Number CY7C1019DV33-10ZSXI
Manufacturer Cypress
Web Site www.cypress.com
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MachXO Mini Development KitLattice Semiconductor User’s Guide
User LEDsEight red LEDs can be used for custom status signaling. The LEDs are located at the top of the board, next to theexpansion header. Each LED illuminates when the corresponding pin on the MachXO is driven low.
Table 22. User LEDs Reference
Table 21. SRAM Pin Information
Function Direction U8 Pin Description MachXO Pin
A0 I 1 Address Inputs to SRAM 50
A1 I 2 54
A2 I 3 55
A3 I 4 56
A4 I 13 57
A5 I 14 58
A6 I 15 60
A7 I 16 61
A8 I 17 62
A9 I 18 65
A10 I 19 66
A11 I 20 67
A12 I 21 69
A13 I 29 68
A14 I 30 71
A15 I 31 72
A16 I 32 36
IO0 I/O 6 Data to/from SRAM 40
IO1 I/O 7 41
IO2 I/O 10 43
IO3 I/O 11 44
IO4 I/O 22 45
IO5 I/O 23 46
IO6 I/O 26 48
IO7 I/O 27 49
CE# I 5 Chip Enable to SRAM 17
OE# I 28 Output Enable to SRAM 18
WE# I 12 Write Enable to SRAM 19
Item Description
Reference Designators D7-D0
Part Number LTST-C190CKT
Manufacturer Lite-On
Web Site www.liteonit.com
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MachXO Mini Development KitLattice Semiconductor User’s Guide
Table 23. User LED Pin Information
ProgrammingProgramming for the MachXO device is controlled using the ispVM System software. Refer to the ispVM Systemsoftware for help regarding operation of this software.
The MachXO Mini Evaluation Board is equipped with a built-in USB-based programming circuit. This consists of aUSB PHY and a USB connector. When the board is connected to a PC with a USB cable, it is recognized by theispVM System software as a “USB Download Cable”. The MachXO PLD can then be scanned and programmedusing the ispVM System software.
Software RequirementsYou should install the following software before you begin developing designs for the evaluation board:
• ispLEVER Starter or ispLEVER/Pro 7.2
• ispVM System 17.3.3
Mechanical SpecificationsDimensions: 3 1/2 in. [L] x 2 in. [W] x 3/8 in. [H]
Environmental RequirementsThe evaluation board must be stored between -40° C and 100° C. The recommended operating temperature isbetween 0° C and 55° C.
The evaluation board can be damaged without proper anti-static handling.
Pin Information and Bank SummaryTable 24 describes pin information for the LCMXO2280TN144 device and board connections.
Signal Name Description MachXO Pin
D7 User-defined 144
D6 User-defined 143
D5 User-defined 142
D4 User-defined 141
D3 User-defined 140
D2 User-defined 139
D1 User-defined 138
D0 User-defined 137
Table 24. MachXO Pin Information and Bank Summary
LCMXO2280TN144 Board ConnectionMini SoC DemoPin # Pin Function Bank
1 PL2A Bank7
2 PL2B Bank7
3 PL3A Bank7
4 PL3B Bank7
5 PL3C Bank7
6 PL3D Bank7 uart_tx
7 PL4A Bank7 uart_rx
8 PL4B Bank7
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MachXO Mini Development KitLattice Semiconductor User’s Guide
9 PL4C Bank7
10 VCCIO7 Bank7
12 PL6C Bank7
13 PL7A Bank7
14 PL7B Bank7 rst_n
15 PL7D Bank7
17 PL9C Bank7 sram_cen
18 PL9D Bank7 sram_oen
19 PL13A Bank6 sram_wen
20 PL13B Bank6
22 PL13D Bank6 xout
23 PL14D Bank6 xin
24 PL14C Bank6
25 PL15B Bank6
26 VCCIO6 Bank6
28 PL16D Bank6
29 PL17A Bank6
30 PL17B Bank6
31 PL17C Bank6
32 PL17D Bank6
33 PL18A Bank6
34 PL18B Bank6
35 PL19A Bank6
36 PL19B Bank6 sram_addr_16
38 VCCIO5 Bank5
39 TMS Bank5
40 PB2A Bank5 sram_data_0
41 PB2B Bank5 sram_data_1
42 TCK Bank5
43 PB3A Bank5 sram_data_2
44 PB3B Bank5 sram_data_3
45 PB4A Bank5 sram_data_4
46 PB4B Bank5 sram_data_5
47 TDO Bank5
48 PB4D Bank5 sram_data_6
49 PB5A Bank5 sram_data_7
50 PB5B Bank5 sram_addr_0
51 TDI Bank5
54 PB8F Bank5 sram_addr_1
55 PB10F Bank4 sram_addr_2
56 PB10C Bank4 sram_addr_3
57 PB10D Bank4 sram_addr_4
58 PB10B Bank4 sram_addr_5
Table 24. MachXO Pin Information and Bank Summary (Continued)
LCMXO2280TN144 Board ConnectionMini SoC DemoPin # Pin Function Bank
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MachXO Mini Development KitLattice Semiconductor User’s Guide
60 PB12A Bank4 sram_addr_6
61 PB12B Bank4 sram_addr_7
62 PB12E Bank4 sram_addr_8
63 VCCIO4 Bank4
65 PB13A Bank4 sram_addr_9
66 PB13B Bank4 sram_addr_10
67 PB13C Bank4 sram_addr_11
68 PB13D Bank4 sram_addr_13
69 PB14D Bank4 sram_addr_12
71 PB16C Bank4 sram_addr_14
72 PB16D Bank4 sram_addr_15
73 PR20B Bank3
74 PR20A Bank3
75 PR19B Bank3
76 PR19A Bank3
77 PR17D Bank3
78 PR17C Bank3
79 PR17B Bank3
80 PR17A Bank3
81 PR16D Bank3 spi_miso
82 VCCIO3 Bank3
84 PR15B Bank3 spi_mosi
85 PR15A Bank3 spi_sclk
86 PR14B Bank3 spi_csn
87 PR14A Bank3
89 PR13B Bank3
90 PR13A Bank3 sw_2
91 PR10B Bank2 sw_1
92 PR10A Bank2 sw_0
94 PR8B Bank2
95 PR8A Bank2
96 PR7B Bank2
97 PR7A Bank2
98 VCCIO2 Bank2
100 PR5C Bank2
101 PR5B Bank2
102 PR5A Bank2
103 PR4D Bank2
104 PR4C Bank2
105 PR4B Bank2
106 PR4A Bank2
107 PR3B Bank2
108 PR3A Bank2
Table 24. MachXO Pin Information and Bank Summary (Continued)
LCMXO2280TN144 Board ConnectionMini SoC DemoPin # Pin Function Bank
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MachXO Mini Development KitLattice Semiconductor User’s Guide
109 PT16D Bank1
110 PT16C Bank1
111 PT16B Bank1
112 PT16A Bank1
113 PT15D Bank1
114 PT15C Bank1
115 PT14B Bank1
116 PT14A Bank1
117 VCCIO1 Bank1
119 PT12F Bank1
120 PT12E Bank1
121 PT12D Bank1 scl
122 PT12C Bank1 sda
124 PT10B Bank1
125 PT9D Bank1
126 PT9C Bank1
127 PT9B Bank1
130 PT7B Bank0
131 PT7A Bank0
132 PT6D Bank0
133 PT6E Bank0
134 PT6F Bank0
135 VCCIO0 Bank0
137 PT4B Bank0 led_0
138 PT4A Bank0 led_1
139 PT3B Bank0 led_2
140 PT3A Bank0 led_3
141 PT2D Bank0 led_4
142 PT2C Bank0 led_5
143 PT2B Bank0 led_6
144 PT2A Bank0 led_7
16 GND
21 VCC
52 VCC
53 VCCAUX
59 GND
88 GND
93 VCC
123 GND
128 VCCAUX
129 VCC
11 GNDIO7
27 GNDIO6
Table 24. MachXO Pin Information and Bank Summary (Continued)
LCMXO2280TN144 Board ConnectionMini SoC DemoPin # Pin Function Bank
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MachXO Mini Development KitLattice Semiconductor User’s Guide
GlossaryCPLD: Complex Programmable Logic Device
DIP: Dual In-line Package.
I2C: Inter-Integrated Circuit.
LED: Light Emitting Diode.
PCB: Printed Circuit Board.
RoHS: Restriction of Hazardous Substances Directive.
PLL: Phase Locked Loop.
SPI: Serial Peripheral Interface.
SRAM: Static Random Access Memory.
TransFR: Transparent Field Reconfiguration.
UART: Universal Asynchronous Receiver/Transmitter.
USB: Universal Serial Bus.
WDT: Watchdog Timer
TroubleshootingMini Board is Not Responsive or ispVM Reports Programming ErrorsEnsure SW1D (4) is toggled to the OFF position. This will disable the MachXO Sleep Mode circuit.
Determine the Source of a Pre-Programmed PartIt is likely that you will receive your Mini board after it has been reviewed and reprogrammed by someone else. Torestore the Mini board to the factory default, see the Download Demo Designs section of this document for detailson downloading and reprogramming the device.
You can also determine which demo design is currently programmed onto the Mini board by comparing the JEDECchecksums against of the programming file with what is read from the programmed part.
To compare JEDEC file checksum:
1. Connect the Mini board to a host PC using both USB DEBUG and PROG ports.
37 GNDIO5
64 GNDIO4
70 SLEEPN/NC 83
GNDIO3 99
GNDIO2 118
GNDIO1 136
GNDIO0
Note: Data sheet version: 2.0, November 2007.
Table 24. MachXO Pin Information and Bank Summary (Continued)
LCMXO2280TN144 Board ConnectionMini SoC DemoPin # Pin Function Bank
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MachXO Mini Development KitLattice Semiconductor User’s Guide
2. From the Mini board toggle SW1D to the OFF position.
3. Start ispVM and choose ispTools > Scan. The LCMXO2280C appears in the Device List.
4. From the Operation list choose FLASH Calculate Checksum and click OK.
5. Choose Project > Download. ispVM reads the Flash contents from the MachXO and displays a hexadecimal checksum value in the Status column.
6. Open the original JEDEC file into a text editor and page to the bottom of the file. Note the hexadecimal check-sum at the line above the User Electronic Data note line. Compare this value against the checksum reported by ispVM.
Ordering Information
Technical Support AssistanceHotline: 1-800-LATTICE (North America)
+1-503-268-8001 (Outside North America)e-mail: [email protected]: www.latticesemi.com
Revision History
(c) 2009 Lattice Semiconductor Corp. All Lattice trademarks, registered trademarks, patents, and disclaimers areas listed at www.latticesemi.com/legal. All other brand or product names are trademarks or registered trademarksof their respective holders. The specifications and information herein are subject to change without notice.
Description Ordering Part NumberChina RoHS Environment-Friendly
Use Period (EFUP)
MachXO Mini Development Kit LCMXO2280C-M-EVN
Date Version Change Summary
February 2009 01.0 Initial release.
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MachXO Mini Development KitLattice Semiconductor User’s Guide
Appendix A. SchematicFigure 6. MachXO Banks 0-1
5 5
4 4
3 3
2 2
1 1
DD
CC
BB
AA
XO
_EX
P_D
1
XO
_EX
P_D
2X
O_E
XP
_D4
XO
_EX
P_D
3X
O_E
XP
_D6
XO
_EX
P_D
5X
O_E
XP
_D7
ST
AT
US
_LE
D7
ST
AT
US
_LE
D5
ST
AT
US
_LE
D6
ST
AT
US
_LE
D3
ST
AT
US
_LE
D4
ST
AT
US
_LE
D1
ST
AT
US
_LE
D2
ST
AT
US
_LE
D0
XO
_EX
P_D
8
XO
_EX
P_D
10X
O_E
XP
_D11
XO
_EX
P_D
12X
O_E
XP
_D13
XO
_EX
P_D
14X
O_E
XP
_D15
XO
_EX
P_D
9
XO
_EX
P_D
0
VC
C_I
O
XO
_SW
1X
O_S
W2
XO
_SW
3X
O_S
LEE
P_O
UT
b
48M
Hz
XO
_SP
I_O
UT
XO
_SP
I_IN
XO
_SP
I_C
LK
XO
_SP
I_C
S0
XO
_SP
I_C
S1
XO
_I2C
_DA
TA
XO
_I2C
_CLK
XO
_I2C
_ALE
RT
XO
_JT
AG
OE
XO
_A0
XO
_A1
XO
_PK
TE
ND
XO
_RD
XO
_WR
XO
_FU
LL
XO
_EM
PT
YX
O_W
AK
E
ST
AT
US
_LE
D[0
:7]
XO
_EX
P_D
[0:1
5]
XO
_SP
AR
E1
48M
Hz_
Deb
ug
XO
_SP
AR
E2
XO
_A2D
_OU
TX
O_A
2D_I
N
XO
_A2D
_RA
MP
Dat
e:
Siz
eS
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atic
Rev
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Titl
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Latt
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Sem
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Dat
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Mac
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Dat
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Titl
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Sem
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Mac
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She
et 7
She
et 7
She
et 4
She
ets
6, 7
She
et 5
She
et 7
She
et 4
She
ets
6, 7
She
et 4
She
et 8
She
et 8
C7
0.1u
FC
70.
1uF
C12
0.1u
FC
120.
1uF
C14
0.1u
FC
140.
1uF
C13
0.1u
FC
130.
1uF
BANK 1
BANK 0
(2 OF 3)
U16
B
Mac
hXO
_228
0_T
Q14
4
BANK 1
BANK 0
(2 OF 3)
U16
B
Mac
hXO
_228
0_T
Q14
4
PR
2D
10
4P
R2
C1
07
PR
2B
10
6P
R2
A1
08
PR
3A
10
5
PR
3B
10
3
PR
3C
10
2
PR
3D
10
1
PR
4A
10
0
PR
4B
97
PR
4D
96
PR
5B
95
PR
6C
92
PR
5D
94
PT
3F
13
3
PT
3D
13
4
PT
3B
13
7P
T3
A1
39
PT
2F
13
8P
T2
E1
41
PT
2D
14
0P
T2
C1
43
PT
2B
14
2P
T2
A1
44
PT
4A
13
2
PT
4B
13
1
PT
4D
13
0
VC
CIO
19
8
VC
CIO
18
2V
CC
IO0
13
5
VC
CIO
01
17
PR
6D
91
PR
7A
90
PR
7B
89
PR
7D
87
PR
8A
86
PR
8C
85
PR
9A
84
PR
9D
81
PB
10
A8
0
PB
10
B7
8
PB
10
C7
9
PB
10
D7
6
PB
11
A7
7
PB
11
B7
4
PB
11
C7
5
PC
LK
T0
_0
/PT
5B
12
7
PT
5C
12
6
PT
6A
12
5
PC
LK
T0
_1
/PT
6B
12
4
PT
7A
12
2
PT
7C
12
1
PT
7E
12
0
PT
8A
11
9
PT
8B
11
6
PT
8C
11
5
PT
9A
11
4
PB
11
D7
3
PT
9B
11
2
PT
9C
11
3
PT
9D
11
0
PT
9E
11
1
PT
9F
10
9
35
MachXO Mini Development KitLattice Semiconductor User’s Guide
Figure 7. MachXO Banks 2-3
5 5
4 4
3 3
2 2
1 1
DD
CC
BB
AA
Add
r_5
Add
r_6
Add
r_7
Add
r_9
Add
r_8
Add
r_10
Add
r_11
Add
r_12
Dat
a_0
Dat
a_1
Dat
a_2
Dat
a_3
Dat
a_4
Dat
a_5
Dat
a_6
Dat
a_7
XO
_D0
XO
_D1
XO
_D2
XO
_D3
XO
_D4
XO
_D5
XO
_D6
XO
_D7
Add
r_0
Add
r_1
Add
r_2
Add
r_3
Add
r_4
Add
r_13
Add
r_14
Add
r_15
Add
r_16
XIN
XO
UT
TS
ALL
GS
RN
XO
UT
XIN
+3.
3V
+3.
3V
VC
C_I
O
SR
AM
_CS
b
XO
_DT
R
48M
Hz_
IF
SR
AM
_OE
b
XO
_DC
D
XO
_D[0
:7]
XO
_TX
D
XO
_RX
D
SR
AM
_WE
b
XO
_RT
S
Add
r_[0
:16]
XO
_RE
SE
T
XO
_CT
S
Dat
a_[0
:7]
XO
_DS
R
XO
_SLO
E
XO
_WLL
XO
_RI
Dat
e:
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Boa
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She
et 6
She
et 5 S
heet
4
Sh
eet
6
She
et 6
She
et 4
She
et 4
She
et 6
She
et 8
18pF
= 1
2pF
+ G
roun
d P
lane
( 6
pF )
TSALL
C9
0.1u
FC
90.
1uF
C39
12pF
C39
12pF
J5
Hea
der
1x2
0.1
J5
Hea
der
1x2
0.11 2
C11
0.1u
FC
110.
1uF
BANK 3
BANK 2
(1 OF 3)
U16
A
Mac
hXO
_228
0_T
Q14
4
BANK 3
BANK 2
(1 OF 3)
U16
A
Mac
hXO
_228
0_T
Q14
4
PL
2D
5P
L2
C2
PL
2B
3P
L2
A1
PL
3A
4
PL
3B
6
PL
3C
7
PL
3D
8
PL
4A
9
PL
4D
12
PL
5A
13
PL
5B
/GS
RN
14
PL
6C
17
PL
5D
15
PB
5A
54
PB
4D
50
PB
4C
49
PB
4B
48
PB
4A
46
PB
3D
45
PB
3C
44
PB
3B
43
PB
3A
41
PB
2C
40
PC
LK
T2
_1
/PB
5B
55
PB
5D
56
PB
6A
57
VC
CIO
31
0
VC
CIO
32
6V
CC
IO2
38
VC
CIO
26
3
PL
6D
18
PL
7A
19
PL
7B
20
PL
8A
22
PL
8B
23
PL
8C
/TS
AL
L2
4
PL
9C
25
PL
9D
28
PL
10
A2
9
PL
10
B3
0
PL
10
C3
1
PL
10
D3
3
PL
11
A3
2
PL
11
B3
5
PL
11
C3
4
PL
11
D3
6
PC
LK
T2
_0
/PB
6B
58
PB
7C
60
PB
7E
61
PB
8A
62
PB
8C
65
PB
8D
66
PB
9A
67
PB
9B
69
PB
9C
68
PB
9D
71
PB
9F
72
C38
12pF
C38
12pF
C8
0.1u
FC
80.
1uF
R27
0
DN
I
R27
0
DN
I
X2
25 M
Hz
X2
25 M
Hz
12
C57
0.1u
FC
570.
1uF
R57
10k
R57
10k
R49
1MR49
1M
S1
XO
Glo
bal R
eset
S1
XO
Glo
bal R
eset
14
23
R56
10k
R56
10k
C10
0.1u
FC
100.
1uF
R50 1k
R50 1k
36
MachXO Mini Development KitLattice Semiconductor User’s Guide
Figure 8. Power, Decoupling, and JTAG
5 5
4 4
3 3
2 2
1 1
DD
CC
BB
AA
XO
_SLE
EP
_IN
b
VC
C_C
OR
E
+3.
3V
VC
C_C
OR
E
VC
C_A
UX
VC
C_A
UX
+3.
3V
+3.
3V
XO
_TM
S
XO
_TD
OX
O_T
DI
XO
_TC
K
XO
_SLE
EP
_OU
Tb
Dat
e:
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eS
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atic
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Mac
hXO
Pow
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Dec
oupl
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and
JT
AG
Mac
hXO
Min
i Eva
luat
ion
Boa
rdC
Dat
e:
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eS
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atic
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heet
Titl
e
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ice
Sem
icon
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atio
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Mac
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Dec
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JT
AG
Mac
hXO
Min
i Eva
luat
ion
Boa
rdC
She
ets
4, 5
She
et 8
She
et 8
R46
4.7k
R46
4.7k
S2
XO
Sle
ep
S2
XO
Sle
ep
14
23
R20
10k
R20
10k
(3 OF 3)
U16
C
Mac
hXO
_228
0_T
Q14
4
(3 OF 3)
U16
C
Mac
hXO
_228
0_T
Q14
4
GN
D1
18
GN
D1
23
GN
D1
36
GN
D1
1
GN
D1
6
GN
D2
7
GN
D3
7
GN
D5
9
GN
D6
4
GN
D8
3
GN
D8
8
GN
D9
9
VC
C C
OR
E2
1
VC
C C
OR
E5
2
VC
C C
OR
E9
3
VC
C C
OR
E1
29
VC
CA
UX
53
VC
CA
UX
12
8
TD
O4
7
TD
I5
1
TM
S3
9
TC
K4
2
SL
EE
PN
(C
De
vice
On
ly)
70
C16
0.1u
FC
160.
1uF
Q5
2N39
06Q
52N
3906
C60
0.33
uFC
600.
33uF
C58
0.1u
FC
580.
1uF
C59
33uF
6.3V
C59
33uF
6.3V
C20
0.1u
FC
200.
1uF
C18
0.1u
FC
180.
1uF
C19
0.1u
FC
190.
1uF
C15
0.1u
FC
150.
1uF
R47
4.7k
R47
4.7k
SW
1D SW
_SP
ST
_4
SW
1D SW
_SP
ST
_4
45
R59
10k
R59
10k
C17
0.1u
FC
170.
1uF
37
MachXO Mini Development KitLattice Semiconductor User’s Guide
Figure 9. USB Programming Interface to MachXO JTAG
5 5
4 4
3 3
2 2
1 1
DD
CC
BB
AA
TC
K/D
0
TM
S/D
2T
DI/
D3
XO
_D1
XO
_D4
XO
_D5
XO
_D6
XO
_D7
VC
CD
ET
XO
_D3
XO
_D2
XO
_D0
SH
LD_P
rog
+5V
_US
B_P
rog
+3.
3V_P
rog
+3.
3V_P
rog_
AN
+3.
3V_P
rog_
AN
+3.
3V_P
rog
RE
SE
Tb
XO
_WA
KE
XO
_TC
K
XO
_TM
S
XO
_TD
I
XO
_TD
O
US
B_I
2C_C
LK
US
B_I
2C_D
AT
A
XO
_WR
XO
_RD
XO
_A0
XO
_A1
XO
_PK
TE
ND
XO
_EM
PT
YX
O_F
ULL
XO
_JT
AG
OE
XO
_RE
SE
T
48M
Hz
XO
_D[0
:7]
PW
R_E
NA
BLE
_Pro
g
48M
Hz_
IF
XO
_SP
AR
E2
XO
_SP
AR
E1
XO
_SLO
EX
O_W
LL
Dat
e:
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Inte
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Mac
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Min
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Boa
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She
et 8
She
ets
1, 7
She
et 1
She
et 2
She
et 3
She
et 8
She
ets
1, 2
She
ets
1, 2
She
et 2
Inst
all R
11 -
R13
for N
orm
al P
rogr
amm
ing
Inst
all R
14 -
R17
for A
dvan
ced
Fact
ory
Test
ing
She
ets
6, 7
18pF
= 1
2pF
+ G
roun
d P
lane
( 6
pF )
R19
1kR19
1k
C52
10nF
C52
10nF
C31
0.1u
FC
310.
1uF
C29
0.1u
FC
290.
1uFR
30
10R30
10
R17
0R17
0
C27
0.1u
FC
270.
1uF
C25
0.1u
FC
250.
1uF
L2 Fer
rite
_bea
dS
M/R
_060
3D
I
L2 Fer
rite
_bea
dS
M/R
_060
3D
IR
140R
140
R51
1MR51
1M
C40
10nF
C40
10nF
R52
1kR52
1k
X1
24 M
Hz
X1
24 M
Hz
12
C4
8pF
C4
8pF
R12
0R
120
C5
8pF
C5
8pF
C32
0.1u
FC
320.
1uF
C30
0.1u
FC
300.
1uF
C28
0.1u
FC
280.
1uF
C26
0.1u
FC
260.
1uF
R43
100k
R43
100k
R11
0R
110
R13
0R
130
U3
CY
7C68
013A
-QF
N56
U3
CY
7C68
013A
-QF
N56
XT
AL
IN5
XT
AL
OU
T4
RE
SE
T4
2
CL
KO
UT
/PE
15
4
INT
0_
n/P
A0
33
INT
1_
n/P
A1
34
SL
OE
/PA
23
5
WU
2/P
A3
36
FIF
OA
DR
0/P
A4
37
FIF
OA
DR
1/P
A5
38
PK
TE
ND
/PA
63
9
FL
AG
D/S
LC
S_
n/P
A7
40
FD
0/P
B0
18
FD
1/P
B1
19
FD
2/P
B2
20
FD
3/P
B3
21
FD
4/P
B4
22
FD
5/P
B5
23
FD
6/P
B6
24
FD
7/P
B7
25
FD
8/P
D0
45
FD
9/P
D1
46
FD
10/P
D2
47
FD
11
/PD
34
8
FD
12
/PD
44
9
FD
13/P
D5
50
FD
14
/PD
65
1
FD
15
/PD
75
2
RD
Y0
/SL
RD
1
RD
Y1
/SL
WR
2
FL
AG
A/C
TL
02
9
FL
AG
B/C
TL
13
0
FL
AG
C/C
TL
23
1
IFC
LK
/PE
01
3
RE
SE
RV
ED
14
WA
KE
UP
44
SC
L1
5
SD
A1
6
VC
C1
1
VC
C1
7
VC
C2
7
VC
C3
2
VC
C4
3
VC
C5
5
GN
D1
2
GN
D2
6
GN
D2
8
GN
D4
1
GN
D5
3
GN
D5
6
AG
ND
6
AG
ND
10
AV
CC
3
AV
CC
7
D_
MIN
US
9D
_P
LU
S8
PA
D
57
J1U
SB
_MIN
I_B
J1U
SB
_MIN
I_B
VC
C1
D-
2
D+
3
GN
D5
NC
4
CA
SE
7
CA
SE
8
CA
SE
9
CA
SE
6
MH
11
0
MH
21
1
R16
0R16
0
38
MachXO Mini Development KitLattice Semiconductor User’s Guide
Figure 10. USB Debug-UART & Optional Program
5 5
4 4
3 3
2 2
1 1
DD
CC
BB
AA
SH
LD_D
ebug
+5V
_US
B_D
ebug
+5V
_US
B_D
ebug
+3.
3V
XO
_RX
D
XO
_CT
S
XO
_TX
D
XO
_RT
S
XO
_DT
RX
O_D
SR
XO
_DC
D
PW
R_E
NA
BLE
_Deb
ug
48M
Hz_
Deb
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XO
_RI
Dat
e:
Siz
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chem
atic
Rev
ofS
heet
Titl
e
Latt
ice
Sem
icon
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BC
85
US
B D
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RT
& O
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nal P
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Mac
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Min
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rdC
Dat
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Siz
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chem
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Rev
ofS
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Titl
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Latt
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Sem
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duct
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BC
85
US
B D
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-UA
RT
& O
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nal P
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Mac
hXO
Min
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luat
ion
Boa
rdC
Dat
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Siz
eS
chem
atic
Rev
ofS
heet
Titl
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Latt
ice
Sem
icon
duct
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pplic
atio
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mai
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ject
Sat
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-09
BC
85
US
B D
ebug
-UA
RT
& O
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nal P
rogr
am
Mac
hXO
Min
i Eva
luat
ion
Boa
rdC
She
et 8
She
et 2
She
et 1
R44
100k
R44
100k
L3 Fer
rite
_bea
dS
M/R
_060
3D
I
L3 Fer
rite
_bea
dS
M/R
_060
3D
I
R35 27R35 27
C54
0.1u
FC
540.
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U1
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2-Q
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FT
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FN
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D3
0
DT
R#
31
RT
S#
32
VC
CIO
1
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D2
RI#
3
GN
D4
DS
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6
DC
D#
7
CT
S#
8
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21
0
CB
US
31
1O
SC
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8
OS
CI
27
TE
ST
26
AG
ND
24
CB
US
12
1
CB
US
02
2
GN
D2
0
VC
C1
9
RE
SE
T#
18
GN
D1
7
3V
3O
UT
16
US
BD
M1
5
US
BD
P1
4
CB
US
49
33
PA
D
C44
33pF
C44
33pF
J8U
SB
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I_B
J8U
SB
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I_B
VC
C1
D-
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D+
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GN
D5
NC
4
CA
SE
7
CA
SE
8
CA
SE
9
CA
SE
6
MH
11
0
MH
21
1
C47
0.1u
FC
470.
1uF
C55
0.1u
FC
550.
1uF
C53
10nF
C53
10nF
C43
10nF
C43
10nF
R36 27
R36 27
C45
33pF
C45
33pF
39
MachXO Mini Development KitLattice Semiconductor User’s Guide
Figure 11. Memory - SRAM, SPI, and I2C
5 5
4 4
3 3
2 2
1 1
DD
CC
BB
AA
Add
r_0
Add
r_1
Add
r_2
Add
r_3
Add
r_4
Add
r_5
Add
r_6
Add
r_7
Add
r_8
Add
r_9
Add
r_10
Add
r_11
Add
r_12
Add
r_13
Add
r_14
Add
r_15
Add
r_16
Dat
a_0
Dat
a_1
Dat
a_3
Dat
a_4
Dat
a_5
Dat
a_6
Dat
a_7
Dat
a_2
+3.
3V_P
rog
+3.
3V_P
rog
+3.
3V
+3.
3V
XO
_SP
I_C
S0
XO
_SP
I_C
LK
XO
_SP
I_O
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XO
_SP
I_IN
US
B_I
2C_C
LK
US
B_I
2C_D
AT
A
Add
r_[0
:16]
SR
AM
_CS
bS
RA
M_O
Eb
SR
AM
_WE
b
Dat
a_[0
:7]
Dat
e:
Siz
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Rev
ofS
heet
Titl
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icon
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Mem
ory
- S
RA
M,
SP
I, a
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2C
Mac
hXO
Min
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luat
ion
Boa
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Dat
e:
Siz
eS
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atic
Rev
ofS
heet
Titl
e
Latt
ice
Sem
icon
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atio
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Sat
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BC
86
Mem
ory
- S
RA
M,
SP
I, a
nd I
2C
Mac
hXO
Min
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luat
ion
Boa
rdC
Dat
e:
Siz
eS
chem
atic
Rev
ofS
heet
Titl
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Latt
ice
Sem
icon
duct
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pplic
atio
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Mem
ory
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RA
M,
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2C
Mac
hXO
Min
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ion
Boa
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She
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1, 2
She
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She
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1, 7
She
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4, 7
2MB
it
U8 CY
128X
8TS
OP
U8 CY
128X
8TS
OP
A0
1
A1
2
A2
3
A3
4
VS
S9
IO2
10
WE
n1
2
A7
16
A1
63
2A
15
31
A1
43
0
OE
n2
8
IO7
27
IO6
26
VS
S2
5
IO5
23
IO4
22
A1
22
1A
11
20
A1
01
9
A8
17
A5
14
A4
13
CE
n5
IO0
6
IO1
7
A9
18
IO3
11
A1
32
9
VC
C2
4V
CC
8
A6
15
C24
0.1u
FC
240.
1uF
C23
0.1u
FC
230.
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R45
2.2K
R45
2.2K
U11
M25
PE
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U11
S1
Q2
W3
Vss
4
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8
D5
C6
Re
set
7R21
2.2K
R21
2.2K
C21
0.1u
FC
210.
1uF
C22
0.1u
FC
220.
1uF
U10
24LC
64
U10
24LC
64
VC
C8
SC
L6
SD
A5
A0
1A
12
A2
3
WP
7
VS
S4
40
MachXO Mini Development KitLattice Semiconductor User’s Guide
Figure 12. Status LEDs, DIP-SW, Temp Sensor, and Expansion Header
5 5
4 4
3 3
2 2
1 1
DD
CC
BB
AA
STATUS_LED6
STATUS_LED7
STATUS_LED5
STATUS_LED4
STATUS_LED3
STATUS_LED2
STATUS_LED0
STATUS_LED1
XO
_I2C
_ALE
RT
XO
_I2C
_DA
TA
XO
_I2C
_CLK
XO
_EX
P_D
7X
O_E
XP
_D6
XO
_EX
P_D
5X
O_E
XP
_D4
XO
_EX
P_D
3X
O_E
XP
_D2
XO
_EX
P_D
1X
O_E
XP
_D0
XO
_I2C
_ALE
RT
XO
_I2C
_CLK
XO
_I2C
_DA
TA
XO
_EX
P_D
8X
O_E
XP
_D9
XO
_EX
P_D
10X
O_E
XP
_D11
XO
_EX
P_D
12X
O_E
XP
_D13
XO
_EX
P_D
14X
O_E
XP
_D15
+3.
3V+
3.3V
+3.
3V+
3.3V
+3.
3V
+3.
3V
+3.
3V
+3.
3V
XO
_I2C
_CLK
XO
_I2C
_DA
TA
XO
_SW
2
XO
_SW
3
XO
_SW
1
48M
Hz
XO
_SP
I_C
S1
XO
_SP
I_C
LKX
O_S
PI_
OU
TX
O_S
PI_
IN
XO
_I2C
_ALE
RT
ST
AT
US
_LE
D[0
:7]
XO
_EX
P_D
[0:1
5]
A2D
_IN
D2A
_OU
T
US
B_I
2C_D
AT
AU
SB
_I2C
_CLK
XO
_A2D
_IN
Dat
e:
Siz
eS
chem
atic
Rev
ofS
heet
Titl
e
Latt
ice
Sem
icon
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87
Sta
tus
LED
s, D
IP-S
W,
Tem
p S
enso
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Hea
der
Mac
hXO
Min
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ion
Boa
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Dat
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Rev
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Titl
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Latt
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Sem
icon
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BC
87
Sta
tus
LED
s, D
IP-S
W,
Tem
p S
enso
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Hea
der
Mac
hXO
Min
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ion
Boa
rdC
Dat
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Siz
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chem
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Rev
ofS
heet
Titl
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Latt
ice
Sem
icon
duct
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pplic
atio
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Sat
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BC
87
Sta
tus
LED
s, D
IP-S
W,
Tem
p S
enso
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Hea
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Mac
hXO
Min
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ion
Boa
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She
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She
et 1
She
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1, 6
She
et 1
She
et 1
She
ets
1,6
She
et 4
Tem
pera
ture
Sen
sor
She
et 8
She
ets
1 &
8
D9 Sta
tus
(Red
)
D9 Sta
tus
(Red
)
U14
TM
P10
1
U14
TM
P10
1
VC
C4
GN
D2
AD
D0
5S
CL
1
SD
A6
AL
ER
T3
SW
1C SW
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ST
_4
SW
1C SW
_SP
ST
_4
36
C6
0.1u
F
C6
0.1u
F
D7 Sta
tus
(Red
)
D7 Sta
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(Red
)
J6
HE
AD
ER
16X
2
J6
HE
AD
ER
16X
22 4 6 8 10
12
14
16
18
20
22
24
26
28
30
32
1 3 5 7 91
11
31
51
71
92
12
32
52
72
93
1
RN
2D
2.2k
RN
2D
2.2k
4
RN
2F
2.2k
RN
2F
2.2k
7
RN
2H
2.2k
RN
2H
2.2k
9
RN
1A
470
RN
1A
470
10
1
RN
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2.2k
RN
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2.2k
3
SW
1B SW
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1B SW
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_4
27
RN
1E
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RN
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470
65
RN
2A
2.2k
RN
2A
2.2k
10
1
SW
1A SW
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ST
_4
SW
1A SW
_SP
ST
_4
18
RN
1F
470
RN
1F
470
7
D11 Sta
tus
(Red
)
D11 Sta
tus
(Red
)
D8 Sta
tus
(Red
)
D8 Sta
tus
(Red
)
RN
1G
470
RN
1G
470
8
D12 Sta
tus
(Red
)
D12 Sta
tus
(Red
)
D10 Sta
tus
(Red
)
D10 Sta
tus
(Red
)
RN
1H
470
RN
1H
470
9
RN
1D
470
RN
1D
470
4
RN
2E
2.2k
RN
2E
2.2k
65
D5 Sta
tus
(Red
)
D5 Sta
tus
(Red
)
RN
1C
470
RN
1C
470
3
RN
2G
2.2k
RN
2G
2.2k
8
D6 Sta
tus
(Red
)
D6 Sta
tus
(Red
)
RN
1B
470
RN
1B
470
2
RN
2B
2.2k
RN
2B
2.2k
2
41
MachXO Mini Development KitLattice Semiconductor User’s Guide
Figure 13. 5V to 3.3V Regulators, Current Shunts, and Delta Sigma A2D
5 5
4 4
3 3
2 2
1 1
DD
CC
BB
AA
+5V
_SW
+3.
3VV
CC
_CO
RE
VC
C_A
UX
VC
C_I
O
+5V
_SW
+5V
_US
B_D
ebug
+5V
_US
B_P
rog
+5V
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B_P
rog
+3.
3V_P
rog
+5V
_SW
+3.
3V_P
rog
+5V
_SW
RE
SE
Tb
XO
_A2D
_IN
XO
_A2D
_OU
T
PW
R_E
NA
BLE
_Deb
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PW
R_E
NA
BLE
_Pro
g
A2D
_IN
D2A
_OU
T
XO
_A2D
_RA
MP
Dat
e:
Siz
eS
chem
atic
Rev
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heet
Titl
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ice
Sem
icon
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5V t
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hunt
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Si g
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Mac
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Min
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Boa
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Dat
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Titl
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Latt
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Sem
icon
duct
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mai
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She
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She
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She
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M A
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She
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D14
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D14
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D15
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4148
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Q1
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L640
2PbF
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1MR39
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R26
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42
MachXO Mini Development KitLattice Semiconductor User’s Guide
Appendix B. Bill of MaterialsTable 25. Bill of Materials
Item Quantity Reference Part Part Number Description
1 3 C1,C50,C60 0.33µF
2 2 C2,C51 10µF
3 1 C3 1µF
4 2 C4,C5 12pF
5 33
C6, C7, C8, C9, C10, C11, C12, C13, C14, C15, C16, C17, C18, C19, C20, C21, C22, C23, C24, C25, C26, C27, C28, C29, C30, C31, C32, C36, C47, C48, C49, C54, C55
0.1µF
6 1 C37 0.01µF
7 2 C38, C39 8pF
8 6 C40, C43, C52, C53, C57, C58 10nF
9 2 C44, C45 33pF
10 1 C59 33µF
11 1 D3 Power (Blue)
12 8 D5, D6, D7, D8, D9, D10, D11, D12 Status (Red)
13 2 D13, D14 1N4448
14 1 D15 D1N4148
15 1 G1 Lattice Logo
16 1 G2 WEEE
17 1 G3 E-Friendly
18 2 J1, J8 USB_MINI_B
19 1 J2 Core Current
20 1 J3 AUX Current
21 1 J4 I/O Current
22 1 J5 TSALL
23 1 J6 HEADER 16X2
24 2 L2, L3 Ferrite_bead
25 2 Q1, Q2 IRLML6402PbF
26 2 Q3, Q4 2N2369A
27 1 Q5 2N3906
28 4 RN1, R4, R6, R55 330
29 4 RN2, R21, R23, R45 2.2K
31 3 R1, R2, R3 0.2
32 7 R8, R20, R26, R42, R56, R57, R59 10k
33 4 R9, R19, R40, R52 1k
34 1 R10 300k
35 8 R11, R12, R13, R14, R16, R17, R27, R50 0
36 4 R24, R46, R47, R58 4.7k
37 2 R25, R51 1M
38 1 R30 10
39 2 R35, R36 27
40 5 R39, R41, R43, R44, R49 100K
41 1 SW1 SW_SPST_4
43
MachXO Mini Development KitLattice Semiconductor User’s Guide
42 1 S1 XO Global Reset
43 1 S2 XO Sleep
44 1 U1 FT232R / 32-QFN
45 1 U3 CY7C68013A-QFN56
46 2 U7,U9 NCP1117
47 1 U8 CY128X8TSOP
48 1 U10 24LC64
49 1 U11 M25PE20
50 1 U14 TMP101
51 1 U15 LMV331
52 1 U16 LCMXO2280C-4TN144
53 1 X1 24 MHz
54 1 X2 25 MHz
Table 25. Bill of Materials (Continued)
Item Quantity Reference Part Part Number Description
44
MachXO Mini Development KitLattice Semiconductor User’s Guide
Appendix C. Mini SoC Demo I/O PlanLOCATE preferences from mini_soc_demo.lpf.
LOCATE COMP “led_0” SITE “137” ;LOCATE COMP “led_1” SITE “138” ;LOCATE COMP “led_2” SITE “139” ;LOCATE COMP “led_3” SITE “140” ;LOCATE COMP “led_4” SITE “141” ;LOCATE COMP “led_5” SITE “142” ;LOCATE COMP “led_6” SITE “143” ;LOCATE COMP “led_7” SITE “144” ;LOCATE COMP “rst_n” SITE “14” ;LOCATE COMP “scl” SITE “121” ;LOCATE COMP “sda” SITE “122” ;LOCATE COMP “spi_csn” SITE “86” ;LOCATE COMP “spi_miso” SITE “81” ;LOCATE COMP “spi_mosi” SITE “84” ;LOCATE COMP “spi_sclk” SITE “85” ;LOCATE COMP “sram_addr_0” SITE “50” ;LOCATE COMP “sram_addr_1” SITE “54” ;LOCATE COMP “sram_addr_10” SITE “66” ;LOCATE COMP “sram_addr_11” SITE “67” ;LOCATE COMP “sram_addr_12” SITE “69” ;LOCATE COMP “sram_addr_13” SITE “68” ;LOCATE COMP “sram_addr_14” SITE “71” ;LOCATE COMP “sram_addr_15” SITE “72” ;LOCATE COMP “sram_addr_16” SITE “36” ;LOCATE COMP “sram_addr_2” SITE “55” ;LOCATE COMP “sram_addr_3” SITE “56” ;LOCATE COMP “sram_addr_4” SITE “57” ;LOCATE COMP “sram_addr_5” SITE “58” ;LOCATE COMP “sram_addr_6” SITE “60” ;LOCATE COMP “sram_addr_7” SITE “61” ;LOCATE COMP “sram_addr_8” SITE “62” ;LOCATE COMP “sram_addr_9” SITE “65” ;LOCATE COMP “sram_cen” SITE “17” ;LOCATE COMP “sram_data_0” SITE “40” ;LOCATE COMP “sram_data_1” SITE “41” ;LOCATE COMP “sram_data_2” SITE “43” ;LOCATE COMP “sram_data_3” SITE “44” ;LOCATE COMP “sram_data_4” SITE “45” ;LOCATE COMP “sram_data_5” SITE “46” ;LOCATE COMP “sram_data_6” SITE “48” ;LOCATE COMP “sram_data_7” SITE “49” ;LOCATE COMP “sram_oen” SITE “18” ;LOCATE COMP “sram_wen” SITE “19” ;LOCATE COMP “sw_0” SITE “92” ;LOCATE COMP “sw_1” SITE “91” ;LOCATE COMP “sw_2” SITE “90” ;LOCATE COMP “uart_rx” SITE “7” ;LOCATE COMP “uart_tx” SITE “6” ;LOCATE COMP “xin” SITE “23” ;LOCATE COMP “xout” SITE “22” ;