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Research Journal of Applied Sciences, Engineering and Technology 9(1): 535!, "#15$SS%: "#!&59' e$SS%: "#!&! *a+ell Scien-ific .rgani/a-ion, "#15

Su0i--ed: %o2e0er 13, "#1& Accep-ed: %o2e0er 13, "#1& u0lished: January #5, "#15

Low Power and Efficient Dadda Multiplier

S4 Ra2i, o2ind Sha6i %air, Ra6ee2 %arayan and 7arish *4 8i--ur

School of Elec-ronics Engineering, $T ni2ersi-y, ellore, Tailnadu 3"#1&, $ndia

Abstract: $n -his s-udy an area op-ii/ed ;adda ul-iplier i-h a da-a aare eycoponen- in our design4 $- uses lesser nu0er of ga-es -han con2en-ional design and hence lesser area and delay4The da-a aare designs and oure+perien-al resul-s sho -ha- e ha2e 0een capa0le of reducing -he area 0y 134#11@ and -o-al poer 0y "41@i-h only a sligh- increase in -he delay4

Keywords: uar et al4, "#11' ;adda, 195):

E enera-ion of -he par-ial produc-s in parallel usingan array of A%; ga-es4

E Reduc-ion of -he par-ial produc-s using e+ac-

placeen- of -he (3, ") coun-ers and (", ") coun-ers

in -he a+iu cri-ical pa-h delay of -heul-iplier4

E The final se- of par-ial produc-s reaining af-er -he

reduc-ion phase are added using a con2en-ionaladder4

;adda ul-ipliers do as fe reduc-ions as possi0le4

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Opti'i%ed proposed arc&itecture:Low area full adder: As en-ioned earlier, -he fulladder odule is one of -he ain coponen-s of -he;adda ul-iplier4 The con2en-ional full adder shon inCig4 " has " EF.R ga-es, " A%; ga-es and 1 .R ga-e4

The Su and =arry forula in con2en-ional full

adder is:

Su G (AH

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Cig4 : =ircui- diagra depic-ing 0lac> do- func-ionali-y

Cig4 !: os-process circui- diagra for &0i-

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The diagra Cig4 9 a0o2e depic-s a &0i- da-aaare of 1 &0i- end process of poer plan, floor plan,

&D& 33#"9 "14# 54!&3

Ta0le 3: Area op-ii/ed &0i- dadda i-h con2en-ional adder in

a0o2e depic-s -he physical 2ie of -he area op-ii/ed;adda ul-iplier i-h ;a-a aare en -o -he 0ac>end process and -he final physical

D &&9 34!## #411 op-ii/a-ion and placeen- ere all done in cadence1D1 195& 4"! #4!9 encoun-er -ool using &5 n -echnology4 The -o-al die3"D3" 11# 1143 "4#& si/e as found -o 0e &!!3349! u

"4 Cigure 1# shon

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Area (u") 33#"9

;elay (nsec) "14# RE,EREN!E"oer (?) 54!&3

Ta0le &: Area op-ii/ed &0i- dadda i-h proposed adder in final s-a g ear a e-ers & 0 i- d a dd aArea (u

") 33&1&

;elay (nsec) 3#4#oer (?) &4&&&

Ta0le 5: =oparison 0e-een con2en-ional dadda and area op-ii/ed d a dda u l-i p liers

Si/e Area (@) ;elay ( @ ) o er ( @)

D 13415 "4# 4!#

1D1 1#4 #451 &41#

Arunachala, T4 and S4 8iru0a2eni, "#134 Analysis ofhigh speed ul-ipliers4 roceeding of $n-erna-ional=onference on =ounica-ions and Signalrocessing ($==S, "#13), pp: "11"1&4

ers-aff, 84=4, E4E4 Sar-/lander and *4J4 Schul-e,

"##14 Analysis of colun copression ul-ipliers4

roceeding of 15-h $EEE Syposiu on =opu-er

Ari-he-ic, pp: 33394

;adda, 4, 1954 Soe schees for parallel ul-ipliers4

Al-a CreB4, 3&: 3&9

354

Ari-he-ic4 .+ford3"D3" 41& #4&! #49( arhai,

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