lin bus based data acquisition and control system using psoc

LIN BUS BASED DATA ACQUISITION AND CONTROL

SYSTEM USING PSoC

PROJECT REPORT

Submitted by

R.MANIKANDAN (Reg. No: A949008)

In partial fulfillment for the award of the degree

of

M.Sc. IN

ELECTRONICS & INSTRUMENTATION

UNIVERSITY SCIENCE INSTRUMENTATION CENTRE

MADURAI KAMARAJ UNIVERSITY, MADURAI 625 021. APRIL, 2011

UNIVERSITY SCIENCE INSTRUMENTATION CENTRE MADURAI KAMARAJ UNIVERSITY, MADURAI 625 021

BONAFIDE CERTIFICATE

Certified that this project report “LIN BUS BASED DATA

ACQUISITION AND CONTROL SYSTEM USING PSoC” is the bonafide

work of “R.MANIKANDAN (A949008)” who carried out the project work under

my supervision.

SIGNATURE

SUPERVISOR: U.DINESH KUMAR

Guest Lecturer University Science Instrumentation Centre

Madurai Kamaraj University, Madurai – 625 021

DIRECTOR

Submitted to the viva-voce examination held on 29.04.2011 at Madurai Kamaraj University.

Examiners:

DECLARATION I hereby declare that this project work entitled “LIN BUS BASED DATA

ACQUISITION AND CONTROL SYSTEM USING PSoC” is developed at

University Science Instrumentation Centre, Madurai Kamaraj University, Madurai,

for the partial fulfillment of the degree of Master of Science in Electronics &

Instrumentation. This is a record of original work done by me under the guidance of

Mr. U. Dinesh Kumar, Madurai Kamaraj University, Madurai.

Place: Madurai

Date: .04.2011

(Manikandan. R)

ACKNOWLEDGEMENT

I express my sincere thank to our director Dr.N.Mathivanan, M.Sc.,

M.Tech., Ph.D., for permitting me to do the project and for providing me valuable

guidance with timely suggestions.

I would like to thank my internal guide Mr. U. Dinesh Kumar, M.Sc., who

has given me constant guidance and support to finish the project. Also I extend my

deep gratitude to other USIC staffs for their support and suggestions in finishing

this work.

I express my sincere thanks to our beloved guide Mr.K.Arunvenktesh, M.Sc.,

M.Phil., Ph.D., for permitting me to do the project with valuable guidance.

I extent my cheerful thanks to ‘My friends and other Non-teaching staffs’

who gave me the constant supports, suggestions and continuous encouragement

throughout my project.

ABSTRACT

The LIN (Local Interconnect Network) bus is an inexpensive serial communications

protocol, which effectively supports remote application within an automobile network. It is

particularly intended for mechatronic nodes in distributed automotive applications, but is equally

suited to industrial applications. It is intended to complement the existing CAN network leading

to hierarchical networks within cars.

PSoC (Programmable System on Chip) represents a whole new concept in

microcontroller development. In addition to all the standard elements of 8-bit microcontrollers,

PSoC chips have the features of digital and analog programmable blocks, which themselves

allow implementation of large number of peripherals.

In this project, the main objective is to establish communication between two slave nodes

and one master node through LIN network. The first and second nodes consist of analog and

digital sensors that are connected to a corresponding signal conditioning circuit. Here the sensor

signals are digitized and sent to the LINBUS via LIN transceiver. The third node (master) consists

of a PC that is connected to a PSoC via UART (serial communication). The data received from

the LINBUS via LIN transceiver will be sent to the PC through COM port. The PC can send

commands to LIN Master to select node and acquire data. This project provides a closed loop data

acquisition and control system, through a cost effective network.

TABLE OF CONTENTS Title Page no: 1. INTRODUCTION 1 1.1. Objective 2 2. HARDWARE DESIGN 3

2.1. Functional Block Diagram 3 2.2. Integrated LIN Controller 4

2.3. EAGLE view PCB Design and Description 6 2.4. EAGLE View Board Design 7 2.5. Current Measurement Description 8 2.6. Temperature Measurement Description 9 2.7. Experimental Setup for Slave Node1 11 2.8. Experimental Setup for Slave Node 2 12 2.9. Experimental Setup for Master Node 13

3. SOFTWARE DESIGN 3.1. PSoC Designer Details 14 3.2. Flowchart and Functions description 15 3.3. Synchro Break Configuration 20 3.4. Data Transmission Configuration 21 3.5. Data Reception Configuration 21 3.6. Synchro Reception Configuration 24 3.7. Data Reception Configuration 25 4. TEST AND ANALYSIS 27 5. CONCLUSION 32 APPENDIX REFERENCE

LIST OF FIGURES & TABLES

Section Name Page. No 2.1 Functional block diagram 3 2.2 Circuit diagram of inbuilt LIN controller 5 2.3 Circuit diagram on the Eagle software 6 2.4 Board design on the Eagle software 7 2.5 Current Measurement Arrangement 8 2.6 Temperature Measurement Arrangement 9 2.7 Slave Node1 11 2.8 Slave Node2 12 2.9 Master Node 13 3.1 PSoC designer IDE 14 3.3 Synchro Break Configuration 20 3.4 Data Transmission Configuration 21 3.5 Data Reception Configuration 21 3.6 Synchro Reception Configuration 24 3.7 Data Reception Configuration 25 4.2 Temperature Measuring using Two Pins on Port 0 30

Table 1.1 CT Coil Current Sensor Readings 27 Table 1.2 Temperature Readings 31

1. INTRODUCTION

Different types of wired and wireless networks and data acquisition techniques are used in

different automation applications. The most common networks are CAN bus, Ethernet, different

types of Field Bus networks.

Generally on automobile applications CAN based systems are developed, which have some

disadvantages over their features like high expensive and complexity with two wire differential

communications. To overcome disadvantages of CAN, a new networking technique have

introduced as LIN (Local Interconnect Network). LIN is a low cost serial communication system

intended to be used for distributed electronic systems in vehicles, which complements the existing

portfolio of automotive multiplex networks.

LIN enables a cost-effective communication for smart sensors and actuators where the

bandwidth and versatility of CAN is not required. The communication is based on the SCI

(UART) data format, a single-master/multiple-slave concept, a single-wire 12V bus, and a clock

synchronization for nodes without stabilized time base.

LIN can also be used under the distributed electronic systems required for applications of

automation of industrial fields. The medium access in a LIN network is controlled by a master

node so that no arbitration or collision management in the slave nodes is required, thus giving a

guarantee of the worst-case latency times for signal transmission A LIN network comprises one

master node and one or more slave nodes. All nodes include a slave communication task that is

split in a transmit and a receive task, while the master node includes an additional master transmit

task.

This work is carried out with two slave nodes interfaced one with current sensor and other

with temperature sensor, where the master node is interfaced to PC for logging the data’s.

1

1.1 Objective of the project

The main objective of the project is to design & develop ‘LIN Based Network Data

Acquisition and Control System Using PSoC’ for measurement and control the industrial

automation application. Automates the parameters like (load current, temperature, control the AC

load and cooling devices) in digital form for industrial automation using LIN Bus. First measure

these parameters by using different kind of sensors, and transfer these data’s through the Local

Interconnect Network Bus, and read these data’s and to display these values on the LCD.

Interconnect the number of nodes through the LIN Bus.

Transfer the parameter values through the LIN network.

Interface the LCD with controller to display the measured values.

Interface the controller with PC through the UART.

2

2. HARDWARE DESCRIPTION

Node 1 Node2 LIN Bus

Master Node

Fig 2.1 Functional block diagram

3

Current measurement

sensor

ADC

CY8C29466

out

Tx Rx

AC load

Relay with driver circuit (ULN 2003)

TH8080

Temperature measurement

sensor

ADC

CY8C29466

out

Tx Rx

Fan

Relay with driver circuit (ULN 2003)

TH8080

TH8080 Tx

Rx LCD

CY8C29466

UART

LCD display

RS 232

Serial

Converter

Personal

Computer

2.1 Functional block diagram description

This project module contains one master and two nodes is shown in figure 2.1. The only

way to write the command and position id of the node at particular time of interval continuously

and read the data from the LIN bus to display on the LCD display. The first node sends

information of the current value. The second node sends the information of the temperature value.

The master first sends the command to any one of the node followed by the node position id

on the LIN bus. On the other side the position of the nodes are reading the command and id from

the LIN bus, but here the first node1 sends their parameter information after some time interval

the node2 send their parameter information on the LIN bus.

Then the particular time of the interval the master will sent the another node position id and

command. On the other side first node1 received the command from the LIN bus and to do the

corresponding control the device. During this time the remaining node will not take any action on

the LIN Bus. For more details described about the LIN on the appendixes.

2.2 Integrated LIN Controller

Integrated LIN peripherals cause a lower CPU load than do stand-alone controller. But in

our PSoC controller, we developed the programmable integrated LIN peripherals by using

configurable devices with more than one timers, serial transmitter and serial receiver. The most

critical factor is the amount of time required to write/ read to the LIN peripheral. In the case of

configuring an on-chip LIN controller, The LIN registers are addressed using the internal

address/data bus designed for high-speed access. In the case of a stand-alone LIN chip the CPU

uses its external address/data bus or a serial communication link, which of course is slower. The

CPU load an on chip LIN is approximately one-half of a stand-alone LIN chip. A LIN node using

an integrated LIN peripheral has a reliability advantage over a system using a standalone LIN chip

because of its smaller form factor.

4

Configurable LIN Controller Circuit Diagram: The circuit diagram shows the configurable inbuilt LIN controller connected with the LIN transceiver TH8080.

Fig 2.2 The circuit diagram of inbuilt LIN controller

5

2.3 EAGLE View PCB Design and Description

The PCB was designed by using the EAGLE editions. We can add an auto router module or a schematic editor to the Layer Editor. The Layout Editor, which allows to design Printed Circuit Boards. In our PCB board having the facilities of serial port interface with PC and LCD display interfacing and also it having the feature of both we can use stand alone system controller or inbuilt LIN controller by the small changes to the connector on the board. The schematic and board diagrams as shown in figure 2.3.

Fig 2.3 The circuit diagram design on the EAGLE software

6

2.4 EAGLE View Board Design:

Fig 2.4 The board design on the EAGLE software

7

2.5 Current Measurement

The current measurement was accomplished by using the CT coil type measurement sensor. It is working under the principle of Induced Electro Magnet Flux variation. It varies the current in the range from 0 Amps to 50Amps. It was connected with the signal conditioning circuit.

When the AC load is OFF condition at the same time the output of the signal condition circuit voltage is zero. Due to the consumption of the load current flow through the CT coil during the AC load in ON condition the secondary coil is induced. Now it’s generates the current. As the secondary coil connected with signal conditioning circuit. The output voltages can be measured according to the load current variation.

The output voltage from the signal conditioning circuit given to the input of the microcontroller inbuilt ADC. The microcontroller reads the input analog voltage form PIN AMUX 0 and converts into digital form to display on the LCD in the Amps, and transfers the values through the LIN Bus on the network. The complete arrangement setup as shown in figure 2.5.

Fig 2.5 The current measurement arrangement

8

ADC LCD

Tx, Rx

CY8C29466

Signal conditioning circuit

Load

AC source

LCD Display

LIN Transceiver

2.6 Temperature Measurement

The Temperature measurement was accomplished by using the Thermistor type measurement sensor. It is working under the principle of resistance change corresponding to the temperature variation. It varies the current in the range from 90k ohm’s to 2k ohm’s. It was connected with the signal conditioning circuit.

When temperature is at zero condition the bridge is balanced at the same time the output voltage is zero. When temperature increases the resistance of the temperature measurement sensor varies it will affect the balance of the bridge, at the result we can get the output voltages on the signal conditioning circuit according to the temperature variation.

The output voltage from the signal conditioning circuit given to the input of the microcontroller inbuilt ADC. The microcontroller reads the input analog voltage form PIN AMUX 0 and converts into digital form to display on the LCD in the DegC, and transfers the values through the LIN Bus on the network. The complete arrangement setup as shown in figure 2.6.

Fig 2.6 The temperature measurement arrangement

9

ADC LCD

CY8C29466

Tx, Rx

Signal conditioning

circuit

Temperature sensor

LCD Display

LIN Transceiver

2.7 Experimental Setup for Slave Node 1

Figure 2.7 shows the experimental setup for current measurement system (slave node1).

Fig 2.7 Slave node1

11

2.8 Experimental Setup for Slave Node 2

Figure 2.8 shows the experimental hardware setup for temperature measurement system (Slave Node 2).

Fig 2.8 Slave node 2

12

2.9 Experimental Setup for Master Node

Figure 2.9 shows the experimental hardware setup for master node.

Fig 2.9 Master node

13

3. SOFTWARE DESCRIPTION

3.1 PSoC Designer

PSoC Designer™ is the revolutionary Integrated Design Environment (IDE) that we can use to customize PSoC® to meet our specific application requirements. PSoC Designer software accelerates system bring-up and time-to-market. Develop our applications using a library of pre-characterized analog and digital peripherals in a drag-and-drop design environment. Then, customize your design leveraging the dynamically generated API libraries of code. Finally, debug and test your designs with the integrated debug environment including in-circuit emulation and standard software debug features.

Fig 3.1 PSoC designer IDE

It is a powerful, feature rich development tool for Cypress microcontrollers. It is designed to provide the programmer with the easiest possible solution for developing application for embedded systems, without compromising performance or control.

14

3.2. Flowchart and Functions description

Source Code Files:

Lin20CoreAPI.asm: This file has all the functions for the LIN core API.

Lin20NodeConfiguration.asm: This file has all the functions for the node configuration.

Lin20PhysicalLayer.asm: This file has all the code related to the proper operation of the LIN firmware.

RamVariables.asm: This file has all RAM variable allocations.

SignalTable.asm: This file has the Message table and the Protected ID table. This file must be modified according to the LDF.

ScheduleTable.asm: This file has the Schedule tables used in the master design. This file must be modified according to the LDF.

LinPowerManagement.c: This file has the functions that are required for the go to sleep and wakeup operations of the LIN master.

NodeConfigUtilities.c: This file has some functions that can be used for node configuration functions.

Header Files:

Lin20CoreAPI.h: This file has all the function prototypes for the Lin20CoreAPI.asm file.

Lin20NodeConfiguration.h: This file has all the function prototypes for the Lin20Nodeconfiguration.asm file.

Lin20Defines.h: This file has the variable types defined in the LIN specifications.

Lin20Master.h: This file has the definitions of different constants and flags used in the firmware.

LinPowerManagement.h: This file has the function prototypes for the LinPowerManagement.c file.

NodeConfigUtilities.h: This file has the function prototypes for the NodeConfigUtilities.c file

15

Flow Chart for Main Program:

The code is a simple demonstration if LIN protocol data transfer.

NO

YES

NO

YES

No

YES

YES

16

Main

Initialize System from PRO (Hard start)

Transmit LIN Message

Read Counter

Transmits turned off

Check LIN Message (check LIN Msg)

New LIN Message Received

Parse the Message (check LINMsg)

Message

Type=1

Read A/D reference (read A2C)

Read A/D current (Read 3201)

Use Tx DIP address for transmission

Assemble new message using new source ID

Wait for pending Message (wait AND DeqZ)

Output LIN Message

LIN Header Flow Chart:

17

LIN Message Flow Chart:

18

Transmit and Receive Function Flow:

19

Master and Slave Nodes Configurations

Master Node Configuration:

The LIN master design uses dynamic reconfiguration and has three configurations, the Synchro Break Configuration, Data Transmission Configuration and the Data Reception Configuration. The Synchro Break Configuration generates the break field. The Data Transmission Configuration sends the synchronization byte and any data bytes to be transmitted followed by the checksum byte. The Data Reception Configuration receives the slave’s response data.

3.3 Synchro Break Configuration

Figure 3.3 shows the module placement for the Synchro Break Configuration. This configuration has one 8-bit counter (SB_Baud_Rate_Counter) that generates the baud clock. The output frequency of this clock generator is eight times the baud rate. There is a second 8-bit counter (SB_Bit_time_counter) that is used to generate an interrupt every bit time. Finally, there is a third 8-bit counter (Synchro_Break_Counter) that generates the actual break field.

Fig 3.3 Synchro Break Configuration.

20

3.4 Data Transmission Configuration

Figure 3.4 shows the user module placement for the Data Transmission Configuration. This configuration has one 8-bit counter that generates the baud rate (DT_Baud_rate_counter), one 8-bit counter that is used to generate interrupts every bit time for detecting bit errors (DT_Bit_time_counter), and one TX8 User Module to transmit data (TX8). The baud rate generator is configured to generate a clock eight times that of the baud clock and feed the TX8 block’s clock input.

Fig.3.4.Data Transmission Configuration

3.5 Data Reception Configuration

Figure 3.5 shows the user module placement for the Data Reception Configuration. This has one 8-bit counter that generates the baud rate (DR_Baud_rate_counter), one 8-bit counter that is used to generate interrupts every five bit times for detecting the slave non-response timeout (DR_Bit_time_counter), and one RX8 User Module that receives data (RX8). The DR_Baud_rate_counter is configured to generate a clock eight times that of the baud clock and feed the RX8 block’s clock input. The received bytes are transferred to the temporary buffer inside the RX8 ISR.

Fig.3.5 Data Reception Configuration

21

Calculation of CPU Overhead Over: The following calculations are based on a baud rate of 19.2 kbps and CPU speed of 24 MHz For lower baud rates, the CPU overhead is less.

A frame of 1 byte being transmitted: Total time for break/synch: This is the sum of the time taken in the synchro break ISR and inside the bit time counter ISR.

Time taken in synchro break ISR = 36 µS.

Time taken inside the bit time counter ISR = 14 * 2.63 µS =36.82 µS.

Transmission: 3 bytes sent are synch byte, data byte and checksum. Total time is time taken by the TX ISR and the TX bit time counter ISR.

Time taken by TX ISR = 3 * 2.42 µS = 7.26 µS.

Time taken by bit time ISR = 30 * 2.7 µS = 81 µS.

Time taken in bit time ISR at frame complete = 41.21 µS.

Total time taken by ISRs = 202 µS.

Total bits in frame = 54.

Total frame time = 1.4 * 54 * 1/19.2K = 3.93 mS.

Overall CPU overhead = 202 µS / 3.93 mS = 5.14%.

For calculation purposes, the worst case frame length of 1 byte was used. For an 8-byte frame, the overhead is reduced to 4.5%.

22

A frame of 1 byte being received: Total time for break/synch: This is the sum of the time taken in the synchro break ISR and inside the bit time counter ISR.

Time taken in synchro break ISR = 36 µS.

Time taken inside the bit time counter ISR = 14 * 2.63 µS =36.82 µS.

Transmission: 1 synch byte, data byte and checksum. Total time is time taken by the TX ISR and the TX bit time counter ISR.

Time taken by TX ISR = 1 * 2.42 µS = 2.42 µS.

Time taken by bit time ISR = 10 * 2.7 µS = 27 µS.

Reception: 1 data byte.

Time taken by RX ISR = 1 * 3.96 µS = 3.96 µS.

Time taken by RX bit time counter ISR = 4 * 1.13 µS = 4.52.

Frame reception complete during checksum byte = 69.96 µS. (The RX ISR time during checksum byte is different.)

Total time = 180.68 µS.


Total frame time = 1.4 * 54 * 1/19.2K = 3.93 mS.

Overall CPU Overhead = 180.68 µS / 3.93 mS = 4.59%.

For calculation purposes, the worst case frame length of 1 byte was used. For an 8-byte frame, the overhead will come down to 2.5%.

23

Slave Node Configuration:

The LIN slave design has two configurations, the Synchro Reception Configuration and the Data Reception Configuration. The Synchro Reception Configuration detects the break/synch signal and calculates the master’s bit rate. The Data Reception Configuration receives the protected identifier, decodes it and then either receives data from the master or sends a response to the master.

3.6 Synchro Reception Configuration

Figure 3.6 shows the module placement for the Synchro Reception Configuration. This configuration has one 16-bit timer to find the timings between the rising and falling edges of the break/synch signal and one 16-bit counter for timeout operation. The RX pin is routed to the capture input of the timer and configured to capture either rising edge or the falling edge of the input signal. Also, the GPIO interrupt is enabled and all the calculations take place inside the GPIO ISR.

Fig.3.6.Synchro Reception Configuration

24

3.7 Data Reception Configuration

Figure 3.7 shows the module placement for the Data Reception Configuration. This has one 8-bit counter that generates the baud rate, one 8-bit counter that generates interrupts at bit time to either detect timeouts while receiving data or to check bit errors while transmitting data, one RX8 User Module that receives data, and one TX8 User Module that transmits data. The baud rate generator is configured according to the bit rate calculated during the break/synch detection stage. During data reception, the bit time counter generates an interrupt every five bit times and a timeout counter is decremented.

If the frame is not completed within this timeout (if the master stops transmitting), the Synchro Reception Configuration is loaded. When transmitting, this timer generates an interrupt every bit time. Inside the bit time counter ISR, the states of TX and RX pins are compared. If they do not match, then it is taken as a bit error and the transmission is aborted and the Synchro Reception Configuration is reloaded.

Fig.3.7.Data Reception Configuration

25

A frame of 1 byte being received:

Total time for Break/Synch = 224 µS.

Known ID received, RX initialized = 16 µS.

1 byte to received = 7 µS.

Frame reception complete (checksum received) = 73 µS.

Total time = 320 µS.


Total frame time = 1.4 * 54 * 1/19.2K = 3.93 ms.


For calculation, the worst case frame length of 1 byte was used. For an 8-byte frame, the overhead is reduced to 4%.

A frame of 1 byte being transmitted:

Total time for Break/Synch = 224 µS.

Known ID received, TX initialized = 39 µS.

2 bytes to be transmitted (1 byte + checksum) = 2 * Single

Byte transmitted = 14 µS.

All bytes transmitted = 50 µS.

Total time = 327 µS.


Total frame time = 1.4 * 54 * 1/19.2K = 3.9 3 ms.


For calculation, the worst case frame length of 1 byte was used. For an 8-byte frame, the overhead is reduced to 4%.

26

4. TEST AND ANALYSIS

4.1 CT COIL TYPE CURRENT SENSOR READINGS

S.No AC Load in watts Current in Amp (Theoretical )

Measured current in Amp

1 10 0.045 0.056

2 25 0.11 0.13

3 40 0.18 0.22

4 60 0.27 0.32

5 100 0.45 0.52

Without AC load the minimum output current is 0 Amp. The maximum output current is 5 Amp. The CT gives the output current for every 1W variation 0.0052 Amp.

27

0

0.1

0.2

0.3

0.4

0.5

0.6

10 25 40 60 100

0utput current in Amp

0utput current

AC LOAD in Watts

4.2 TEMPERATURE SENSOR READINGS:

Using a thermistor to measure temperature is described in Application Note AN2017 “A Thermistor-Based Thermometer, PSoC Style.” A thermistor has a non-linear transfer function. The Steinhart-Hart equation describes the resistance change of a semiconductor thermistor as related to its temperature. Equation (1) shows it to be a 3rd-order logarithmic polynomial using three constants (A, B, C):

Where

A, B, and C are empirical constants. R is the thermostat’s resistance. Tk is the temperature in Kelvin’s.

The next equation shows the temperature in Celsius:

Above equation that for temperature calculations, knowing the thermistor resistance and its function approximation coefficients is required. These coefficients are often given in the thermistor data sheet or can be found from a resistance table by using any curve-fitting technique.

28

PSoC Style Temperature measurement: The measurement cycle consists of two stages.

During the first stage, the reference voltage is applied to the resistive divider and ADC

code is collected. During the second stage, the reference voltage is applied and ADC code is collected. The thermistor resistance is calculated by subtracting the two ADC code values, and . The following equations show the resistance-measuring scheme:

The voltage level on the thermistor is set to (1.3V) reference voltage. is

the voltage level on the thermistor during application of the (2VAGND 2.6V) reference

voltage. Is the cumulative offset voltage on the bottom lead of the thermistor. is the

ADC offset voltage. is the thermistor resistance. is the reference resistor value.

29

PSoC style of Thermistor connection: Figure 4.2 shows a temperature measurement circuit using the proposed method of thermistor-to-PSoC connection.

Fig.4.2. Temperature Measuring using Two Pins on Port 0

The ADC code value for the schematic in figure 4.2.2 must be calculated by the given equation.

GAIN is the instrumentation amplifier gain (equal to 1). Note that the unity gain PGA can be used instead of the INA. But the INA is useful for other functions such as source voltage and current measurements.

30

Temperature Readings:

S.No Temperature in Deg C Output Resistance in ohm

1 25 10000

2 30 5465.2

3 35 4989.8

4 40 4478.3

5 45 3938.6

6 50 3566.9

7 55 2985.1

8 60 2487.1

Graphical Representation:

31

0

2000

4000

6000

8000

10000

12000

25 30 35 40 45 50 55 60

Thermistor Resistance in ohm

Thermistor Resistance in ohm

Temperature in Deg C

5. CONCLUSION

The features of the LIN make them ideally suited for the many rugged application to which the LIN protocol is being adapted. Among the application finding solution with LIN are automobiles, trucks, trains, buses, airplanes, and agriculture, construction, mining, and marine vehicles. LIN based control systems are being used in factory and building automation and embedded control systems for machines, medical devices, domestic’s appliances and many other application.

Fault confinement is also a major benefit of LIN. Faulty nodes are automatically dropped from Bus, which prevents any single node from bringing a network down and assures that bandwidth is always available for critical message transmission. The also allows nodes to be added to a bus while the system is in operation, otherwise known as hot plugging.

Further we can implement the LIN with CAN network for Industrial Automation for measuring the parameters value and controller can automatically control the process variables or the control elements. We can also implement heriraical control in the LabVIEW based application.

32

APPENDICES

LIN Overview:

The LIN bus, Local Interconnect Network, is an asynchronous, 1 wire, single master, multiple slave networks. It is most commonly used in automobile networks.

Features of the PSoC LIN Bus 2.0: Single master, multiple slaves - up to 16 slaves. Message-based protocol. Single wire - maximum 40 m. Data rates of 2.4K, 4.8K, 9.6K and 19.2K are supported by master. Slaves capable of synchronizing to any baud rate from 2K to 20K. Self synchronization of slaves to master’s speed. Data format similar to common serial UART format. Safe behavior with data checksums and bit-error detection. 100% LIN Bus 2.0 protocol-compliant. Master design uses minimal resources (only three digital blocks) and is easy to implement

(using overlapping configurations). Slave designs use minimal resources (only four digital blocks) and are easy to implement

(using overlapping configurations). The slave design for the CY8C29X46 device family uses the least amount of system resources.

The PSoC design IP is provided for master and slave nodes in the following device families:

CY8C29x66 Industrial CY8C27x43 Automotive CY8C27x43 Industrial CY8C21x34 Industrial

LIN Frames and Frame formats: LIN Frame: The LIN communication takes place in frames. Figure A shows the structure of a frame.

Figure A. Structure of a LIN Frame

It is made of a break field followed by 4 to 11 byte fields. Each byte field is transmitted as a serial byte as shown in figure B.

Figure B. Structure of a Byte Field

Break Field: The break symbol is used to signal the beginning of a new frame. It is the only field that does not comply with figure B. A break is always generated by the master and is at least13 bits of dominant value, including the start bit, followed by a break delimiter, as shown in figure C. The break delimiter is at least one nominal bit-time long. A slave node uses a break detection threshold of 11 nominal bit times.

Fig C. The Break Field Synch Byte: The synch byte is sent to the slave to synchronize to the master’s baud rate. The synch byte is nothing but a data field with 0x55 as data. The synch byte is shown in figure D.

Fig D. The Synch Byte

The slave measures the time between the start bit and the fourth falling edge of the synch byte. Then dividing this by eight, gives the single bit time. Based upon this time, the slave sets the clock to its UART so that it can send/receive the data bytes of the frame at the master’s bit rate.

Protected Identifier: The byte that follows the synch byte is the protected identifier. This byte has two parts. Bits 0-5 form the actual identifier (0 to 63). Bits 6 and 7 form the identifier parity. The identifiers can be split into four different categories:

Identifiers 0 - 59 are used for signal-carrying frames. Identifiers 60 (0x3C) and 61 (0x3D) are used for diagnostic frames. Identifier 62 (0x3E) is used for user defined extensions. Identifier 63 (0x3F) is used for future protocol enhancements.

Data: The protected Identifier is followed by 1 to 8 bytes of data. The number of data bytes carried by a frame is defined in the LIN definition file (LDF). This file also defines whether the data bytes are sent from the master to a slave or from a slave to the master. Data that are longer than 1 byte are transmitted LSB first (Little Endian mode). Checksum: The last field of a frame is the checksum. The checksum contains the inverted 8-bit sum with carry over all data bytes or all data bytes and the protected identifier. Checksum calculation over only the data bytes is called classic checksum and is used for communication with LIN bus 1.x slaves. Checksum calculation over both the data bytes and the protected identifier byte is called enhanced checksum and it is used for communication with LIN bus 2.0 slaves. The check-sum is transmitted in a byte field. Use of classic or enhanced checksum is managed by the master node and determined per frame identifier; classic in communication with LIN bus 1.x slave nodes and enhanced in communication with LIN bus 2.0 slave nodes. Identifiers 60 (0x3c) to 63 (0x3f) always use classic checksum. Frame Transfers on the LIN Bus: Only the master initiates a frame. The master allocates a time slot for each frame. The master also sends the frames in a predetermined sequence. The information sequence of the frames and the time slot for each frame is available in a table called Schedule table. Each entry of this table describes the protected identifier of the frame to be initiated and also the time to be allotted for that frame. When all the frames in the Schedule table have been transmitted, the next cycle starts again from the first frame of the table. The LIN 2.0 API has many functions to manage the Schedule table. It has functions to select tables, to initiate the transfer of the next frame in the current table, and so on.

Cypress controller CY8C29466 description: Powerful Harvard-architecture processor:

M8C processor speeds to 24 MHz Two 8 × 8 multiply, 32-bit accumulate Low power at high speed Operating voltage: 3.0 V to 5.25 V Operating voltages down to 1.0 V using on-chip switch mode pump (SMP) Industrial temperature range: –40 °C to +85 °C

Advanced peripherals (PSoC® blocks): 12 rail-to-rail analog PSoC blocks provide

Up to 14-bit analog-to-digital converters (ADCs) Up to 9-bit digital-to-analog converters (DACs) Programmable gain amplifiers (PGAs) Programmable filters and comparators

16 digital PSoC blocks provide 8- to 32-bit timers, counters, and pulse-width modulators (PWMs) Cyclical redundancy check (CRC) and pseudo random sequence (PRS)

modules Up to four full-duplex universal asynchronous receiver transmitters

(UARTs) Multiple serial peripheral interface (SPI) masters or slaves Can connect to all general-purpose I/O (GPIO) pins

Precision, programmable clocking:

Internal ±2.5% 24- / 48-MHz main oscillator 24- / 48-MHz with optional 32.768 kHz crystal Optional external oscillator, up to 24 MHz Internal oscillator for watchdog and sleep

Flexible on-chip memory:

32 KB flash program storage 50,000 erase/write cycles 2 KB static random access memory (SRAM) data storage In-system serial programming (ISSP) Partial flash updates Flexible protection modes Electrically erasable programmable read-only memory (EEPROM) emulation in flash

Programmable pin configurations:

25-mA sink, 10-mA source on all GPIOs Pull-up, pull-down, high Z, strong, or open-drain drive modes on all GPIOs Eight standard analog inputs on GPIOs, plus four additional analog inputs with restricted routing Four 40 mA analog outputs on GPIOs Configurable interrupt on all GPIOs

Additional system resources:

I2C slave, master, and multi-master to 400 kHz Watchdog and sleep timers User-configurable low-voltage detection (LVD) Integrated supervisory circuit On-chip precision voltage reference

Complete development tools: Free development software (PSoC Designer™) Full-featured in-circuit emulator (ICE) and programmer Full-speed emulation Complex breakpoint structure 128 KB trace memory Complex events C compilers, assembler, and linker

Pinouts: The CY8C29x66 PSoC device is available in a variety of packages which are listed and illustrated in the following tables. Every port pin (labeled with a “P”) is capable of Digital I/O. However, VSS, VDD, SMP, and XRES are not capable of Digital I/O.

Fig E. CY8C29466 28-Pin PSoC Device

LIN transceiver TH8080 description:

Compatible to LIN Specification Version 1.3 and 2 Compatible to ISO9141 functions Baud rate up to 20 kBaud Small SOIC8 package Operating voltage V, = 7 to 18 V Low current consumption of typ. 24µA High EMI immunity Fully integrated receiver filter Bus terminals proof against short-circuits and transients in the automotive environment High impedance BUS pin in case of loss of ground and under voltage condition High signal symmetry for using in RC – based slave nodes up to 2% clock tolerance Load dump protection (40V)

Pin Diagrams:

REFERENCES

1. Mathivanan.N, PC-Based Instrumentation: Concepts and Practice (2007), published by Prentice-Hall of India, New Delhi.

2. Dogan Ibrahim ‘Microcontroller Projects in C for the 8051’, Published on 2003.

3. Stuart Ball.R, ‘Embedded Microprocessor System: Real World Design’ Second Edition on 1998.

4. Ken Arnold ‘Embedded Controller Hardware Design’ Second Edition. 5. Stuart Ball.R, ‘Analog Interfacing to Embedded Microprocessor: Real World

Design’ Third edition on 2000. 6. O’Reilly, ‘Programming Embedded Systems in C and C++’, First Edition on

1999. 7. Tim Wilmshurst, ‘Designing Embedded Systems with PIC Microcontrollers

Principles and Applications’ First Edition on 2007. 8. Dominique Placko, ‘Fundamentals of Instrumentation and Measurement’

Published on 2007. 9. Craig Nemecek, ‘Easy PSoC’ First Edition on 2003. 10. ‘PSoC Development Tool Selector Guide’, Copy Rights by Cypress

Semiconductor on 2003. Web Site:

www.cypresssemiconductor.com www.subbus.org www.embeddedrelated.com www.ebanorama.com

lin bus based data acquisition and control system using psoc

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