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EE 332

DEVICES AND CIRCUITS II

Lecture 19

DEFERENTIAL AMPLIFIERS ANDOPERATIONAL AMPLIFIER DESIGN (2)

OPERATIONALAMPLIFIERDESIGN

/INTRODUCTION

TypicalOperationalAmplifierTopology

Differential

inputstage

(highgain)

Singleended

secondgainstage

(highgain)

Lowgainlow

impedanceoutput

stage

Note:Thisassumesthattheoutputistakendifferentialaswe

getvod/2ontheoutputandvod/2ontheother.Inotherwords,

ifweonlyuseoneoutputwelosehalfofthetotalgain

DIFFERENTIALAMPLIFIERS

/COMMONMODEREJECTIONRATIO

Wantadifferentialamplifiertoamplifyvid,butvicWantthedifferentialamplifiertorejectthecommon

modeinput

( / / )

( / / )

11 2 ( )

1

vd m C o

m C ovc

E m

A

1 2 ( )E m

g R rCM RR

g R rA

R gr

C M R R R g r

= + +

= = + +

Commonmoderejectionratio(CMRR):theratio

betweensignalgaintonoisegain

Lecture Goals

Understanding of concepts related to:

Differential Amplifiers/Common-Mode RejectRatio (CMRR)

Operational Amplifiers Design/Stage One Operational Amplifiers Design/Stage Two

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DIFFERENTIALAMPLIFIERS

/COMMONMODEREJECTIONRATIO1

1 2 ( ) 2E m E m

CM RR R g R g r

= + + From:

and

,

,

1;

2

2

EE BE ON

RE C RE

E

C

m

T

EE BE ON

m

E T

V VI I I

R

Ig

V

V V

g R V

= ==

= Q

Intendto

achievehigh

CMRR,high

REandgm,

however,high

RE would

reducegm

Usingcurrentsource,highIE induceshighgm

vi1 vi2

VCC

RC2

vo2

vo1

RC1

RE

VEE

OPERATIONALAMPLIFIERDESIGN

/STAGEONE

10

1 2 5.1 (44 0.44 ) 454.3

20 log (454.3) 53.15dB

CM RR k m m

CM RR dB

= + + = = =

vi1

vi2

VCC

RC2

vo2

vo1

RC1

RE

11 2 ( )

E mCM RR R g

r= + +ANSWER

ANSWER

Notgoodenoughformany

applications

OPERATIONALAMPLIFIERDESIGN

/STAGEONE

,

33 3

31,2

1,2

3

1

2

CC EE BE ON

EE

ref

A CEE E c o

EE

CC

m

T T

A CE

T

V V VI

R

V VR r rI

IIg

V V

V VC M R R

V

+ =+= = =

= =+

Typicalvalues,and 3

100A

CE A

V V

V V

4000C M R R

=

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OPERATIONALAMPLIFIERDESIGN

/STAGEONEWeknowhowtodesignanimproveddifferentialamplifier

Useactivecurrentsourceforbettercommonmodeperformance

vi1 vi2

VCC

RC2

vo2

vo1

RC1

RE

vi1

vi2

VCC

RC2

vo2

vo1

RC1

Rref

Q1 Q2

Q4Q3

IEE

REE

OPERATIONALAMPLIFIERDESIGN

/STAGETWO

Possiblesecondstage:

Inthiscase,

3 20.7

4.3

B C E E V V V

V

= = += Q2isnotinF.A.R.

ThisistheDClevel

shiftingproblem

vi1

vi2

RC

RC

Q1 Q2

IEE R

EE

RE

RE

RE3

Q3

vo

VCC

betweenstages.VEE

OPERATIONALAMPLIFIERDESIGN

/STAGETWO

vi1

vi2

RC

RC

Q1 Q2

IEE R

EE

RE

RE

Q3

vo

Solution:Usepnp

commonemittersecondstage

Now:2 3

4.3C B

V V V=Q2isinF.A.R.

VCC

VEE

OPERATIONALAMPLIFIERDESIGN

/STAGETWO

1 20

5

i i

CC EE

V V V

V V V

= == =

2 2 2, 0

C B CV V V >

Possiblesecondstage: Assume:

WemustmaintainQ1

andQ2inforward

activeregion.

Q2inF.A.R.,then

vi1

vi2

RC

RC

Q1 Q2

IEE R

EE

RE

RE

RE3

Q3

vo

VCC

VEE

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DIFFERENTIALAMPLIFIERS

/STAGETWOSINGLEENDEDINPUT

Overallsystemislinear:

Sothetotalsystembehaviorcanbeobtainedby

superposition

1 1 2

2 1 2

1 1

2 2 2 2

1 1

2 2 2 2

vc vd vc vd

o oc od vc i c vd i d i i

vc vd vc vd

o oc od vc i c vd i d i i

A A A Av v v A v A v v v

A A A Av v v A v A v v v

+ = + = + = + += = = +

Forasingleendedinput: 2 0iv =1 1

2 1

2

2

vc vd

o i

vc vd

o i

A Av v

A Av v

+==

OPERATIONALAMPLIFIERDESIGN

/STAGETWO

vi1

vi2

Solution:Differential

tosingleended

conversion

Currentmirroractsto

makeadifferentialto

singleended

conversion.

vo

VCC

End of Lecture 19

OPERATIONALAMPLIFIERDESIGN

/STAGETWO

vi1

vi2

RCRC

Q1 Q2

IEE REE

RE

RE

Q3

vo

Weapplyhalfofthe

differentialinputsignal

toeachsideand

generatehalfof

amplifiedfirststage

outputsignalateach

side.

Inthisarrangement,we

waste(donotuse)half

oftheavailablegain.

VCC

VEE

1

V

84