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    VLSI

    design

    Lecture 1:

    MOS Transistor Theory

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    CMOS VLSI Design3: CMOS Transistor Theory Slide 2

    Outline

    Introduction

    MOS Capacitor

    nMOS I-V Characteristics

    pMOS I-V Characteristics

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    CMOS VLSI Design3: CMOS Transistor Theory Slide 3

    Introduction

    Treatment of transistors as something beyond idealswitches

    An ON transistor passes a finite amount of current

    Depends on terminal voltages Derive current-voltage (I-V) relationships

    Transistor gate, source, drain all have capacitance

    I = C ((V/(t) -> (t = (C/I) (V

    Capacitance and current determine speed

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    CMOS VLSI Design3: CMOS Transistor Theory Slide 4

    MOS Capacitor

    Gate and body form MOS capacitor

    Operating modes

    Accumulation

    Depletion Inversion

    polysilicon gate

    (a)

    silicon dioxide insulator

    p-type body+-

    Vg < 0

    (b)

    +-

    0 < Vg < Vtdepletion region

    (c)

    +-

    Vg > Vt

    depletion regioninversion region

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    CMOS VLSI Design3: CMOS Transistor Theory Slide 5

    Terminal Voltages

    Mode of operation depends on Vg, Vd, Vs Vgs = Vg Vs Vgd = Vg Vd Vds = Vd Vs = Vgs - Vgd

    Source and drain are symmetric diffusion terminals By convention, source is terminal at lower voltage

    Hence V ds u 0

    nMOS body is grounded. First assume source is 0 too.

    T

    hree regions of operation Cutoff

    Linear

    Saturation

    s

    s

    s

    -

    - -

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    CMOS VLSI Design3: CMOS Transistor Theory Slide 6

    nMOS Cutoff

    No channel

    Ids = 0

    +-

    Vgs

    = 0

    n+ n+

    +-Vgd

    p-type body

    b

    g

    s d

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    CMOS VLSI Design3: CMOS Transistor Theory Slide 7

    nMOS Linear

    Channel forms

    Current flows from d to s

    e- from s to d

    Ids increases with Vds Similar to linear resistor

    +-

    Vgs > Vt

    n+ n+

    +-

    Vgd = Vgs

    +-

    Vgs > Vt

    n+ n+

    +-

    Vgs > Vgd > Vt

    Vds = 0

    0 < Vds < Vgs-Vt

    p-type body

    p-type body

    b

    g

    s d

    b

    g

    s dIds

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    CMOS VLSI Design3: CMOS Transistor Theory Slide 9

    I-V Characteristics

    In Linear region, Ids depends on

    How much charge is in the channel?

    How fast is the charge moving?

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    CMOS VLSI Design3: CMOS Transistor Theory Slide 10

    Channel Charge

    MOS structure looks like parallel plate capacitorwhile operating in inversion

    Gate oxide channel

    Qchannel =

    n n

    p-t pe od

    gd

    gate

    source

    -

    gs

    -drain

    ds

    channel-

    g

    s d

    g

    n n

    p-t pe od

    W

    L

    tox

    SiO2 gate oxide(good insulator, Iox = 3.9)

    polysilicongate

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    CMOS VLSI Design3: CMOS Transistor Theory Slide 11

    Channel Charge

    MOS structure looks like parallel plate capacitorwhile operating in inversion

    Gate oxide channel

    Qchannel = CV C =

    n n

    p-t pe od

    Vgd

    gate

    source

    -

    Vgs-

    drain

    Vds

    channel-

    Vg

    Vs Vd

    Cg

    n n

    p-t pe od

    W

    L

    tox

    SiO2 gate oxide(good insulator, Iox = 3.9)

    polysilicongate

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    CMOS VLSI Design3: CMOS Transistor Theory Slide 12

    Channel Charge

    MOS structure looks like parallel plate capacitorwhile operating in inversion

    Gate oxide channel

    Qchannel = CV

    C = Cg = IoxWL/tox = CoxWL

    V =

    -t

    V

    t

    s rc

    -

    V s-

    r i

    V s

    c l-

    V

    Vs V

    -t

    W

    L

    t x

    SiO2 t xi( i s l t r, Iox = 3.9)

    polysilicongate

    Cox = Iox / tox

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    CMOS VLSI Design3: CMOS Transistor Theory Slide 13

    Channel Charge

    MOS structure looks like parallel plate capacitorwhile operating in inversion

    Gate oxide channel

    Qchannel = CV

    C = Cg = IoxWL/tox = CoxWL

    V = Vgc Vt = (Vgs Vds/2) Vt

    -t d

    Vgd

    g t

    s rc

    -

    Vgs-

    dr i

    Vds

    c l-

    Vg

    Vs Vd

    g

    -t d

    W

    L

    t x

    SiO2 g t xid(g d i s l t r, Iox = 3.9)

    polysilicongate

    Cox = Iox / tox

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    CMOS VLSI Design3: CMOS Transistor Theory Slide 14

    Carrier velocity

    Charge is carried by e-

    Carrier velocity v proportional to lateral E-fieldbetween source and drain

    v=

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    CMOS VLSI Design3: CMOS Transistor Theory Slide 15

    Carrier velocity

    Charge is carried by e-

    Carrier velocity v proportional to lateral E-fieldbetween source and drain

    v= QE Q called mobility

    E =

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    CMOS VLSI Design3: CMOS Transistor Theory Slide 16

    Carrier velocity

    Charge is carried by e-

    Carrier velocity v proportional to lateral E-fieldbetween source and drain

    v= QE Q called mobility

    E = Vds/L

    Time for carrier to cross channel:

    t=

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    CMOS VLSI Design3: CMOS Transistor Theory Slide 17

    Carrier velocity

    Charge is carried by e-

    Carrier velocity v proportional to lateral E-fieldbetween source and drain

    v

    = QE Q called mobility E = Vds/L

    Time for carrier to cross channel:

    t= L / v

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    CMOS VLSI Design3: CMOS Transistor Theory Slide 18

    nMOS Linear I-V

    Now we know

    How much charge Qchannel is in the channel

    How much time teach carrier takes to cross

    dsI !

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    CMOS VLSI Design3: CMOS Transistor Theory Slide 20

    nMOS Linear I-V

    Now we know

    How much charge Qchannel is in the channel

    How much time teach carrier takes to cross

    channel

    ox 2

    2

    ds

    ds gs t ds

    ds gs t ds

    It

    W VC V V V

    L

    VV V V

    Q

    F

    !

    !

    !

    ox=

    WF

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    CMOS VLSI Design3: CMOS Transistor Theory Slide 21

    nMOS Saturation I-V

    If Vgd < Vt, channel pinches off near drain

    When V ds > Vdsat = Vgs Vt Now drain voltage no longer increases current

    dsI !

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    CMOS VLSI Design3: CMOS Transistor Theory Slide 22

    nMOS Saturation I-V

    If Vgd < Vt, channel pinches off near drain

    When V ds > Vdsat = Vgs Vt Now drain voltage no longer increases current

    2dsat

    ds gs t dsat I F !

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    CMOS VLSI Design3: CMOS Transistor Theory Slide 23

    nMOS Saturation I-V

    If Vgd < Vt, channel pinches off near drain

    When V ds > Vdsat = Vgs Vt Now drain voltage no longer increases current

    2

    2

    2

    dsatds gs t dsat

    gs t

    I F

    F

    !

    !

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    CMOS VLSI Design3: CMOS Transistor Theory Slide 24

    nMOS I-V Summary

    2

    cutoff

    linear

    saturatio

    0

    2

    2n

    gs t

    dsd s gs t ds ds dsat

    gs t ds dsat

    V V

    V I V V V V V

    V V V V

    F

    F

    !

    "

    Shockley1st order transistor models

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    CMOS VLSI Design3: CMOS Transistor Theory Slide 25

    Example

    0.6 Qm process (Example)

    From AMI Semiconductor

    tox = 100

    Q = 350 cm2

    /V*s Vt = 0.7 V

    Plot Ids vs. Vds Vgs = 0, 1, 2, 3, 4, 5

    Use W/L = 4/2 P

    14

    2

    8

    3.9 8.85 10350 120 /

    100 10ox

    W W WC A V

    L L L F Q Q

    y ! ! !

    0 1 2 3 4 5 0

    0 .5

    1

    1 .5

    2

    2 .5

    Vds

    Ids

    (mA)

    Vgs = 5

    Vgs = 4

    Vgs = 3

    Vgs

    = 2

    Vgs = 1

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    CMOS VLSI Design3: CMOS Transistor Theory Slide 26

    pMOS I-V

    All dopings and voltages are inverted for pMOS

    Mobility Qp is determined by holes

    Typically 2-3x lower than that of electrons Qn

    120 cm2

    /V*s in AMI 0.6 Qm process Thus pMOS must be wider to provide same current

    In this class, assume Qn / Qp = 2