jonah probell
TRANSCRIPT
JONAH PROBELLthe one and the only
Multiply Talented
Engineer Business man
ExpertiseEntrepreneurship
Group leadership
Project management
Intellectual property
Technology marketing
Technical sales
Processor architecture
Digital signal processing
Chip design and verification
Design with FPGAs
Technical writing and speaking
Digital video, image, graphics, and multimedia processing
Chip Design
The best way to keep on top of cutting edge chip design problems, solutions, and methodologies
TLA Three Letter Acronym
OVM Open Verification Methodology
VMM Verification Methodology Manual
ABV Assertion Based Verification
STA Static Timing Analysis
OCV On Chip Variation
DVFS Dynamic Voltage and Frequency Scaling
SAIF Switching Activity Interchange Format
DFT Design for Test
ATPG Automatic Test Pattern Generation
DFM Design for Manufacturing
The CE Food Chain
consumer electronics are made with chips
chips are madewith IP cores
IP Cores
IP cores are like blueprints and their designers like architects.
IP companies do not make chips but instead license their designs to chip makers.
YAP IP
Your Advanced Processor
a cache coherent symmetric multicoresuperscalar 32-bit RISC-DSPwith 128-bit SIMD extensions
as a GNU toolchain target and Linux host
The world’s first multicore programmable video processor capable of HD 1080p decoding H.264 and other codecs
Wikipedia Articles
IP cores IP core vendors
Hardwired blocks
Programmable video DSPs
Programmable DSP20 mm2
1990
Vid
eo
pro
ce
ss
or
co
st
(die
siz
e)
2000 2010
10 mm2
5 mm2
2 mm2
1 mm2
hardwired programmable
Negligiblecost difference
100%
0%
Pe
rce
nta
ge
of
vid
eo
ch
ips
th
at
are
pro
gra
mm
ab
le
0.18um0.13um
90nm65nm0.25um
0.35um 45nmprocesstechnology 32nm
Image Processing
progressive scan
interlaced
letter box
frame scaling
frame rate
System Data Flow
A partial exampleof a systemdata flow diagram
Interpolation
1D interpolation (audio)
2D interpolation (image) 3D interpolation (video)