isl6327eval5 user guide - renesas

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USER’S MANUAL AN1268 Rev 0.00 Oct 26, 2010 ISL6327EVAL5 Voltage Regulator Coupled Inductor Solution using the ISL6327 and ISL6609 AN1268 Rev 0.00 Page 1 of 18 Oct 26, 2010 Introduction Today’s microprocessors are continuing towards higher power consumption and functionality. Vcore regulators have the burden of increasing load demands coupled with tighter voltage regulation requirements. Power designers are challenged with the design of high performance regulators that can meet tight load regulation windows with increasing maximum load and transient requirements and falling output voltages. Add to that the push for higher efficiency solutions and decreasing PCB real estate; meeting today’s microprocessor power requirements is no simple task. Intersil ISL6327 With Coupled Inductors To help meet these design challenges Intersil offers a complete reference design and evaluation package that takes advantage of the features of the ISL6327 controller and an output filter topology using coupled inductors and fewer output capacitors. The ISL6327 controls a microprocessor core voltage, balances channel currents, and provides protective features for up to 6 synchronous buck channels in parallel. The controller uses a 8-bit DAC giving the user a digital interface to select the output voltage, which is precisely regulated to ±0.5% accuracy using differential remote voltage sensing. The DAC can be set up to read VR10 or VR11 VID codes. Other features of the controller include overcurrent, overvoltage, and undervoltage protection, internal over temperature protection, programmable output voltage offset, dynamic VID circuitry, and an IOUT pin that provides a voltage proportional to the load current. To meet the extremely fast load transients of microprocessors the ISL6327 utilizes Intersil’s proprietary Active Pulse Positioning (APA TM ) and Adaptive Phase Alignment (APA TM ) modulation scheme and continuous current sensing to achieve extremely fast load transient response with fewer output capacitors. ‘Coupled’ with the fast control scheme a new approach to the output filter can be implement using coupled inductors. Coupling of two phases on one core allows the use of a small output inductance for fast transient response without taking the hit in efficiency due to higher individual phase peak-to-peak current for an equivalent standard inductance. The ISL6327 and ISL6609 datasheets along with the latest documentation can be found on our website: www.intersil.com. ISL6327EVAL5 VRD Reference Design The evaluation kit consists of the ISL6327EVAL5 evaluation board, the ISL6327 datasheet, and this application note. The evaluation board is designed to meet the output voltage and current specifications shown in Table 1, with the VID DIP switches, SW2, set to 00101010 (1.35V). The board is configured for down conversion from 12V to the DAC setting. The evaluation board provides many test points, two types of power supply connectors, an on-board LGA775/771 socket for transient response evaluation and terminal connectors for DC load testing. An on-board LED is present to indicate the status of the PGOOD signal. The printed circuit board is implemented in 6-layer, 1-ounce copper. The layout and stackup are designed to emulate a real world CPU/VCORE implementation. The board schematic and BOM is provided at the end of the application note. Quick Start Evaluation The ISL6327EVAL5 is designed for quick start-up and evaluation. All that is required is a single ATX power supply. To begin evaluating the ISL6327EVAL5 follow the steps below. 1. Before doing anything to the evaluation board, make sure the “Enable” switch (EN1) is in the OFF position. 2. Using an ATX power supply, connect the 24-pin main power supply header to the “5V Power” connector (5V_PWR1) on the board. Next connect the 4-pin 12V header to the “12V Power” connector (12V_PWR1) on the board. 3. Set the “Static VID” DIP switch (SW2) to 00101010 (VID7:0 as printed on the silkscreen).Set SW1 to 0001. 4. Move the “Enable” switch (S1) to the ON position to begin regulation. After step 4, the ISL6327EVAL5 should be regulating the output voltage. The test points “TPVCORE1” and “TPGND1” can be used to monitor the output voltage initially to verify regulation. TABLE 1. ISL6327EVAL5 DESIGN PARAMETERS PARAMETER MAX TYPICAL MIN No Load VCORE Regulation 1.35V 1.33V 1.31V VCORE Tolerance +20mV -20mV Load Line Slope 1.25m Continuous Load Current 130A Load Current Step 100A Load Current Transient 1200A/s

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Page 1: ISL6327EVAL5 User Guide - Renesas

USER’S MANUAL

AN1268Rev 0.00

Oct 26, 2010

ISL6327EVAL5Voltage Regulator Coupled Inductor Solution using the ISL6327 and ISL6609

IntroductionToday’s microprocessors are continuing towards higher power consumption and functionality. Vcore regulators have the burden of increasing load demands coupled with tighter voltage regulation requirements. Power designers are challenged with the design of high performance regulators that can meet tight load regulation windows with increasing maximum load and transient requirements and falling output voltages. Add to that the push for higher efficiency solutions and decreasing PCB real estate; meeting today’s microprocessor power requirements is no simple task.

Intersil ISL6327 With Coupled InductorsTo help meet these design challenges Intersil offers a complete reference design and evaluation package that takes advantage of the features of the ISL6327 controller and an output filter topology using coupled inductors and fewer output capacitors.

The ISL6327 controls a microprocessor core voltage, balances channel currents, and provides protective features for up to 6 synchronous buck channels in parallel. The controller uses a 8-bit DAC giving the user a digital interface to select the output voltage, which is precisely regulated to ±0.5% accuracy using differential remote voltage sensing. The DAC can be set up to read VR10 or VR11 VID codes. Other features of the controller include overcurrent, overvoltage, and undervoltage protection, internal over temperature protection, programmable output voltage offset, dynamic VID circuitry, and an IOUT pin that provides a voltage proportional to the load current.

To meet the extremely fast load transients of microprocessors the ISL6327 utilizes Intersil’s proprietary Active Pulse Positioning (APATM) and Adaptive Phase Alignment (APATM) modulation scheme and continuous current sensing to achieve extremely fast load transient response with fewer output capacitors.

‘Coupled’ with the fast control scheme a new approach to the output filter can be implement using coupled inductors. Coupling of two phases on one core allows the use of a small output inductance for fast transient response without taking the hit in efficiency due to higher individual phase peak-to-peak current for an equivalent standard inductance.

The ISL6327 and ISL6609 datasheets along with the latest documentation can be found on our website: www.intersil.com.

ISL6327EVAL5 VRD Reference DesignThe evaluation kit consists of the ISL6327EVAL5 evaluation board, the ISL6327 datasheet, and this application note. The evaluation board is designed to meet the output voltage and current specifications shown in Table 1, with the VID DIP switches, SW2, set to 00101010 (1.35V).

The board is configured for down conversion from 12V to the DAC setting. The evaluation board provides many test points, two types of power supply connectors, an on-board LGA775/771 socket for transient response evaluation and terminal connectors for DC load testing. An on-board LED is present to indicate the status of the PGOOD signal.

The printed circuit board is implemented in 6-layer, 1-ounce copper. The layout and stackup are designed to emulate a real world CPU/VCORE implementation. The board schematic and BOM is provided at the end of the application note.

Quick Start EvaluationThe ISL6327EVAL5 is designed for quick start-up and evaluation. All that is required is a single ATX power supply. To begin evaluating the ISL6327EVAL5 follow the steps below.

1. Before doing anything to the evaluation board, make sure the “Enable” switch (EN1) is in the OFF position.

2. Using an ATX power supply, connect the 24-pin main power supply header to the “5V Power” connector (5V_PWR1) on the board. Next connect the 4-pin 12V header to the “12V Power” connector (12V_PWR1) on the board.

3. Set the “Static VID” DIP switch (SW2) to 00101010 (VID7:0 as printed on the silkscreen).Set SW1 to 0001.

4. Move the “Enable” switch (S1) to the ON position to begin regulation.

After step 4, the ISL6327EVAL5 should be regulating the output voltage. The test points “TPVCORE1” and “TPGND1” can be used to monitor the output voltage initially to verify regulation.

TABLE 1. ISL6327EVAL5 DESIGN PARAMETERS

PARAMETER MAX TYPICAL MIN

No Load VCORE Regulation 1.35V 1.33V 1.31V

VCORE Tolerance +20mV -20mV

Load Line Slope 1.25m

Continuous Load Current 130A

Load Current Step 100A

Load Current Transient 1200A/s

AN1268 Rev 0.00 Page 1 of 18Oct 26, 2010

Page 2: ISL6327EVAL5 User Guide - Renesas

ISL6327EVAL5

ISL6327EVAL5 Board Features

Input Power Connections

The ISL6327EVAL5 includes two different methods for powering up the board. The first method allows for the use of an ATX power supply. The 24-pin header, 5V_PWR1, allows for the connection of the main ATX power connector, while the 4-pin header, 12V_PWR1, connects the 12V AUX power. It is very important that both connections are secure and the EN1 switch is in the OFF position before switching on the ATX supply.

The second method of powering the ISL6327EVAL5 board is with bench power supplies. Four female banana jacks are provided for connecting bench-top supplies. A +5V, 1A and +12V, 20A supply will be needed for full evaluation. Connect the +5V terminal to the 5V1 jack and the +5V GND terminal to 5V_GND1. Connect the +12V terminal to 12V1 and the +12V GND terminal to 12V_GND1. Voltage sequencing is not required when powering the evaluation board.

Once power is applied to the board, the PGOOD LED indicator will illuminate red. With EN1 in the OFF position, the ENABLE input of the ISL6327 is held low and the start-up sequence is inhibited.

Output DC Power Connections

The ISL6327EVAL5 output can be exercised using a DC electronic load through the output terminal lugs labeled VCORE1 and GND1. Tie the positive load connection to VCORE1 and the negative load connection to GND1. A shielded scope probe test point, TP1, allows for inspection of the output voltage, VCORE. This probe is connected to VSENSE through 0 resistors on the back of the PCB labeled VTT_R1 and VTT_R2.

LGA775/771 VTT Evaluation

To fully exercise the regulation of the ISL6327EVAL5 a LGA775/771 VTT is needed. A LGA775/771 VTT socket is populated on the PCB. To ensure the ISL6327 regulates to the die sense location on the VTT, 0 resistors are populated on the back side of the PCB labeled R40 and R42. These must be populated for correct voltage measurements when using the VTT.

After inserting the interposer and VTT in the LGA775/771 socket a differential voltage probe should be connected to the VCC-REG-N/VSS-REG-N connector for voltage monitoring and the AMP and GND connector for load measurements.

For accurate measurements with the differential probes you must make sure that the ground terminal of your oscilloscope is connected to the ground plane of the ISL6327EVAL5. An easy way to do this is use a wire to connect the GND terminal of the scope to one of the GND test points on the ISL6327EVAL5 (TP10 for example).

The VTT must also be powered with +5V and +12V at the 4-pin power input connector. Refer to your VTT users guide and software for details on exact test setup and software use.

VID Setting

The VID input on the ISL6327EVAL5 can be set by using the on board SW2 DIP switch. The switches are labeled VID7 to VID0. Or the VID can be controlled through the VTT software. To select which method controls the VID pins of the ISL6327 the jumpers J_VID7 to J_VID0 need to be placed accordingly.

For VTT control of the VID, place the jumper hats on pins 1 and 2 of the 3-pin connector for J_VID7 - J_VID0. The 4th switch on SW1 should also be switched to VTT (labeled on the PCB silk-screen).

To allow the DIP switches to control the VID move switch 4 of SW1 DIP switch to DEMO and move the jumper hats to pins 2 and 3 of J_VID7 to JVID_0.

The VID DIP switches should be preset to 00101010 (1.35V with 20mV offset). If another output voltage level is desired, refer to the ISL6327 datasheet for the complete DAC table and change the VID switches accordingly.

Both VR10 and VR11 VID codes can be used with the ISL6327EVAL5. To use VR11 move switch 1 of SW1 DIP switch towards VR11. To use VR10 move switch 1 of SW1 towards VR10.

Enabling the Controller

In order to enable the controller, the board must be powered and a VID code must be set. If these steps have been properly followed, the regulator is enabled by toggling the “ENABLE” switch (EN1) to the ON position. When EN1 is switched, the voltage on the EN pin of the ISL6327 will rise above the ENLL threshold and the controller will begin the soft start sequence. The output voltage ramps up to the programmed VID setting, at which time the PGOOD indicator will switch from red to green.

Signal Test Points

There are many test points available on the ISL6327EVAL5 for monitoring of key signals. Monitoring test points include, VR_HOT and VR_RDY for monitoring the temperature FAULT outputs, OFS, IOUT, DAC, REF, COMP, EN, and DAC for monitoring control waveforms. There are also test points for monitoring VIN (VIN1 and VIN2) and VOUT (TPVCORE1 and TPGND1).

AN1268 Rev 0.00 Page 2 of 18Oct 26, 2010

Page 3: ISL6327EVAL5 User Guide - Renesas

ISL6327EVAL5

Component Selection With Coupled InductorsThere are many parameters of the operation of the ISL6327 that can be modified and tested using the ISL6327EVAL5 evaluation board. Many control signals can also be monitored through on-board test points. For detailed theory of operation and component selection guidelines for the ISL6327 please refer to the ISL6327 datasheet available on the web at www.intersil.com.

Key parameters that will be selected differently or otherwise impacted in the case where coupled inductors are used in the output filter are feedback compensation, DCR sense time constant, current sense resistor, droop control, and overcurrent set point. How to select these components will be covered in this section.

PWM Modulation Scheme and Continuous Current Sense

The ISL6327 adopts Intersil's proprietary Active Pulse Positioning (APP) modulation scheme to improve transient performance. APP control is a unique dual-edge PWM modulation scheme with both PWM leading and trailing edges being independently moved to provide the best response to transient loads. The PWM frequency, however, is constant and set by the external resistor between the FS pin and GND.

To further improve the transient response, the ISL6327 also implements Intersil's proprietary Adaptive Phase Alignment (APA) technique. APA, with sufficiently large load step currents, can turn on all phases simultaneously.

With both APP and APA control, ISL6327 can achieve excellent transient performance and reduce the demand on the output capacitors.

Under steady state conditions the operation of the ISL6327 PWM modulator appears to be that of a conventional trailing edge modulator. Conventional analysis and design methods can therefore be used for steady state and small signal operation.

The ISL6327 senses current continuously (no sample-and-hold) on each channel for fast response to changes in inductor current.

Continuous current sensing, APA and APP allow for very high bandwidth response to a load transient events.

Coupled Inductor Details

To further take advantage of the control and sensing features of the ISL6327 the use of coupled inductors in the output filter can be implemented. Coupling 2 phases on a single inductor core allows a reduction in phase inductance for fast transient response without the hit in efficiency due to larger phase ripple currents with an equivalent standard inductor.

With a standard single winding inductor the current waveform is dependant on the voltage at the two terminals of the inductor. The peak-to-peak ripple current in a synchronous buck application is determined by Equation 1.

where VIN is the input voltage, VOUT is the output voltage, L is the standard inductance value, and fS is the switching frequency.

The total output ripple current is determined by the sum of all of the phase currents and its magnitude is reduced by the interleaving of N number of phases.

For a given Vin, Vout and fs, both the channel and total ripple current are determined by L, the standard inductance of each phase.

For the case where there are two inductors coupled on one core, each providing the inductance for one phase in a synchronous buck converter, the ripple current for a single phase is now dependant on the voltages across both inductors as well as the magnetic properties of the coupled inductor.

Consider the two phase coupled inductor drawn in Figure 1.

Note the dot convention. If positive current flows into the dot connected to PHASE1 then current will flow out of the dot connected to PHASE2. This means when one PHASE has a positive current slew rate so will the coupled PHASE. Figure 1 shows example waveforms for a simplified 2 phase case.

IPPsiVIN VOUT– VOUT

L fS VIN

----------------------------------------------------------= (EQ. 1)

ITotalPPsi

VIN N VOUT– VOUTL fS V

IN

----------------------------------------------------------------= (EQ. 2)

FIGURE 1. TWO PHASE COUPLED INDUCTOR RIPPLE CURRENT WAVEFORMS

L1

VOUT

PHASE1

IOUT

PHASE2

Iphase1

Iphase2

PHASE2

PHASE1

IPhase2

IPhase1

IOUT

AN1268 Rev 0.00 Page 3 of 18Oct 26, 2010

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ISL6327EVAL5

The equation for peak-to-peak ripple current and total output ripple current are dependent on the magnetic properties of the coupled inductor.

The two winding coupled inductor is essentially a transformer. Like any transformer it will have a specified winding ratio, winding inductance (or self inductance, L), and mutual inductance (LM). Parasitics will include leakage inductance (LLK) and winding resistance (DCR). All these parameters must be considered in optimizing the coupled inductor performance for a given application.

An equivalent circuit for the two phase coupled inductor is shown in Figure 2. For the coupled inductor used in this reference design the windings are symmetrical and the turns ratio is 1:1.

Each winding has a self inductance which is the total inductance that magnetizes the core. In an imperfect transformer some of the flux generated by the current through the winding will not couple through the core to the other winding. The mutual inductance is the portion of the winding inductance that is coupled with the other windings.

The leakage inductance is a measure of how much of the total flux does not couple to the other winding. A system of equations can be used to determine the phase peak-to-peak ripple current equation and total output peak-to-peak ripple current equation.

For the two phase coupled inductor case the phase ripple current is shown in Equation 3:

The total ripple current will be the sum of the phase currents and can be calculated using Equation 4:

Where N is the number of phases in the multiphase converter, and nci is the number of inductors coupled on a single core, in this case nci = 2.

With these equations it can be determined that the output current waveform and therefore the transient response is determined by:

This term is the leakage inductance, LLK, of the two winding coupled inductor. The phase ripple current waveform, or steady state phase ripple current, is determined by the equivalent inductance in Equation 6:

Equations 5 and 6 will be used when selecting components in a two phase coupled inductor application.

Current Sensing

ISL6327 senses phase current continuously for fast response. ISL6327 supports inductor DCR sensing, or resistive sensing techniques. For more detail on the ISL6327 theory of operation please refer to the ISL6327 datasheet.

INDUCTOR DCR SENSING

Choosing the DCR current sense circuitry is straight forward when using standard inductors but a little more complicated when using coupled inductors. Consider the inductor DCR as shown in Figure 3. The channel current IL flowing through the inductor will also pass through the DCR. A simple R-C network across the inductor extracts the DCR voltage.

FIGURE 2. TWO PHASE COUPLED INDUCTOR

DCRLM L - LM

DCR L - LM

N = 1

IPPciVIN VOUT– L LMVOUT–

L2

LM2

– fS

----------------------------------------------------------------------------VOUT

VIN-----------------

= (EQ. 3)

ITotalPPci

VIN N VOUT– VOUTL nci 1– LM– fS V

IN

----------------------------------------------------------------= (EQ. 4)

LTr L nci 1– LM– L LM–= = (EQ. 5)

LSS

VIN VOUT– L2

LM2

VIN VOUT– L LMVOUT–----------------------------------------------------------------------------= (EQ. 6)

DCRLM

COUPLED INDUCTOR

VOUT

COUT

IL

LLK

DCR LLK

In

ISEN ILDCR

RISEN------------------=

-

+

ISEN-(n)

CURRENT

SENSE

ISL6327 INTERNAL CIRCUIT

VIN

ISEN+(n)

PWM(n)

ISL6609

RISEN(n)

R

-+ VC(s)

C

CT

FIGURE 3. DCR CURRENT SENSING

AN1268 Rev 0.00 Page 4 of 18Oct 26, 2010

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If the R-C network components are selected such that the R-C time constant (= R*C) matches the inductor time constant (= L/DCR), the voltage across the capacitor VC is equal to the voltage drop across the DCR, i.e., proportional to the channel current.

With the internal low-offset current amplifier, the capacitor voltage VC is replicated across the sense resistor RISEN. Therefore the current out of ISEN+ pin, ISEN, is proportional to the inductor current.

Equation 7 shows that the ratio of the channel current to the sensed current ISEN is driven by the value of the sense resistor and the DCR of the inductor.

But how is the RC time constant selected in the coupled inductor case? The leakage inductance of the coupled inductor should be used as the inductance in the time constant calculation. The leakage inductance for the two phase coupled inductor is L - Lm.

An equation for selecting the resistor of the RC time constant for a two winding coupled inductor and a given C value is shown in Equation 8. Refer the ISL6327 datasheet for additional component selection guidelines.:

Because of the internal filter at ISEN- pin, one capacitor CT is needed to match the time delay between the ISEN- and ISEN+ signals. Select the proper CT to keep the time constant of RISEN and CT (RISEN x CT) close to 27ns.

Determining The Leakage Inductance of a Coupled Inductor

The leakage inductance of the CI must be determined to design and model with CI's, including using Equations 3-8. There are several methods for accurately determining the leakage inductance per phase of the coupled inductor; two methods are outlined here. Figure 4 depicts an equivalent magnetic circuit for the coupled inductor.

A conventional method for measuring leakage inductance in a transformer is to short the secondary and measure the inductance of the primary. This is a good approximation for a

transformer since the leakage inductance is typically small compared to the self inductance.The coupled inductor in a multiphase application will have a higher percentage of leakage vs. self inductance so additional steps are needed to calculate the actual leakage inductance.

A calibrated bench RLC meter can be used for accurately measuring leakage.

Method 1

1. Leave the secondary winding, pins 2 and 3 in Figure 4, open circuit. The measured inductance from pins 1 to 4 is the primary winding inductance or self inductance. Call this L.

2. Short circuit the secondary winding, pins 2 and 3 in Figure 4. The measured inductance from pins 1 to 4 is the leakage inductance of the primary plus the reflected leakage from the secondary. Call this Ls.

3. For this application the turns ratio is 1:1.

4. The leakage can be calculated using Equation 9:

5. Repeat the above steps to obtain the winding inductance and leakage of the secondary.

Method 2

1. Short pins 4 and 3. The measured inductance will be the sum of the primary and secondary leakages. In the symmetrical, 1:1 winding ratio of the multiphase buck coupled inductor this will be 2*LLK. The average leakage for each winding can be determined by dividing by 2.

IN06006 Specification Using Method 1

The coupled inductor used on the evaluation board is the IN06006. To use this inductor as an example to illustrate method 1 above refer to the IN06006 datasheet for the following steps:

1. The winding inductance listed in the IN06006 datasheet shows 315nH. So, L = 315nH.

2. Shorting the secondary and measuring the primary gives 150nH. Ls = 150nH.

3. The IN06006 winding ratio is 1:1.

4. The leakage inductance of this inductor can be calculated using Equation 9.

So, the leakage inductance for the IN06006 is 87nH. The mutual inductance can be determined by Equation 5. Lm = L - LLK = 228nH.

ISEN ILDCR

RISEN-------------------= (EQ. 7)

RLLK

DCR C----------------------= (EQ. 8)

FIGURE 4. EQUIVALENT MAGNETIC CIRCUIT OF THE COUPLED INDUCTOR

LM

TWO PHASE COUPLED INDUCTOR

LLK2LLK1

1

4

2

3

RLCMETER

LLK L L2

L LS – –= (EQ. 9)

LLK 315 3152

315 150 – – 87nH= =

AN1268 Rev 0.00 Page 5 of 18Oct 26, 2010

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What Inductor Parameters Do I Use?

The 87nH leakage inductance can be used in Equation 8 to calculate the required RC time constant match for DCR current sensing.

As shown in Equation 5, the leakage inductance determines the total current waveform and therefore the small signal transient response. Use LLK as the phase inductance when calculating the regulator feedback compensation and small signal transient response.

For steady state phase current calculations, use Equation 4. This equation will give the peak-to-peak inductor current waveforms for input ripple calculations, MOSFET selection, and efficiency estimates.

The above analysis shows that a given transient inductance can be used while reducing the phase ripple current vs. an equivalent standard inductor.

Load-Line Regulation and Component Selection

Figure 5 shows that the average current of all active channels, IAVG flows from FB through a load-line regulation resistor, RFB.

The regulated output voltage is reduced by the droop voltage VDROOP. The output voltage as a function of the load current is derived by combining Equation 10 with the sensed current expression defined by the current sense method employed.

Where VREF is the reference voltage, VOFS is the programmed offset voltage, IOUT is the total output current of the converter, RISEN is the sense resistor connected to the ISEN+ pin, RFB is the feedback resistor, N is the number of active channels, and RX is the DCR, or sense resistor, depending on the sensing method.

Therefore, the equivalent load-line impedance (i.e., droop impedance) is:

Overcurrent Protection

ISL6327 has two levels of overcurrent protection. Each phase is protected from a sustained overcurrent condition by limiting its peak current, while the combined phase currents are protected on an instantaneous basis.

In instantaneous protection mode, the ISL6327 utilizes the sensed average current IAVG to detect an overcurrent condition. The average current magnitude can be approximated using Equation 7, the sensed current signal for an individual phase. The average current is continuously compared with a constant 85µA. Once the average current exceeds the reference current, a comparator triggers the converter to shut-down.

For details on how the ISL6327 behaves in reaction to an overcurrent event refer to the ISL6327 datasheet.

For the individual channel overcurrent protection, the ISL6327 continuously compares the sensed current signal of each channel with the 120µA reference current. If one channel current exceeds the reference current, ISL6327 will pull PWM signal of this channel to low for the rest of the switching cycle. This PWM signal can be turned on next cycle if the sensed channel current is less than the 120µA reference current. The peak current limit of individual channel will not trigger the converter to shut-down.

The overcurrent protection level for the above two OCP modes can be adjusted by changing the value of current sensing resistors. In addition, ISL6327 can also adjust the average OCP threshold level by adjusting the value of the resistor from IOUT to GND, R17 on the evaluation board. An overcurrent response will be initiated when the voltage on IOUT reaches 2V. Use Equation 7 to approximate the average current value.

Equation 13 can be used to calculate the value of the resistor RIOUT based on the desired OCP level IAVG, OCP2.

FIGURE 5. OUTPUT VOLTAGE AND LOAD-LINE REGULATION

IAVG

EXTERNAL CIRCUIT ISL6327 INTERNAL CIRCUIT

COMPRC

RFB

FB

VDIFF

VSEN

RGND

-

+VDROOP

ERROR AMPLIFIER

-

+VOUT+

DIFFERENTIALREMOTE-SENSEAMPLIFIER

VCOMP

CC

REF

DAC

RREF

CREF

-

+

VOUT-

IDROOP

VDROOP IAVGRFB= (EQ. 10)

VOUT VREF VOFS–IOUT

N---------------

RXRISEN-------------------RFB

–= (EQ. 11)

RLL

RFBN

-------------RX

RISEN-------------------= (EQ. 12)

RIOUT2V

IAVG OCP2,------------------------------------= (EQ. 13)

AN1268 Rev 0.00 Page 6 of 18Oct 26, 2010

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ISL6327EVAL5

Which Phases Should Be Coupled?

Figure 1 has been duplicated in Figure 6 with some changes to the spacing of the PWMs modified to show the effect on the ripple current waveforms.

The bold red and blue waveforms in Figure 6 show an example of how the phase current waveforms will change if the PWM spacing is changed. Best ripple reduction performance is achieved when the two coupled phases are 180 degrees phase-shifted.

The ISL6327 in 6-phase mode fires phases sequentially, PWM1, PWM2, PWM3, PWM4, PWM5, PWM6. So, for optimal phase ripple current reduction PWM1-PWM4, PWM2-PWM5, and PWM3-PWM6 should be coupled.

For optimal layout placement two sequential PWMs should not be placed next to one another. So, from left to right on a PCB, an example placement can be PWM1,PWM4,PWM2, PWM5, PWM3, PWM6.

Modifying the Board For Other ApplicationsAs shipped, the ISL6327EVAL5 is configured for 6 phase operation, a VR11 VID of 1.35V, and designed for operation up to 130A with a loadline of 1.25m. The coupled inductors on board are IN06006.

The inductor footprints on the board are large enough to accommodate the footprints of other coupled inductors for evaluation purposes.

The following procedure can be used to modify the board for 4 phase evaluation.

Four Phase VR11 05A Configuration, LL = 1m1. Change Feedback Compensation: R4 = 2.32k, R7 = 100, C6 = 390pF, C5 = 330pF, R5 = 9.09k, C7 = 33pF

2. Change the IOUT resistor to decrease the overcurrent set point: R17 = 36.5k which will give IOC = 120A

3. Change the DCR sense resistors: R22, R24, R26, R28, R30, R32 = 1.3k

4. Move jumper hats on PWM5 and PWM6 pouts: Move hats on JP_4P_SEL1 and JP_5P_SEL2 from pins 2 and 3 to short pins 1 and 2. This will disable PWM5 and PWM6

5. The 6 phase board is configured with (40) 10µF ceramic capacitors in the output filter. For 4 phases 05A configuration add 10 to 20 additional 10µF ceramic capacitors to the output filter. There are plenty of additional 1206 footprints around the socket to do this.

6. Remove unused power stage: Remove INDUCTORS L3, MOSFETS Q3L1, Q3U1, Q6L1, Q6U1, DRIVERSU4, and U7.

7. Remove R79 which is connecting PWM5 to DRIVER U6

8. Place a 0 resistor on R80 to connect PWM3 to DRIVER U6.

9. On the back of the PCB remove R84 and R85. Place 0 resistors on R90 and R91.

10. Follow the Quick Start Evaluation procedure on page 1 to power up the board.

FIGURE 6. COUPLED INDUCTOR CURRENT WAVEFORMS

L1

VOUT

PHASE1

IOUT

PHASE2

Iphase1

Iphase2

PHASE2

PHASE1

IPhase2

IPhase1

IOUT

AN1268 Rev 0.00 Page 7 of 18Oct 26, 2010

Page 8: ISL6327EVAL5 User Guide - Renesas

ISL6327EVAL5

ISL6327EVAL5 Six Phase Performance

FIGURE 7. START-UP SEQUENCE FIGURE 8. SHUT-DOWN SEQUENCE

FIGURE 9. NO LOAD RIPPLE ~10mV FIGURE 10. 130A RIPPLE ~12mV

FIGURE 11. TRANSIENT RESPONSE 20A to 120A IN 1200A/µs FIGURE 12. TRANSIENT RESPONSE 120A to 20A IN 1200A/µs

EN5V/DIV

VCORE0.5V/DIV

VR_RDY5V/DIV

0.5ms/DIV

VCORE0.5V/DIV

EN5V/DIV

VR_RDY5V/DIV

VCORE0.5V/DIV

50µs/DIV

5µs/DIV

VCORE20mV/DIV

5µs/DIV

VCORE20mV/DIV

10µs/DIV

VCORE50mV/DIV

ILOAD1V/DIV

10µs/DIV

VCORE50mV/DIV

ILOAD1V/DIV

AN1268 Rev 0.00 Page 8 of 18Oct 26, 2010

Page 9: ISL6327EVAL5 User Guide - Renesas

ISL6327EVAL5

FIGURE 13. VR EFFICIENCY VIN = 12V, VID = 1.35V, LL = 1.25m, VOUT MEASURED AT INDUCTOR

FIGURE 14. VCORE LOADLINE REGULATION FROM 0A TO 150A

FIGURE 15. VID-ON-THE-FLY OPERATION 0.6V to 1.55V

ISL6327EVAL5 Six Phase Performance (Continued)

72

74

76

78

80

82

84

86

88

90

92

0 10 30 50 70 90 110 130 150

EF

FIC

IEN

CY

(%

)

IOUT (A)

1.10

1.15

1.20

1.25

1.30

1.35

0 20 40 60 80 100 120 140 160

VO

UT (

V)

IOUT (A)

VMIN

VMAX

VOUT

.5ms/DIV

VCORE0.5V/DIV

AN1268 Rev 0.00 Page 9 of 18Oct 26, 2010

Page 10: ISL6327EVAL5 User Guide - Renesas

ISL6327EVAL5

ISL6327EVAL5 Four Phase Performance

FIGURE 16. START-UP SEQUENCE FIGURE 17. SHUT-DOWN SEQUENCE

FIGURE 18. NO LOAD RIPPLE ~6mV FIGURE 19. 130A RIPPLE ~11mV

FIGURE 20. TRANSIENT RESPONSE 35A to 100A IN 50ns FIGURE 21. TRANSIENT RESPONSE 100A to 35A IN 50ns

EN5V/DIV

VCORE0.5V/DIV

VR_RDY5V/DIV

0.5ms/DIV

VCORE0.5V/DIV

EN5V/DIV

VR_RDY5V/DIV

VCORE0.5V/DIV

50µs/DIV

5µs/DIV

VCORE20mV/DIV

5µs/DIV

VCORE20mV/DIV

10µs/DIV

VCORE50mV/DIV

ILOAD1V/DIV

10µs/DIV

VCORE50mV/DIV

ILOAD1V/DIV

AN1268 Rev 0.00 Page 10 of 18Oct 26, 2010

Page 11: ISL6327EVAL5 User Guide - Renesas

ISL6327EVAL5

SummaryThe ISL6327EVAL5 evaluation board provides a high performance VRD solution highlighting the ISL6327 advanced multiphase controller with the use of a coupled inductor and low capacitance output filter.

For detailed theory of operation, component selection and layout guidelines refer to the ISL6327 datasheet.

The following pages provide a board schematic and bill of materials to support implementation of this and similar solutions.

ReferencesIntersil documents are available on the web at www.intersil.com.

[1] ISL6327 Data Sheet, Intersil Corporation, File No. FN9276

[2] ISL6609 Data Sheet, Intersil Corporation, File No. FN9221

[3] IN06006 Coupled Inductor Datasheet ICE Components, www.icecomponents.com

FIGURE 22. VR EFFICIENCY VIN = 12V, VID = 1.4V, LL = 1.0m, VOUT MEASURED AT INDUCTOR

FIGURE 23. VCORE LOADLINE REGULATION FROM 0A TO 100A

ISL6327EVAL5 Four Phase Performance (Continued)

72

74

76

78

80

82

84

86

88

90

92

0 10 20 30 40 50 60 70 80 90 100 110

EF

FIC

IEN

CY

(%

)

IOUT (A)

1.25

1.30

1.35

1.40

0 20 40 60 80 100 120

VO

UT (

V)

IOUT (A)

VMIN

VMAX

VOUT

AN1268 Rev 0.00 Page 11 of 18Oct 26, 2010

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ISL6

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EV

AL5

Vc5

ISEN5-

ISEN6-

ISEN1+

ISEN2-

ISEN3-

ISEN4-

ISEN1-

PWM1

PWM2

PWM5

PWM3

PWM6

PWM4

ISEN2+

ISEN3+

ISEN4+

ISEN5+

ISEN6+

For 6phase operationplace all 4 PWM jumperson pins 2 and 3

CF268pCF268p

C180.1uC180.1u

R25 402R25 402

R27 402R27 402

R29 402R29 402

C130.1uC130.1u

C190.1uC190.1u

C160.1uC160.1u

R31 402R31 402

CF368pCF368p

R241.21kR241.21k

CF468pCF468p

C210.1uC210.1u

CF568pCF568p

R21 402R21 402

CF168pCF168p

CF668pCF668p

C140.1uC140.1u

R301.21kR301.21k

C120.1uC120.1u

C220.1uC220.1u

C200.1uC200.1u

C150.1uC150.1u

R321.21kR321.21k

R221.21kR221.21k

R23 402R23 402

R281.21kR281.21k

R261.21kR261.21k

C170.1uC170.1u

C110.1uC110.1u

Controller Circuit

VCC5

VCC5

VCC12

VCC5

Vc5

VCC5

Vc5

Vc5

VCC12

VCC5 VCC5

RGND

VSENVTTVRSEL

VID0VID1VID2VID3VID4VID5VID6VID7

ntroller circuit

Thermistor

IOC target 169A

R55

10k

R55

10k

C10DNSC10DNS

R91kR91k

RN26.8kRN26.8k

C2DNSC2DNS

TP12GND1TP12GND1

R151kR151k

REDGREEN

CR2VR_RDY

REDGREEN

CR2VR_RDY

12

34

EN1EN1

1 3

26 4

JP_5P_SEL2

jumper_3pin

JP_5P_SEL2

jumper_3pin

12

3

C81uC81u

R512.1kR512.1k

R1141.2kR1141.2k

TP18OFSTP18OFS

JP_3P_SEL3

jumper_3pin

JP_3P_SEL3

jumper_3pin

12

3

TP9GND1TP9GND1

R44.32kR44.32k

R341.5kR34

1.5k

R181KR181K

C910nC910n

R53DNS

R53DNS

TP11GND1TP11GND1

TP3IOUTTP3IOUT

TP14VR_RDYTP14VR_RDY

R12100kR12100k

TP17COMPTP17COMP

U1ISL6327U1ISL6327

VID71

IDROOP16

VDIFF17

VSEN19 RGND18

EN_VTT 41

VR_RDY45

VID62VID53VID44VID35VID26VID17VID08VRSEL9

VR_FAN 46

VR_HOT 47

TM 48

OFS10

FS42

EN_PWR 40

ISEN5+ 23ISEN5- 22PWM5 24

ISEN3+ 35ISEN3- 34PWM3 36

ISEN1+ 32ISEN1- 33PWM1 31

ISEN2+ 26ISEN2- 27PWM2 25

ISEN4+ 29ISEN4- 28PWM4 30

ISEN6+ 38ISEN6- 39PWM6 37

SS43

VCC21

DAC12

REF13

COMP14

FB15

OVP 44

IOUT 11

GND49

TCOMP20

Q242N7002

Q242N7002

1

23

C733pC733p

R5410KR5410K

R210R210

TP15VR_FANTP15VR_FAN

R56DNSR56DNS

JP_4P_SEL1

jumper_3pin

JP_4P_SEL1

jumper_3pin

12

3

C4DNSC4DNS

R1020kR1020k

R7100R7100

C6390pFC6390pF

TP5DACTP5DAC

C1DNS

C1DNS

C5330pFC5330pF

R1310kR1310k

C48100pC48100p

TP8GND1TP8GND1

R161KR161K

R36 0R36 0

R310R310

TP4REFTP4REF

R82.2R82.2

TP16VR_HOTTP16VR_HOT

JP_2P_SEL1

jumper_3pin

JP_2P_SEL1

jumper_3pin

12

3

R35

0

R35

0

TP6VDIFFTP6VDIFF

R1741.2kR1741.2k

R331kR331k

R141kR141k

TP7TMTP7TM

R110R110

RC1100KRC1100K

TP13ENTP13EN

TP10GND1TP10GND1

C3DNSC3DNS

Page 13: ISL6327EVAL5 User Guide - Renesas

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TitleSize Rev

D t Sh t f

AISL6327 CI EVALUATION 5 BOARDB

2 5F id J l 28 2006

Intersil RTP

Intersil Corporation

TitleSize Rev

D t Sh t f

AISL6327 CI EVALUATION 5 BOARDB

2 5F id J l 28 2006

Intersil RTP

Intersil Corporation

TitleSize Rev

D t Sh t f

AISL6327 CI EVALUATION 5 BOARDB

2 5F id J l 28 2006

Intersil RTP

Intersil Corporation

to test point

Optional SP caps

CT32.2nCT32.2n

CO7310u

CO7310u

CO7410u

CO7410u

CO7610u

CO7610u

CO8010u

CO8010u

CO83330uCO83330u

CO7910u

CO7910u

7210u72

10u

CO81330uCO81330u

CO7810u

CO7810u

CO82330uCO82330u

CO7510u

CO7510u

CO7710u

CO7710u

VOUT2Vout-VOUT2Vout-

Output Capacitors and LGA775 VID Connections

VCC_DIE

VSS_DIE

RGND

VSEN

VCORE

VTTVRSEL

VCORE

VTTVID1

VTTVID2

VTTVID3

VTTVID4

VTTVID5

VTTVID6

VTTVID7

VTTVID0

VSEN

RGND

Place those resistors and caps close

Install R39, R41 for SocketSensing connection

Install R40, R42 for Die Sensing connection

Place those 10 caps on top side

Place those 9 caps inside of CPU carvity on top side

Those caps are for Low frequency operation only. Do not install for high frequncy operation.

Place those 15 caps on bottom side Place those 9 caps inside CPU Carvity area on bottom side

Place those 25 caps on top side

For 6phase operation and 100A load step;board is populated with 40*10uF 1206capacitors

CO3810u

CO3810u

CO7110u

CO7110u

CO4210u

CO4210u

CO5910u

CO5910u

CO2510u

CO2510u

CO9560uCO9560u

CO2910u

CO2910u

CO4610u

CO4610u

CT11u

CT11u

CO6310u

CO6310u

CO5560uCO5560u

CO6710u

CO6710u

R39

0

R39

0

CO3310u

CO3310u

CO5010u

CO5010u

CO12560u

CO12560u

R_SEL2 DNSR_SEL2 DNS

CO3710u

CO3710u

TP1VCORE

TP1VCORE

CT22.2nCT22.2n

CO13100u

CO13100u

CO5710u

CO5710u

CO2410u

CO2410u

CO4560uCO4560u

CO4110u

CO4110u

R43DNSR43DNS

CO15100u

CO15100u

CO4510u

CO4510u

VTT_R1

0

VTT_R1

0

CO6210u

CO6210u

CO1560uCO1560u

CO2810u

CO2810u

CO6610u

CO6610u

CO3210u

CO3210u

CO4910u

CO4910u

R42 0R42 0

CO6810u

CO6810u

CO5310u

CO5310u

BNC1DNSBNC1DNS

1

4 5

23

R40 0R40 0

CO7010u

CO7010u

CO3610u

CO3610u

CO16100u

CO16100u

CO2310u

CO2310u

GND1 GNDGND1 GND1

CO4010u

CO4010u

COCO

R410R410

CO5610u

CO5610u

CO20100u

CO20100u

CO6110u

CO6110u

CO2710u

CO2710u

VTT_R2

0

VTT_R2

0

CO2560uCO2560u

\CO4410u

\CO4410u

CO17100u

CO17100u

CO4810u

CO4810u

CO6510u

CO6510u

CO3110u

CO3110u

VCORE1 V_COREVCORE1 V_CORE1

CO21100u

CO21100u

U100

VCC

VSS

AM2

AL5

AM3

AL6

AK4

AL4

AM5

AM7

AN5

AN6

AN3

AN4

AN7

CO8560uCO8560u

CO3510u

CO3510u

CO5210u

CO5210u

CO14100u

CO14100u

CO22100u

CO22100u

CO5410u

CO5410u

CO7560uCO7560u

CO3910u

CO3910u

CO18100u

CO18100u

CO11560u

CO11560u

CO2610u

CO2610u

CO4310u

CO4310u

CO5510u

CO5510u

CO6010u

CO6010u

VOUT1Vout+VOUT1Vout+

CO6410u

CO6410u

CO10560uCO10560u

C66DNSC66DNS

CO5810u

CO5810u

CO3010u

CO3010u

CO4710u

CO4710u

CO3560uCO3560u

CO3410u

CO3410u

CO19100u

CO19100u

CO6910u

CO6910u

CO5110u

CO5110u

CO6560uCO6560u

R74DNSR74DNS

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TitleSizeISL6327 CI EVALUATIONC

Intersil RTP

Intersil Co

TitleSizeISL6327 CI EVALUATIONC

Intersil RTP

Intersil Co

TitleSizeISL6327 CI EVALUATIONC

Intersil RTP

Intersil Co

or

used

used

Power Stage

D

C

B

A

VINF

VINF

VCC5

VCC12

VINF

VINF

VINF

VINF

ISEN2-

ISEN3-

PWM1

ISEN1-

ISEN1+

ISEN2+

ISEN3+

ISEN5-

ISEN6-

PWM6

PWM5

ISEN4-

ISEN4+

ISEN6+

ISEN5+PWM3

PWM2

PWM2

PWM4

PWM3

ISEN3-

ISEN3+

ISEN2-

ISEN2+

(OSCON)

Power StagePut those 2 test points close to input inductor

L1 is used for 6-phase 4-phase mode

L2 is only for 6-phase

L3 is only for 6-phase

U3isl6609U3isl6609

BT1

PWM2

GN

D3

LG4

VCC 5

EN 6

PH7

UG

8G

L9

RS3

3.3

RS3

3.3Q3L1HAT2165HQ3L1HAT2165H

TPVCORE1VCORETPVCORE1VCORE

U4isl6609U4isl6609

BT1

PWM2

GN

D3

LG4

VCC 5

EN 6

PH7

UG

8G

L9

U7isl6609U7isl6609

BT1

PWM2

GN

D3

LG4

VCC 5

EN 6

PH7

UG

8G

L9

C6010uC6010u

RS5

3.3

RS5

3.3

C540.22uC540.22u

C6210uC6210u

R90DNSR90DNS

R770R770

U5isl6609U5isl6609

BT1

PWM2

GN

D3

LG4

VCC 5

EN 6

PH7

UG

8G

L9

C2610u

C2610u

C5810uC5810u

Q5L1HAT2165HQ5L1HAT2165H

C280.22uC280.22u

CS22200pCS22200p

RV10RV10

CS12200pCS12200p

C3410u

C3410u

C5710uC5710u

C231uC231u

C311uC311u

Q1L1HAT2165HQ1L1HAT2165H

C2510u

C2510u

R880R880

C6110uC6110u

RS2

3.3

RS2

3.3

C631uC631u

Q5U1HAT2168HQ5U1HAT2168H

VIN2Vin-VIN2Vin-

L2

IN06006

L2

IN06006

1

2

3

4

R92DNSR92DNS

Q3U1HAT2168HQ3U1HAT2168H

CS42200pCS42200p

RS6

3.3

RS6

3.3

C240.22uC240.22u

TPGND1GNDTPGND1GND

CS52200pCS52200p R85

0R850

C5910uC5910u

R780R780

C320.22uC320.22u

C271uC271u

C560.22uC560.22u

R590 R590

C2910u

C2910u

C3310u

C3310u

C3010u

C3010u

Q1U1HAT2168HQ1U1HAT2168H

R93DNSR93DNS

Q4L1HAT2165HQ4L1HAT2165H

CI_1470u

CI_1470u

RS1

3.3

RS1

3.3

U2isl6609U2isl6609

BT1

PWM2

GN

D3

LG4

VCC 5

EN 6

PH7

UG

8G

L9

R610R610

Q2L1HAT2165HQ2L1HAT2165H

Q6L1HAT2165HQ6L1HAT2165H

VIN1Vin+VIN1Vin+

R81DNSR81DNS

R580 R580

R80DNSR80DNS R84

0R840

L_IN1150nL_IN1150n

R600R600

R790R790

R620R620

L1

IN06006

L1

IN06006

1

2

3

4

R860R860

RS4

3.3

RS4

3.3

U6isl6609U6isl6609

BT1

PWM2

GN

D3

LG4

VCC 5

EN 6

PH7

UG

8G

L9

C641uC641u

Q4U1HAT2168HQ4U1HAT2168H

R820R820

R91DNSR91DNS

L3

IN06006

L3

IN06006

1

2

3

4CS32200pCS32200p

Q6U1HAT2168HQ6U1HAT2168H

R870R870

C550.22uC550.22u

R630R630

C651uC651u

Q2U1HAT2168HQ2U1HAT2168H

CS62200pCS62200p

R890R890

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5V

VTTVID0

VTTVID1

VTTVID2

VTTVID3

VTTVRSEL

VTTVID4

VTTVID5

VTTVID6

VTTVID7

VID3

VID4

VID5

VID6

VID7

VID0

VID1

VID2

TitleSizeISL6327 CI EVALUATION 5 BOARB

Intersil RTP

Intersil Corporation

TitleSizeISL6327 CI EVALUATION 5 BOARB

Intersil RTP

Intersil Corporation

TitleSizeISL6327 CI EVALUATION 5 BOARB

Intersil RTP

Intersil Corporation

J_VID5jumper_3pinJ_VID5jumper_3pin

12

3

RVID1

2k

RVID1

2k

J_VID4jumper_3pinJ_VID4jumper_3pin

12

3

RVID4

2k

RVID4

2k

RVID7

2k

RVID7

2k

J_VID3jumper_3pinJ_VID3jumper_3pin

12

3

J_VID0jumper_3pinJ_VID0jumper_3pin

12

3

RVID2

2k

RVID2

2k

RVID5

2k

RVID5

2k

J_VID2jumper_3pinJ_VID2jumper_3pin

12

3

R_SEL1

0

R_SEL1

0

J_VID1jumper_3pinJ_VID1jumper_3pin

12

3

RVID02kRVID02k

J_VID7jumper_3pinJ_VID7jumper_3pin

12

3

RVID3

2k

RVID3

2k

RVID6

2k

RVID6

2kJ_VID6jumper_3pinJ_VID6jumper_3pin

12

3

VID Generator and Input Power Connectors

5V_6P

+5V

+5V

+5V

+5V

+5V

VCC12

VCC55V

or and Input power connectors

VID Code

VR11/VR10IPF/IA32

Repetitious/ManualDEMO/VTT

5V_GND15V_GND1

R450R450

C500.01uC500.01u

R4910kR4910k

R5010kR5010k

R5110kR5110k

C5233pC5233p

SW2SW DIP-8SW2SW DIP-8

C4710uC4710u

R5210kR5210k

Y1Y1

C4910uC4910u

R4710kR4710k1

2 3 4 5 6 7 8 9

10

U8PIC16F874A-PTU8PIC16F874A-PT

RC032RC135RC236RC3/SCL37RC4/SDA42RC543RC6/TX44RC7/RX1

RD038RD139RD240RD341RD42RD53RD64RD75

RE025RE126RE227

RB0 8RB1 9RB2 10RB3 11RB4 14RB5 15RB6 16RB7 17

RA0 19RA1 20RA2 21RA3 22RA4 23RA5 24

OSC1 30

OSC2 31

GND16 GND29

VCC7VCC128

NC3 34NC2 33

NC 12NC1 13

MCLR 18

12V_GND112V_GND1

SW3VID LoadSW3VID Load

1 32 4

STEP1StepSTEP1Step

SW1SW DIP-4SW1SW DIP-4

C5333pC5333p

C511uC511u

12V112V1 R830R830

12V_PWR1

ATX 12V AUX POWER

12V_PWR1

ATX 12V AUX POWER

GND1

GND02 12V 4

+12V 3

55

5V15V1

TP2TPTP2TP

5V_PWR124 PIN POWER5V_PWR124 PIN POWER

+3.3V1+3.3VA2

+12V1B11

+5V4+5VA6 GND5 19

NC 20

+5VSB9

-12V14

GND 3GND0 5GND1 7

+3.3VC13 GND2 15

PS_ON#16

GND3 17

+3.3VB12

GND4 18

PWR_OK 8

+12V1A10

2525

+5VB21+5VC22+5VD23

GND6 24

R440R440

R4610kR4610k

R4810kR4810k

Page 16: ISL6327EVAL5 User Guide - Renesas

ISL6327EVAL5

Bill of MaterialsQTY REF DESIGNATOR DESCRIPTION VENDOR VENDOR P/N PKG

3 C52, C53, C7 33pF, 50V COG 0603 Cap Various REEL

1 C48 100pF, 50V COG 0603 Cap Various REEL

6 CF1, CF2, CF3, CF4, CF5, CF6 68pF, 50V X7R 0805 Cap Various REEL

1 C5 330pF, 50V X7R 0603 Cap Various BAG

1 C6 390pF 50V COG 0603 Cap Various BAG

4 C3, C2, CT2, CT3 2.2nF, 50V X7R 0603 Cap NIC NMC0603X7R222K REEL

2 C9, C50 10nF, 50V X7R 0603 Cap NIC NMC0603X7R103K REEL

12 C12, C14, C16, C18, C20, C22, C11, C13, C15, C17, C19, C21

0.1µF, 16V X7R 0603 Capacitor MURATA BAG

6 C24, C28, C32, C54, C55, C56 0.22µF, 50V Y5V 0603 Cap MURATA GRM188F51H224Z BAG

8 C8, C23, C27, C31, C51, C63, C64, C65 1µF, 16V X5R 0603 Cap MURATA GRM188R61C105K BAG

1 CT1 1µF, 16V X7R 1206 Cap MURATA GRM319R71C105K BAG

1 C49 10µF, 16V Y5V 0805 Cap MURATA GRM21BF51C106Z BAG

58 CO23, CO24, CO25, CO26, CO27, CO28, CO29, CO30, CO31, CO32, CO33, CO34, CO35, CO36, CO37, CO38, CO39, CO40, CO41, CO42, CO43, CO44, CO45, CO46, CO47, CO48, CO49, CO50, CO51, CO52, CO53, CO54, CO55, CO56, CO57, CO58, CO59, CO60, CO61, CO62, CO63, CO64, CO65, CO66, CO67, CO68, CO69, CO70, CO71, CO72, CO73, CO74, CO75, CO76, CO77,

CO78, CO79, CO80

10µF, 6.3V X7R 1206 Capacitor MURATA GRM31CR70J106M REEL

0 100µF, 6.3V X5R 1210 Capacitor MURATA GRM31CR60J107M REEL

13 C25, C26, C29, C30, C33, C34, C57, C58, C59, C60, C61, C62

10µF, 16V X5R 1206 Capacitor MURATA GRM31CR61C106K BAG

1 CI_1 470µF, 16V Sanyo OSCON Sanyo 16SEPC470M BAG

29 R39, R41, R58, R59, R60, R61, R62, R35, R36, R63, R75, R76, R79, R82,

VTT_R1, VTT_R2, R_SEL1, R82, R79, R88, R89, R77, R78, R84, R85, R86,

R87, R40, R42

0 5% Resistor; 0603 Various REEL

4 R44, R45, R83, RV1 0 5% Resistor; 1206 Various REEL

1 R8 2.2 5% Resistor; 1206 Various REEL

6 RS1, RS2, RS3, RS4, RS5, RS6 3.3 Resistor, 5%, 1206 Various REEL

3 R1, R2, R3 10 5% Resistor; 0603 Various REEL

6 RF1, RF2, RF3, RF4, RF5, RF6 12 1% Resistor; 0603 Various REEL

6 R21, R23, R25, R27, R29, R31 402 1% Resistor; 0603 Various REEL

1 R7 200 1% Resistor; 0603 Various REEL

6 R9, R15, R16, R18, R33, R34 1k 1% Resistor; 0603 NIC NRC06F1001TR REEL

8 RVID0, RVID1, RVID2, RVID3, RVID4, RVID5, RVID6, RVID7

2k 1% Resistor; 0603 Various BAG

1 R4 4.32k 1% Resistor; 0603 Various BAG

6 R22, R24, R26, R28, R30, R32 1.21k 1% Resistor; 0603 Various BAG

10 R13, R43, R46, R48, R49, R50, R51, R52, R54, R55

10k 1% Resistor; 0603 NIC NRC06F1002TR REEL

1 R5 12.1k 1% Resistor; 0603 NIC NRC06F1002TR REEL

1 R10 20k 1% Resistor; 0603 NIC NRC06F2002TR REEL

AN1268 Rev 0.00 Page 16 of 18Oct 26, 2010

Page 17: ISL6327EVAL5 User Guide - Renesas

ISL6327EVAL5

2 R11, R17 41.2k 1% Resistor; 0603 NIC NRC06F1003TR REEL

2 R12, RC1 100k 1% Resistor; 0603 NIC NRC06F1003TR REEL

1 R47 10k x 8 Resistor Array AVX RNA4A8E103JT REEL

1 RN2 THERM_6.8K_0805 Vishay NTHS0805N02N6801 BAG

3 L1, L2, L3 87nH/64A Coupled Inductor (0.55m DCR) ICE IN-06006 DNS

1 LIN_1 150nH/40A Inductor (0.48m DCR) Cooper FP4-150 REEL

6 Q1U1, Q2U1, Q3U1, Q4U1, Q5U1, Q6U1

Upper MOSFETs Hitachi HAT2168H or RJK0305

BAG

6 Q1L1, Q2L1, Q3L1, Q4L1, Q5L1, Q6L1 Lower MOSFETs Hitachi HAT2165H or RJK0301

BAG

1 Y1 Crystal 16.000 MHz HC49/US ECS ECS-160-20-4 BAG

6 U2, U3, U4, U5, U6, U7 Sync Rec Buck Drvr 5V QFN Intersil ISL6609CR (QFN) TUBE

1 U1 Multiphase Buck Voltage Regulator Intersil ISL6327CR BAG

1 U8 8-BIT Microchip Cntrl Microchip PIC16F874A-I/PT BAG

2 CR1, CR2 4P LED 3X2.5MM SMD Luminex SSL-LXA3025IGC BAG

1 Q24 N-Ch MOSFET SOT-23 Fairchild 2N7002 BAG

1 SW1 4 Pin DIP Switch CTS 219-4LPST TUBE

1 SW2 8 Pin DIP Switch CTS 219-8LPST TUBE

1 SW3 Momentary Pushbutton Switch Panasonic EVQ-QWT03W BAG

1 EN1 Toggle Switch Mini SPDT SMD ITT GT11MSCKETR BAG

1 5V_PWR1 24 Pin ATX Connector Molex 39-29-9242 BAG

1 12V_PWR1 4 Pin Power Connector Molex 39-29-9042 BAG

17 STEP1, VIN1, VIN2, VOUT1, VOUT2, VCORE1, TP1, TP2, TP3, TP4, TP5,

TP13, TP14, TP15, TP16, TP17, TP18

Test Points Keystone 5002 BAG

5 TP8, TP9, TP10, TP11, TP12 Test Points, Turret 0.281 Height Keystone 1514-2 BAG

1 TP1 O'scope Probe Test Point Tektronix K131-4244-00 BAG

12 J_VID0, J_VID1, J_VID2, J_VID3, J_VID4, J_VID5, J_VID6, J_VID7,

JP_4P_SEL1, JP_2P_SEL1, JP_3P_SEL3, JP_5P_SEL2

3 Pin Header AMP/TYCO A26512-ND BAG

2 5V1, 12V1 Banana Jack Keystone 7006K BAG

2 5V_GND1, 12V_GND1 Banana Jack Keystone 7007K

1 BNC1 BNC connector 31-5329-52RFX BAG

2 VCORE1, GND1 Terminal Lugs Burndy KPA8CTP BAG

5 5 on the back of the board Bumpons

1 U100 CPU socket FOXCONN LGA775 TRAY

47 R53, R56, C1, C6, C7, C10, R_SEL2, CO1, CO2, CO3, CO4, CO5, CO6, CO7, CO8, CO9, CO10, CO11, CO12, CO81, CO82, CO83, R81, R80, R92, R93, R90,

R91, R43, R74, C66, CS1-6, CO13, CO14, CO15, CO16, CO17, CO18,

CO19, CO20, CO21, CO22

Not Populated List DNS

Bill of Materials (Continued)

QTY REF DESIGNATOR DESCRIPTION VENDOR VENDOR P/N PKG

AN1268 Rev 0.00 Page 17 of 18Oct 26, 2010

Page 18: ISL6327EVAL5 User Guide - Renesas

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