investigation and analysis of the simultaneous switching noise in power … · 2019. 7. 30. · we...

Research ArticleInvestigation and Analysis of the SimultaneousSwitching Noise in Power Distribution Network withMulti-Power Supplies of High Speed CMOS Circuits

Khaoula Ait Belaid,1 Hassan Belahrach,1,2 and Hassan Ayad1

1Laboratory of Electrical Systems and Telecommunications, Department of Physics, Faculty of Sciences and Technology,Cadi Ayyad University, Marrakesh, Morocco2Department of Electrical Engineering, Royal Air Academy (ERA), Marrakesh, Morocco

Correspondence should be addressed to Khaoula Ait Belaid; [email protected]

Received 9 June 2017; Accepted 17 August 2017; Published 28 September 2017

Academic Editor: Gerard Ghibaudo

Copyright © 2017 Khaoula Ait Belaid et al. This is an open access article distributed under the Creative Commons AttributionLicense, which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properlycited.

The paper studies a simultaneous switching noise (SSN) in a power distribution network (PDN) with dual supply voltages and twocores.This is achieved by reducing the admittancematrix𝑌 of the PDN then calculating frequency domain impedance with rationalfunction approximation using vector fitting.This paper presents a method of computing the simultaneous switching noise througha switching current, whose properties and details are described.Thus, the results are discussed and performed usingMATLAB andPSpice tools. It demonstrated that the presence of many cores in the same PCB influences the SSN due to electromagnetic coupling.

1. Introduction

At present, there is an ever-greater integration in electroniccircuits resulting from grouping in the same card the complexchips with different natures [1]. These electronic circuits aresubmitted to important electromagnetic disturbances. Themajority of these disturbances is the result of the miniatur-ization of the components, the increase in the performances,increasing the frequency, and decreasing the supply voltages.Therefore, it becomes necessary to take into account thesedisturbances to predict the behavior of integrated circuits.

The current and voltage of the power source are gen-erally cumbersome. Indeed, they often cannot be directlyconnected to the transistors presented within the integratedcircuits. Thus, the currents will have cross interconnections,the power plans, and the bondings wires before supplyingthe transistors. All these elements have resistance, pureinductance, and possibly a capacitance.The currents, crossingthese elements, will create voltage fluctuations on arrival.This phenomenon is called simultaneous switching noise(SSN). The SSN is due to mutual inductive coupling andinterconnections of power delivery networks (PDNs). So, to

analyze the SSN, it is necessary tomodel the behavior of theseinductive coupling and interconnections at high frequencies.

In relation to the topic, several papers have discussedthe issue of modeling PDNs. Therefore, there are differentmodeling methods, such as a finite difference time domain(FDTD)method [2], transmission linemethod [3, 4], and thetransmission matrix method. The transmission line method,in particular, uses transmission line with two-dimensionalarray or distributed RLCG elements in SPICE, in addition tothe cavity resonator process simulated in SPICE tool [5, 6]. Yetit is essential tomention that the transmissionmatrixmethodis based on a modeling cascade of elementary cell circuitsRLCG in the package and board [7] which is more effectivefor analyzing PDNs.

One of the most important criteria in the design ofPDNs is to ensure safe energy to the circuits when a suddenpower occurs. Indeed, the elimination of SSN in multilayerPCB is a critical task in the phase of the design to assuresignal integrity. Several methods have been used to reducethe harmful effects of noise transmission, such as integratedcapacitors, which are used at high frequencies because of theirlow inductance [8, 9]. Anothermethod to remove noise is the

HindawiActive and Passive Electronic ComponentsVolume 2017, Article ID 9703029, 10 pageshttps://doi.org/10.1155/2017/9703029

https://doi.org/10.1155/2017/9703029

2 Active and Passive Electronic Components

PDN

IC1

IC2

Frequency

Iload1

Iload2

Vnoise1

Vnoise2

ZPDN

Ztarget

ZPDN > Ztarget

ZPDN < Ztarget

Figure 1: Example of PDN impedance versus frequency.

introduction of lossy components serving for the eliminationof resonance based on the increase of the component loss[10]. Power islands are also used in the reduction of noiseby isolating the components making noise on the power busfrom sensitive devices [11].

In [12], there is a new method to model the simultaneousswitching noise (SSN) for systems with a single integratedcircuit. This method uses the rational function of the PDNimpedance in the time domain based on measurements. Ourwork consists also of compute the SSN but for one systemwith two integrated circuits or cores. Since the objective is toanalyze the coupling effects between them, our method usesfirstly the rational function of the PDN impedance and thenthe principle of vector fitting (VF) to compute its parametersand finally the reduction of the PDN admittance matrix 𝑌.

After the introduction, the second section presents theanalysis of the approximation with a rational function. Thethird deals with amethod of vector fitting.The fourth consistsin the applications that analyze the effect of the presence oftwo cores. Finally, conclusions are drawn in the last part.

2. PDN Impedance Function in Time Domain

In general, the power distribution network (PDN) containsmany networks of capacitors with several types and differentvalues which allow obtaining the target impedance on therequired frequency range of a PCB ground and power plans.So, the design of the PDN interconnections should carryits impedance 𝑍(𝑗𝜔) below the target impedance at highfrequency [13]. In frequency domain, the example of PDNimpedance as seen by the pads on the chip is illustrated byFigure 1.

Themain objective in the design of the power distributionnetwork is to provide the sufficient current for each transistorof the integrated circuit by ensuring that the power supplynoise does not exceed the specified margin. Then, the targetimpedance 𝑍target can be defined as

𝑍target = [(Power supply voltage) ⋅ (allowed ripple)]Current

. (1)

In frequency domain, we can write

𝑉noise = 𝑍PDN ⋅ 𝐼load, (2)

where (i) 𝑍PDN is the impedance of the PDN, (ii) 𝐼load is thetransient current, and (iii) 𝑉noise is the voltage noise in thePDN.

The SSN waveform cannot be calculated directly with𝑍PDN(𝑗𝜔) because of the impedance function that cannotbe extracted directly from the circuit model that containspower/ground planes and capacitors in time domain. Indeed,an impedance approximation with a rational function isnecessary [12].

The impedance rational approximation in the frequencydomain can be written [14] as

𝑍PDN (𝑠) ≈ 𝑑 + 𝑁∑𝑛=1

𝑟𝑛𝑠 − 𝑝𝑛 . (3)

In (3), 𝑠 represents the Laplace variable, 𝑝𝑛 are the poles,and 𝑟𝑛 are the residues, all of them can be either real orcomplex conjugate pairs. The term 𝑑 is a real constant and𝑁is the order of the approximation. Let us consider a weightingfunction 𝜎(𝑠) defined as

𝜎 (𝑠) = 𝑁∑𝑛=1

𝑟𝑛𝑠 − 𝑝 𝑛 + 1, (4)

where 𝑝𝑛 represent the poles of the function 𝜎(𝑠) and 𝑟𝑛 arethe residues corresponding to 𝑝𝑛.

By multiplying (4) with 𝑍PDN(𝑠) we import its rationalapproximation and we find

𝑁∑𝑛=1

𝑟𝑛𝑠 − 𝑝𝑛 + 𝑑 ≈ (𝑁∑𝑛=1

𝑟𝑛𝑠 − 𝑝𝑛 + 1) ⋅ 𝑍PDN (𝑠) . (5)

We note that 𝜎(𝑠) has the same poles of (𝜎(𝑠) ⋅ 𝑍PDN(𝑠)).𝑍PDN(𝑠) rational function approximation can be easilyobtained from (5). So, we find

𝑍PDN (𝑠) = (𝜎𝑍PDN)fit (𝑠)𝜎fit (𝑠) = ∏𝑁+1𝑛=1 (𝑠 − 𝑧𝑛)∏𝑁𝑛=1 (𝑠 − 𝑧𝑛) , (6)

where

(𝜎𝑍PDN)fit (𝑠) = ∏𝑁+1𝑛=1 (𝑠 − 𝑧𝑛)∏𝑁𝑛=1 (𝑠 − 𝑝𝑛) ;

𝜎fit (𝑠) = ∏𝑁𝑛=1 (𝑠 − 𝑧𝑛)∏𝑁𝑛=1 (𝑠 − 𝑝𝑛) .

(7)

Active and Passive Electronic Components 3

Equation (6) shows that the poles of 𝑍PDN(𝑠) become thezeros of 𝜎fit(𝑠).We observe that the starting poles are canceledin the process of division because the poles of (𝜎𝑍PDN)fit(𝑠)are the same of 𝜎fit(𝑠). In fact, it is enough to calculate thezeros of 𝜎fit(𝑠) to obtain a good set of poles of 𝑍PDN(𝑠) [14].

The calculation of the poles and the residues of theimpedance rational approximation in the frequency domaincan be achieved by the principle of vector fitting in twosteps based on the starting poles. The first step involvesthe identification of the poles based on (5) which can beeventually written in this form:

𝑁∑𝑛=1

𝑟𝑛𝑠 − 𝑝𝑛 + 𝑑 − (𝑁∑𝑛=1

𝑟𝑛𝑠 − 𝑝𝑛)𝑍PDN (𝑠) ≈ 𝑍PDN (𝑠) . (8)

Equation (8) can also be written for 𝑘 frequency points asa linear problem:

[𝐴] ⋅ {𝑥} = {𝑏} , (9)

where

[𝐴]

=[[[[[[[[[

1𝑠1 − 𝑝1 ⋅ ⋅ ⋅1𝑠1 − 𝑝𝑁 1 −𝑍PDN (𝑠1)𝑠1 − 𝑝1 ⋅ ⋅ ⋅ −𝑍PDN (𝑠1)𝑠1 − 𝑝𝑁... ... ... ... ... ... ...

1𝑠𝑘 − 𝑝1 ⋅ ⋅ ⋅1𝑠𝑘 − 𝑝𝑁 1 −𝑍PDN (𝑠𝑘)𝑠𝑘 − 𝑝1 ⋅ ⋅ ⋅ −𝑍PDN (𝑠𝑘)𝑠𝑘 − 𝑝𝑁

]]]]]]]]],

{𝑥} = [𝑟1 ⋅ ⋅ ⋅ 𝑟𝑁 𝑑 𝑟1 ⋅ ⋅ ⋅ 𝑟𝑁]𝑇 ,{𝑏} = [𝑍PDN (𝑠1) ⋅ ⋅ ⋅ 𝑍PDN (𝑠𝑘)] .

(10)

The vector fitting examined the problem of (8) by solvingthe problem of (9) using the least squares method and thenpasses to the calculation of the zeros by computing theeigenvalues of the matrix𝐻:

[𝐻] = [𝐷] − {𝑐} {𝑟}𝑇 , (11)

where [𝐷] is a diagonal matrix containing the starting poles,and {𝑐} is a column vector of ones, and {𝑟}𝑇 is a row-vectorcontaining the residues of 𝜎(𝑠).

The second phase of vector fitting consists of calculatingthe residues of 𝑍PDN(𝑠) directly from (6).

The rational approximation with the vector fitting infrequency domain should respect several criteria such aspassivity, causality, and stability. The passivity is satisfiedwhen the eigenvalues of Re{𝑍PDN(𝑠)} are strictly positive [15].This leads to the optimization stage:

Δ𝑍PDN (𝑠) = 𝑁∑𝑛=1

Δ 𝑟𝑛𝑠 − 𝑝𝑛 + Δ𝑑 ≅ 0. (12)

With

eig(Re{𝑍PDN (𝑠) + Δ𝑑 + 𝑁∑𝑛=1

Δ𝑟𝑛𝑠 − 𝑝𝑛}) > 0. (13)

The first part of (12) minimizes the variation in theimpedance matrix elements, whereas the second imposes thecriterion of passivity on the disturbedmodel [15].The stabilitycan be satisfied by controlling the rational approximationpoles. The stability condition is, thus, equivalent to grantingthat the poles lie in the left-hand plane. Finally, the causalityis satisfied when we reach Re(𝑝𝑛) < 0 [16].

After having respected these three criteria, 𝑍PDN(𝑠) canbe written in the frequency domain as

𝑍PDN (𝑠) = 𝑑 + 𝑀∑𝑚=1

𝑎𝑚𝑠 − 𝑏𝑚+ 𝑁∑𝑛=1

2𝑟𝑛𝑟 (𝑠 − 𝑝𝑛𝑟) − 2𝑟𝑛𝑖𝑝𝑛𝑖(𝑠 − 𝑝𝑛𝑟)2 + 𝑝2𝑛𝑖 ,(14)

where the 𝑁 poles (𝑝𝑛𝑟 − 𝑗𝑝𝑛𝑖, 𝑝𝑛𝑟 + 𝑗𝑝𝑛𝑖) and their corre-sponding residues (𝑟𝑛𝑟−𝑗𝑟𝑛𝑖, 𝑟𝑛𝑟+𝑗𝑟𝑛𝑖) are complex conjugatepairs, and the𝑀 poles 𝑏𝑚 and its corresponding residues 𝑎𝑚are real.

By performing the inverse Laplace transformation, theimpedance in the time domain has the following form:

𝑧PDN (𝑡)= 𝑑𝛿 (𝑡) + 𝑀∑

𝑚=1

𝑎𝑚𝑒𝑏𝑚𝑡ℎ (𝑡)

+ 2 𝑁∑𝑛=1

√(𝑟2𝑛𝑟 + 𝑟2𝑛𝑖)𝑒𝑝𝑛𝑟𝑡 cos (𝑝𝑛𝑖𝑡 + 𝜑) ℎ (𝑡) ,(15)

where 𝛿(𝑡) is the Dirac impulsion, ℎ(𝑡) is the unit stepfunction, and 𝜑 = 𝑎𝑟 cos(𝑟𝑛𝑟/√𝑟2𝑛𝑟 + 𝑟2𝑛𝑖).

It is clear that the impedance function in the time domaincan be easily obtained from the rational approximation in thefrequency domain.

3. Simultaneous Switching Noise in PowerDistribution Network

Once the impedance function in the time domain is deter-mined from (2), the SSN waveform can be calculated asfollows:

Vnoise (𝑡) = [𝑑𝛿 (𝑡) + 𝑀∑𝑚=1

𝑎𝑚𝑒𝑏𝑚𝑡ℎ (𝑡)

+ 2 𝑁∑𝑛=1

√(𝑟2𝑛𝑟 + 𝑟2𝑛𝑖)𝑒𝑝𝑛𝑟𝑡 cos (𝑝𝑛𝑖𝑡 + 𝜑) ℎ (𝑡)]∗ 𝑖load (𝑡) ,

(16)

where ∗ denotes the convolution operation.For digital signals at GHz, the pulse width of switching

current is in the order of 0.1 ns, and the resonance periodexceeds 1 ns for typical PDNs [12]. Thus, the current impulsecan be seen like one with limited amplitude if the PDN


TTr Tf

I0

t

iload

Figure 2: Switching current waveform.

PDN multiport

Port 1

Port k

...

Figure 3: Example of PDN with multiport.

resonance period is very large compared to the impulse widthof the current.

We assume that the switching current is a triangularperiodic signal as indicated in Figure 2. The surface of thecurrent impulse can be estimated by 𝑆 = 𝐼0((𝑇𝑟 + 𝑇𝑓)/2);therefore it can be replaced by 𝑖(𝑡) = 𝑆𝛿(𝑡). The noise isperiodic and it is given by the following formula:

Vnoise (𝑡) = 𝑑 ∞∑𝑙=0

𝑖load (𝑡 − 𝑙𝑇) + 𝑆 ∞∑𝑙=0

[ 𝑀∑𝑚=1

𝑎𝑚𝑒𝑏𝑚(𝑡−𝑙𝑇)

+ 2 𝑁∑𝑛=1

𝑒𝑝𝑛𝑟(𝑡−𝑙𝑇)√(𝑟2𝑛𝑟 + 𝑟2𝑛𝑖) cos (𝑝𝑛𝑖 (𝑡 − 𝑙𝑇) + 𝜑)]⋅ ℎ (𝑡 − 𝑙𝑇) .

(17)

In real circuit system, the PDN is a multiport system asrepresented in Figure 3.

So, the SSN of the 𝑞th port is calculated by

V𝑞 (𝑡) = 𝑘∑𝑗=1

𝑧𝑞𝑗 (𝑡) ∗ 𝑖𝑗 (𝑡) , (18)

where 𝑖𝑗(𝑡) is the switching current of the 𝑗th port and 𝑧𝑞𝑗(𝑡) isthe inverse Laplace transformation of𝑍𝑞𝑗(𝑠)which representsthe impedance between the 𝑗th port and the 𝑞th port and𝑧𝑞𝑞(𝑡) is the self-impedance of the 𝑞th port and 𝑘 is thenumber of the ports.

4. Computational Example: The SSNof Power Distribution Network withDual Supply Voltages

Multiple power supply voltages are often used inmodern highperformance ICs, like microprocessors, to decrease powerconsumption without affecting circuit speed. To maintainthe power distribution network impedance below a specifiedlevel, multiple decoupling capacitors are placed at differentlevels of the power grid hierarchy as illustrated in Figure 4[17].

In this section, a study of a system with two integratedcircuits or cores in the same chip is presented. It comprisedtwo equivalent circuits, one without the ground parasiticcircuit return (Figure 5) and another with it (Figure 10). Ourgoal is to obtain the SSN through a detailed circuit analysis.

4.1. Analysis of the SSN for PDN Circuit without GroundParasitic Circuit Return. A lumped circuit model of a PDNas depicted in Figure 5 is considered [18]. The packagepins, PCB, and VRM are modeled using RL circuits. Theparameters of decoupling capacitors to provide power to ICsand the noise parameters of the pins are shown by Figure 5.The integrated circuits activity is modeled by current sources.Each current source has a triangular form with an amplitudeof 1 A, an impulse width of 0.2 ns, and a period of 2 ns. So,the bandwidth impedance is 3.5 GHz. The coupling betweenthese circuits is modeled by series RLC circuits.

As already mentioned in the introduction, the model of aPCB can be extracted using different methods, such as FDTDand transmission matrix method.

The PDN is composed of several networks of decouplingcapacitor, because no single decoupling capacitor networkwill provide a low enough inductance. Therefore, the realsolution to the high-frequency decoupling problem lies in theuse of multiple decoupling capacitors. The number of thesecapacitors and their type, values, and placement with respectto the IC are important in determining their effectiveness.Many approaches have been proposed such as the use ofmultiples capacitors all of the same value, the use of multiplecapacitors of two different values, and the use of multiplecapacitors of many different values, usually spaced a decadeapart.

As already said in Section 2, to be an effective decouplingnetwork, the impedance of the network must be kept belowsome target value over the range of interest. This impedanceis required to compute the number of capacitors to be usedin PDN, while being based on equation mentioned in [19].After computing the number 𝑛 of the capacitors, it is possibleto calculate the value of the total capacitor from the value ofthe target impedance. Finding this value and dividing it bythe number 𝑛 allows finding the minimum value to be usedfor each capacitor network. And using one of the approachescited earlier, the model to study can be built.

The values of all resistive, capacitive, and inductiveelements of the circuit have been taken from the paper [12].According to this paper, for system with a single core, thesevalues represent a real PCB with dimensions of 80mm ×


VRM

On-boarddecouplingcapacitor

DieOn-package

decoupling capacitor

Power plan

Ground plan

Figure 4: Cross section diagram of PDN.

Parameters:

Cc12 = 1Ia = 1Cb12 = 10Cp12 = 100

R1

0.001R24 m

R35 m

R46 m

R57 m

R66 m

R77.5 m

R8

0.001R910 m

R1014 m

R1119 m

0

R1226 m

I2TF = 100 pPW = 2 pPER = 2 n

TR = 100 p

R1453 m

R367.5 m

R15

0.001

R376 m

R16

0.001

R387 m

R396 m

R405 m

R414 m

R201 m

R23

0.001

V1

3.3 V

0

I1TD 0=

TD 0=

TF = 100 pPW = 2 pPER = 2 n

TR = 100 p

R295 m

R30

0.001

L1

10 nH1 2

L2

0.13 nH

1

2

L4

0.13 nH

1

2

L5

0.13 nH

1

2

L6

0.13 nH

1

2

L7

0.13 nH

1

2

L8

1 nH

1 2

L9

0.1 nH

1

2

L10

0.1 nH

1

2

L11

0.1 nH

1

2

L12

0.1nH

1

2

L14

0.1 nH

1

2

L15

30 pH1 2

L16

10 nH

1 2L23

1

1 2L30

1 2

L3

0.13 nH

1

2

C1

18.8 u

C2

8.8 u

C3

4 u

C4

1.88u

C5

0.88 u

C6

0.4 u

C7

188 n

C8

80 n

C9

40 n

C10

18.8 n

C11

8.8 n

C12

8 n

C13{Cc12}

C17{Cb12}

R28

1

2

1

2

1

210 m

C24{Cp12}

0

V2

1.2 V

C25

18.8 u

C26

8.8u

C27

4 u

C28

1.88 u

C29

0.88 u

C30

0.4 u

C31

188 n

C32

80 n

C33

40 n

C34

18.8n

C35

8.8 n

0

C36

8 n

0

0

0

L13

0.13 n

1

2

L28

0.13n

1

2

L31

0.13 n

1

2

L32

0.13n

1

2

L33

0.13n

1

2

L34

0.13 n

1

2

L35

0.1 n

1

2

L36

0.1n

1

2

L37

0.1n

1

2

L38

0.1n

1

2

L39

0.1n

1

20

0 0

R3153 m

R3226 m

R3310 m

R3419 m

R3514 m

nn

n

nH

A

−

+

−

+−

−

+

+I1 = 0

I1 = 0

I2 = 1

I2 = {Ia}30 pH

L190.1

L190 L191

nH0.1 nH0.1 nH

Figure 5: Lumped circuit of the PDN with dual supply voltages and two cores without circuit return.

100mm. This PCB contains 8 global decoupling capacitorsand 4 local capacitors. In our study, we need a PCB withdimensions of 160mm × 100mm. This PCB must contain 16global decoupling capacitors and 8 local capacitors and mustbe divided into two parts by removing 100 𝜇m of the copperconstituting the upper surface of the circuit. This 100 𝜇mpresents the coupling between the two parts of PCB.

The circuit rational function parameters are calculated bythe principle of vector fitting. But before this calculation, it isnecessary to compute the values of this function in specificrange of frequency. Obtaining these values is performed bythe reduction method in which all elements of the matrix𝑌 are found first, and then the reduction is applied inaccordance with the principle explained below.

The circuit of Figure 5 is composed of 8 nodes where thenodes connected to the current sources are considered liketwo terminals.

So, the circuit admittance matrix 𝑌(𝑠) in the frequencydomain has a size 8 × 8 whose elements are calculated asfollows [20]:

(i) The𝑌𝑖𝑗 elements present the admittance of the branchbetween node 𝑖 and node 𝑗 with a negative sign.

(ii) The 𝑌𝑖𝑖 elements present the sum of the admittance ofall branches connected to the node 𝑖.

The matrix 𝑌(𝑠) is reduced in accordance with the twoterminals 1 and 2. To do this, we write the matrix 𝑌(𝑠) in theform of four submatrices as shown in

[𝑖𝑎𝑖𝑏] = [𝑌𝑎𝑎 𝑌𝑎𝑏𝑌𝑏𝑎 𝑌𝑏𝑏] ⋅ [

V𝑎V𝑏] , (19)

where “𝑎” denotes the nodes 1-2-3-4 and “𝑏” denotes thenodes 5-6-7-8, and 𝑌𝑎𝑎 and 𝑌𝑏𝑏 are square matrices. Since thecurrent injection to nodes 5-6-7-8 is zero, we have 𝑖𝑏 = 0, sowe can extract V𝑎 according to V𝑏 from the second row in (19):

V𝑏 = −𝑌−1𝑏𝑏 𝑌𝑏𝑎V𝑎. (20)

Inserting (20) into the first row of (19) gives

𝑖𝑎 = (𝑌𝑎𝑎 − 𝑌𝑎𝑏𝑌−1𝑏𝑏 𝑌𝑏𝑎) ⋅ V𝑎 = 𝑌red ⋅ V𝑎. (21)

The matrix 𝑌red obtained has a size 4 × 4, but as we saidpreviously we want to keep just the nodes of the terminals 1


Start

PDN model

Define the nodes of the PDN circuit model

End

RLC circuitParameters of the

package, chip, and PCBcircuit

Determine the admittance matrix of the circuit in

frequency domain

Reduce the matrix Y(s) to obtain the transfer

function of the system

Apply the principal of vector fitting to find therational approximation

Use the inverse Laplace transform

Obtain the noise in time domain

If the approximation

is accurate

Yes

No

Figure 6: SSN analysis methodology.

and 2, so the matrix 𝑌red needs another reduction to obtaina new matrix of size 2 × 2. To find this matrix we follow thesame procedure mentioned above, where we still decomposeonce 𝑌red into 4 submatrices 𝑌𝐴𝐴, 𝑌𝐴𝐵, 𝑌𝐵𝐴, and 𝑌𝐵𝐵, where“𝐴” denotes nodes 1-2 and “𝐵” denotes nodes 3-4, and 𝑌𝐴𝐴and 𝑌𝐵𝐵 are square matrices.

After obtaining the reduced admittance matrix, theimpedance matrix seen from terminals 1 and 2 is calculatedby its inverse. Thus, the noise of the two ports is given by

V1noise (𝑡) = 𝑧11 (𝑡) ∗ 𝑖1 (𝑡) + 𝑧12 (𝑡) ∗ 𝑖2 (𝑡) ,V2noise (𝑡) = 𝑧21 (𝑡) ∗ 𝑖1 (𝑡) + 𝑧22 (𝑡) ∗ 𝑖2 (𝑡) . (22)

Figure 6 shows SSN methodology followed in this paper.

Tomake a comparison between the programmed theoret-ical calculation (VFM + reduction matrix 𝑌) and numericalcomputation (real circuit), the simulations of this applicationare made using PSpice and MATLAB tools. During thesimulations, there are two factors that influence noise. Thefirst factor accounts for the activity of the second integratedcircuit (𝐼2 = 1A or 𝐼2 = 0A), and the second factor is theinfluence of the coupling capacitor values between the twocircuits (test of several values: Figures 7 and 8).

The comparison between the results given by our methodand PSpice shows first that the vector fitting is very powerfulin the calculation of the poles and residues of the rationalfunction that approximates SSN, which is illustrated by thecoincidence of the two curves.The results, also, show that thepresence of a second active integrated circuit increases the


0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 53.285

3.293.295

3.33.305

3.313.315

Time (s)

Volta

ge (V

)

PSpiceOur method

×10−8

(a)

0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 53.29

3.295

3.3

3.305

3.31

Time (s)

Volta

ge (V

)

PSpiceOur method

×10−8

(b)

Figure 7: SSN waveform of the PDN near the first core; 𝐶b12 = 1 nF, 𝐶p12 = 10 nF, and 𝐶c12 = 100 nF. (a) 𝐼2 = 1A. (b) 𝐼2 = 0A.

PSpiceOur method

0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 51.192

1.194

1.196

1.198

1.2

1.202

1.204

1.206

Time (s)

Volta

ge (V

)

×10−8

(a)

0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 51.185

1.19

1.195

1.2

1.205

1.21

1.215

Time (s)

Volta

ge (V

)

PSpiceOur method

×10−8

(b)

Figure 8: SSN waveform of the PDN near the second core; 𝐶b12 = 1 nF, 𝐶p12 = 10 nF, and 𝐶c12 = 100 nF. (a) 𝐼2 = 0A. (b) 𝐼2 = 1A.

rate of the SSN to core 1, that is shown in Figure 7, whichshows that with 𝐼2 = 1A and the fluctuations are equal to22mV, while with 𝐼2 = 0A, they are equal to 12mV.

Presently, by changing the value of coupling capacitancechip 𝐶c12 through 1 nF instead of 100 nF, we observe that theformof the SSN in the two cores in the case of 𝐼2 = 1Adoes notchange. But, there are fluctuations in the second case when 𝐼2= 0A increase in the first port, whereas they decrease in thesecond port as illustrated by Figure 9.

From the results of this section we can conclude that thepresence of several integrated circuits in the same chip canincrease the fluctuations of the simultaneous switching noisedue to the existence of coupling between these circuits.

4.2. Analysis of the SSN for PDN Circuit with Ground ParasiticCircuit Return. This second application is for studying andcalculating the simultaneous switching noise of the samePDN circuit (Figure 5) except that this time the circuitincludes a ground parasitic circuit return (Figure 10), whilecontaining the same component values with the two currentsources. A reduction is made for the 𝑌 matrix throughthe previously presented method. The number of reductionsdone is always equal to two, except that the size of the last

reduced matrix is 4 × 4. The simultaneous switching noise inthis case is calculated by

Vnoise = V𝑝 − V𝑔, (23)

where V𝑝 and V𝑔 are calculated by (18). The principle of therational approximation with vector fitting is always used.Thefrequency domain noise obtained by PSpice tool is shown inFigure 11. The figure gives the noise for different values of thecapacitance 𝐶c12 near of the two cores.

The study was performed again through the study of theeffect of the current of the second core and the values of thecoupling capacitors between the two cores.

The presence or the absence of the current of the secondcore has no effect on the SSN at core 1, whereas at the secondcore while current 𝐼2 is zero, the degree of fluctuation ispresented around 1.2 V.This is justified by the presence of thecoupling between the two cores. But the fluctuations in thecase of 𝐼2 = 1A are bigger than the fluctuations in the case of 𝐼2= 0A.The simulations of these results are shown in Figure 12.

To study the effect of the coupling capacitance betweenthe PDNs, we keep 𝐼2 = 0A in all simulations that follow andeach time we change the capacitance values.


PSpiceOur method

0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 51.185

1.19

1.195

1.2

1.205

1.21

1.215

Time (s)

Volta

ge (V

)

×10−8

(a)

PSpiceOur method

0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 51.1961.1971.1981.199

1.21.2011.2021.2031.204

Time (s)

Volta

ge (V

)

×10−8

(b)


I2

TD = 0TF = 100 pPW = 2 pPER = 2 n

TR = 100 p

R42

0.001

R1

0.001

R43

0.001

R2

4 mR3

5 mR4

6 m

R44

0.001

R5

7 mR6

6 mR7

7.5 m

R45

0.001

R8

0.001

R46

0.001

R47

0.001

R9

10 m

L41

10 nH

1 2

R10

14 mR11

19 m

L42

1 nH

1 2

R12

26 m

L43

30 pH

1 2

L44

10 nH

1 2L45

1 nH

1 2

R14

53 m

L46

30 pH

1 2

R36

7.5 m

R15

0.001

R37

6 m

R16

0.001

R38

7 mR39

6 mR40

5 mR41

4 m

R20

1 m

R23

0.001

V1

3.3 V I1

TD = 0

TF = 100 pPW = 2 pPER = 2 n

TR = 100 p

R29

5 m

R30

0.001

L1

10 nH

1

1

2

1

2

1

2

2

L2

0.13 nH

1

2

L4

0.13 nH

1

2

L5

0.13 nH

1

2

L6

0.13 nH

1

2

L7

0.13 nH

1

2

L8

1 nH1 2

L9

0.1 nH

1

2

L10

0.1 nH

1

2

L11

0.1 nH

1

2

L12

0.1 nH

1

2

L14

0.1 nH

1

2

L15

30 pH

1 2

L16

10 nH

1 2

L23

1 nH

1 2L30

1 2

L3

0.13 nH

1

2C1

18.8 nC2

8.8 uC3

4 uC4

1.88 uC5

0.88u

C6

0.4 uC7

188 nC8

80 nC940 n

C1018.8 n

C11

8.8 n

C128 n

C17

{Cb12}

R28

10 m

C24

{Cp12}

0

V2

1.2 V

C25

18.8 nC26

8.8 uC27

4 uC28

1.88 uC29

0.88 uC30

0.4 u

C31188 n

C3280 n

C3340 n

C3418.8 n

C358.8 n

C36

8 n

0

L13

0.13 n

1

2

L28

0.13 n

1

2

L31

0.13 n

1

2

L32

0.13 n

1

2

L33

0.13 n

1

2

L34

0.13 n

1

2

L35

0.1 n

1

2

L36

0.1 n

1

2

L37

0.1 n

1

2

L38

0.1 n

1

2

L39

0.1 n

1

2

R31

53 mR32

26 mR33

10 mR34

19 mR35

14 m

C18

{Cc12}

Parameters:

−

+

−

+

−

−

+

+

Cb12 = 100 n

Cp12 = 10 nCc12 = 1 n

Ia = 0 A

I1 = 0

I1 = 0

I2 = 1

I2 = {Ia}

30 pH

L17L170

L171

0.1 nH0.1 nH 0.1 nH

Figure 10: Lumped circuit of the PDN with dual supply voltages and two cores and with return circuit.

For the electrical coupling presented by the capacitance𝐶c12, an increase in its values of 1 nF (Figure 12(b)) to 100 nFincreases (Figure 13) the fluctuations of the SSN around 1.2 Vto almost 5mV for 𝐶c12 = 100 nF and 2mV for 𝐶c12 = 1 nFat the second core, while this increase does not have a greatinfluence on the SSN at the first core. Figure 13 illustratesthese results.

From these results, we can conclude that the additionof ground parasitic circuit influences the form of the SSNprecisely at the second core and the fluctuations becomemoreimportant. We can also conclude that the larger the couplingis beside the two cores, the more important the noise is.

5. Conclusions

In this paper, a study is made to analyze the simultaneousswitching noise in power distribution network with dualsupply and two cores. Unlike Ding and Li [12], this study isinitiated by the calculation of noise in the time domain byan approximation of the impedance in the frequency domainwith a rational function by vector fitting and reductionmatrixtechniques. Then, the SSN is calculated based on switchingcurrent. The results show that the presence of multiple coresin a single card influences the SSN by increasing theirfluctuations due to electrical coupling between them. It has


1

100 m

10 m

10 M 100 M 1G 10 GFrequency (Hz)

Cc12 = 1 nFCc12 = 10 nFCc12 = 100 nF

Volta

ge (V

)

(a)

1

10 m

Volta

ge (V

)

10 M 100 M 1G 10 GFrequency (Hz)

Cc12 = 1 nFCc12 = 10 nFCc12 = 100 nF

1

100

(b)

Figure 11:The frequency domain noise of the PDN for𝐶b12 = 100 nF,𝐶p12 = 10 nF, and𝐶C12 = 1 nF, 10 nF, and 100 nF. (a) First core. (b) Secondcore.

PSpiceOur method

0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 51.185

1.19

1.195

1.2

1.205

1.21

Time (s)

Volta

ge (V

)

×10−8

(a)

PSpiceOur method

0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 51.199

1.1995

1.2

1.2005

1.201

Time (s)

Volta

ge (V

)

×10−8

(b)


PSpiceOur method

0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 51.1971.1981.199

1.21.2011.2021.2031.204

Time (s)

Volta

ge (V

)

×10−8

Figure 13: SSN waveform of the PDN near the second core; 𝐶b12 =100 nF, 𝐶p12 = 10 nF, 𝐶c12 = 100 nF, and 𝐼2 = 0.

been also found that even if a core is not active, a noise existsat its terminals that can disrupt normal operation. Accordingto the latest results, it is found that, the ground parasiticcircuit return influences the shape of the SSN.The greater thecoupling is beside the cores, the more important the noise is.

Conflicts of Interest

The authors declare that there are no conflicts of interestregarding the publication of this paper.

References

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[2] B. Garben, R. Frech, and J. Supper, “Simulations of frequencydependencies of delta-I noise,” in Proceedings of the IEEE10th Topical Meeting on Electrical Performance of ElectronicPackaging, pp. 199–202, Cambridge, MA, USA, 2001.

[3] I. Novak, “Lossy power distribution networks with thin dielec-tric layers and/or thin conductive layers,” IEEE Transactions onAdvanced Packaging, vol. 23, no. 3, pp. 353–360, 2000.

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[5] S. Chun, J. Kim, N. Na, and M. Swaminathan, “Comparison ofmethods for modeling ALANs power plane structure,” Packag,pp. 247–250, 2000.

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[9] J. M. Hobbs, H. Windlass, V. Sundaram et al., “Simultaneousswitching noise suppression for high speed systems usingembedded decoupling,” Proceedings - Electronic Componentsand Technology Conference, pp. 339–343, 2001.

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[13] L. D. Smith, “Power distribution system design methodologyand capacitor selection for modem cmos technology,” IEEETransactions on Advanced Packaging, vol. 22, no. 3, pp. 284–291,1999.

[14] B. Gustavsen and A. Semlyen, “Rational approximation of fre-quency domain responses by vector fitting,” IEEE Transactionson Power Delivery, vol. 14, no. 3, pp. 1052–1061, 1999.

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[16] P. Triverio, S. Grivet-Talocia, M. S. Nakhla, F. G. Canavero, andR. Achar, “Stability, causality, and passivity in electrical inter-connect models,” IEEE Transactions on Advanced Packaging,vol. 30, no. 4, pp. 795–808, 2007.

[17] M. Popovich and E. G. Friedman, “Decoupling capacitors formulti-voltage power distribution systems,” IEEE Transactionson Very Large Scale Integration (VLSI) Systems, vol. 14, no. 3, pp.217–228, 2006.

[18] B. Hassan and S. Mouloud, “Analysis and optimization ofpower integrity issues fromhigh speedCMOS integrated circuitinteractions in aeronautic systems,” in Proceedings of the 13thInternational Multi-Conference on Systems, Signals and Devices,SSD ’16, pp. 636–639, Leipzig, Germany, 2016.

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[20] B.Gustavsen andH.M. J. De Silva, “Inclusion of rationalmodelsin an electromagnetic transients program: Y-Parameters, Z-Parameters, S-parameters, transfer functions,” IEEE Transac-tions on Power Delivery, vol. 28, no. 2, pp. 1164–1174, 2013.

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