introduction connections converters uvm commands · an open-source, standards-based library for...

An Open-Source, Standards-Based Library for Achieving Interoperability Between TLM Models in SystemC and SystemVerilog

UVM Connect

Adam Erickson Verification Methodologist, DVT

June 2012

presented at NASCUG XVIII © 2012 Mentor Graphics Corp.

UVM Connect

Introduction Converters UVM Commands

Connections Introduction Converters UVM Commands

Connections

Presented on June 6th, 2012 at the 18th meeting of the North American SystemC User's Group in San Francisco, CA


What is UVM-Connect?

Enables TLM communication between SV and SC models • Using native TLM 1.0 and TLM 2.0 calls • Using existing TLM models as-is

UVM Command API • To query and control SV UVM simulation

Provided as separate SV and SC packages — Open source (Apache 2.0) Nothing Proprietary — Standards-based Vendor Independent

U

VM

C

SystemC

SV / UVM

UVM TLM 2.0 Initiator Socket

UVM TLM 2.0 Target Socket

SC TLM 2.0 Target Socket

SC TLM 2.0 Initiator Socket


What is UVM Connect for?

Leverage lang strengths • Drive SC models with

random stimulus from SV • Design models with full power

of language in which they are written

Expand VIP Inventory • Integrate more off-the-shelf VIP

VIP Library

Seq Seq

T T SC Models

Seq Seq Seqs Seqs

Abstraction Refinement • Reuse SC models

as reference models in SV • Integrate SV RTL models

in SC

T

T2

T1

T1

Seq Agent1 DUT Agent2

Score SC Ref Model


What is UVM Connect for?

Encapsulation • Minimize modifications when substituting components • Wrap foreign IP in native skin

• integrate as ordinary native component

• Hide cross-language connection details

T

T2

T1

T1

Seq Agent1 DUT Agent2

Score Predict SC Ref Model

uP

Bus Periph A

Periph B

Mem

DMA Ctrl SV

RTL


UVM Connect



Connections


TLM Connection – Native SCNative SC

initiator socket target socket

#include <systemc.h> using namespace sc_core; #include "consumer.h" #include "producer.h" int sc_main(int argc, char* argv[]) { producer prod("producer"); consumer cons("consumer"); prod.out.bind(cons.in); sc_start(-1); return 0; }

consumer producer

SC SC


TLM Connection – Native SV (UVM)

import uvm_pkg::*; `include "producer.sv" `include "consumer.sv" module sv_main; producer prod = new("prod"); consumer cons = new("cons"); initial begin prod.out.connect(cons.in); run_test(); end endmodule

initiator socket target socket

consumer producer

SV SV


UVM Connect – SV SC

#include "uvmc.h" using namespace uvmc; #include "consumer.h" int sc_main(int argc, char* argv[]) { consumer cons("cons"); uvmc_connect(cons.in,"foo"); sc_start(); return 0; }

import uvm_pkg::*; import uvmc_pkg::*; `include "producer.sv" module sv_main; producer prod = new("prod"); initial begin uvmc_tlm #():: connect(prod.out,"foo"); run_test(); end endmodule

default transaction type is generic payload

target socket

consumer

SC

initiator socket

producer

SV

match made by lookup strings


UVM Connect – SV SC

Add a scoreboard, add a connection.

SC-to-SV

SV-to-SC-to-SV

#include "uvmc.h" using namespace uvmc; #include "consumer.h" int sc_main(int argc,char* argv[]) { consumer cons("consumer"); uvmc_connect(cons.in,"foo"); uvmc_connect(cons.ap,"bar"); sc_start(); return 0; }

import uvm_pkg::*; import uvmc_pkg::*; `include "producer.sv" `include "scoreboard.sv" module sv_main; producer prod = new("prod"); scoreboard sb = new("sb"); initial begin prod.ap.connect(sb.expect_in); uvmc_tlm #():: connect(prod.out, "foo"); uvmc_tlm1 #(uvm_tlm_gp):: connect(sb.actual_in, "bar"); run_test(); end endmodule

bar

foo

scoreboard

producer consumer

compare

SC SV

SV


TLM Connection – SC SV #include <systemc.h> using namespace sc_core; #include "producer.h" #include "uvmc.h" using namespace uvmc; struct prod_uvm : public producer { prod_uvm(sc_module_name nm) : producer(nm) { SC_THREAD(objector); } SC_HAS_PROCESS(prod_uvm) void objector() { uvmc_raise_objection("run"); wait(done); uvmc_drop_objection("run"); } };

import uvm_pkg::*; import uvmc_pkg::*; `include "consumer.sv" module sv_main; consumer cons = new("cons"); initial begin uvmc_tlm #()::connect(cons.in,"42"); uvmc_init(); run_test(); end endmodule

raise objection, wait for “done”, drop objection

background thread

derive from—don't change—native SC producer

SV side initializes UVMC command API

consumer producer

SV SC

For when SC has an active component

and must control UVM

int sc_main(int argc,char* argv[]) { prod_uvm prod("producer"); uvmc_connect(prod.out,"42"); sc_start(-1); return 0; }


TLM Connections – Hierarchical (SC wraps SV)

SC #include "consumer.h" class producer: public sc_module { public: tlm_initiator_socket<32> out; SC_CTOR(producer) : out("out") { uvmc_connect_hier(out,"sv_gen"); } };

SV module sv_main; producer prod = new("prod"); initial begin uvmc_tlm #()::connect(prod.out,"sv_gen"); run_test(); end endmodule

To end-user, looks like pure SC testbench (Secret: SC producer implemented as SV component)

producer

producer

SV SC

consumer

SC

int sc_main(int argc, char* argv[]) { producer prod("producer"); consumer cons("consumer"); prod.out.bind(cons.in); sc_start(); return 0; };


UVM Connect



Connections


SV Conversion – In-Transaction class packet extends uvm_sequence_item; typedef enum { WRITE, READ, NOOP } cmd_t;

rand cmd_t cmd;

rand int addr;

rand byte data[$];

function new(string name="");

super.new(name);

endfunction

ùvm_object_utils(packet)

virtual function void do_pack (uvm_packer packer); ùvm_pack_enum(cmd) ùvm_pack_int(addr) ùvm_pack_queue(data) endfunction virtual function void do_unpack (uvm_packer packer); ùvm_unpack_enum(cmd,cmd_t) ùvm_unpack_int(addr) ùvm_unpack_queue(data) endfunction endclass

extends uvm_sequence_item

In SV, conversion functions are

implemented in the transaction class

do_pack use ùvm_pack_*

macros or packer API

do_unpack use ùvm_unpack_*

macros or packer API

Other converter options: ùvm_field macros, external converter


SC Conversion – External Converter Class

class packet {

enum cmd_t { WRITE=0, READ, NOOP };

cmd_t cmd;

unsigned int addr;

vector<unsigned char> data;

}; Define template specialization of

uvmc_converter<T>

Pack: Stream from data members into

packer using operator <<

SC-side transaction requires no base class or factory registration, etc.

No dependencies on UVM or UVM Connect

Unpack: Stream into data members from

packer using operator >>

template <> struct uvmc_converter<packet> { static void do_pack (const packet &t, uvmc_packer &packer) { packer << t.cmd << t.addr << t.data; } static void do_unpack (packet &t, uvmc_packer &packer) { packer >> t.cmd >> t.addr >> t.data; } };

UVMC_UTILS_3(packet,cmd,addr,data) Generate with UVMC_UTILS_x macro (x = 1 to 20)

template <> struct uvmc_converter<packet> { static void do_pack (const packet &t, uvmc_packer &packer) { packer << t.cmd << t.addr << t.data; } static void do_unpack (packet &t, uvmc_packer &packer) { packer >> t.cmd >> t.addr >> t.data; } };


Type Support

Category SV SC Signed integrals

longint int shortint byte bit

long long* int short char bool

Unsigned integrals

longint unsigned int unsigned shortint unsigned byte unsigned bit unsigned

unsigned long long* unsigned int unsigned short unsigned char bool

Misc shortreal real string time enum

float double string sc_time enum

Arrays T arr[N] T q[$] T da[] T aa[KEY]

T arr[N] vector<T> list<T> map<KEY,T>

Bit vectors bit logic bit [L:R] logic [L:R]

sc_bit sc_logic sc_bv<N> sc_lv<N>

SC integers bit [N-1:0] bit [N-1:0] bit [N-1:0] bit [N-1:0]

sc_int<N> sc_uint<N> sc_bigint<N> sc_biguint<N>

The UVMC packer supports these types

directly

Other types can be accommodated in your

converters

Sub-objects supported. Just call their

converter methods directly: myobj::do_pack(tr, packer)

On 32-bit machines, SC long long is 32 bits.

SV longints are always 64 bits regardless of

architecture


UVM Connect



Connections


UVM Command API – Menu

Phasing • uvmc_wait_for_phase • uvmc_raise_objection • uvmc_drop_objection

Configuration • uvmc_set_config_int • uvmc_set_config_object • uvmc_set_config_string • uvmc_get_config_int • uvmc_get_config_object • uvmc_get_config_string

Most functions same as in UVM except have uvmc_ prefix

Factory • uvmc_print_factory • uvmc_set_factory_inst_override • uvmc_set_factory_type_override • uvmc_debug_factory_create • uvmc_find_factory_override

Reporting • uvmc_print_topology • uvmc_set_report_verbosity • uvmc_report_enabled • uvmc_report • UVM_INFO macros, et al

Topology • uvmc_print_topology


UVM Command API – Initialization

SV side • Call uvmc_init to start service • Will likely be unnecessary in future release

SC side • Must call from SC threads, as they will block until SV is ready

module top; import uvmc_pkg::*; ... initial uvmc_init(); ...


UVM Command API – Phasing

uvmc_wait_for_phase("run", UVM_PHASE_STARTED);

UVMC_INFO("SC_TOP/RAISE_OBJ", (string(name()) + " raising objection to run phase").c_str(), UVM_MEDIUM,""); uvmc_raise_objection("run", name(), "SC waiting 10ns"); // wait some delay to prove we are in control... wait(sc_time(10,SC_NS)); UVMC_INFO("SC_TOP/DROP_OBJ", (string(name()) + " dropping objection to run phase").c_str(), UVM_MEDIUM,""); uvmc_drop_objection("run", name(), "10ns has passed");


UVM Command API – Configuration

string s; uint64 i; prod_cfg_t cfg; cfg.min_addr=0x100; cfg.max_addr=0x200; uvmc_set_config_int ("env.prod", "", "some_int", 2); uvmc_set_config_string ("", "env.prod", "some_str", “Hello from SC”); uvmc_set_config_object ("prod_cfg_t", "env", "prod", "config", cfg); i=0; s=""; cfg.min_addr=0; cfg.max_addr=0; uvmc_get_config_int ("e.prod", "", "some_int", i); uvmc_get_config_string ("e.prod", "", "some_str", s); uvmc_get_config_object ("prod_cfg", "e.prod", "", "config", cfg);

Equivalent object on SV-side must extend uvm_object and be registered with factory by name. Recommend use of config objects as much as possible: all-at-once, type-safe, etc.


What is UVM-Connect?

Enables TLM communication between SV and SC models • Using native TLM 1.0 and TLM 2.0 calls • Using existing TLM models as-is

UVM Command API • To query and control SV UVM simulation

Provided as separate SV and SC packages — Open source (Apache 2.0) Nothing Proprietary — Standards-based Vendor Independent

U

VM

C

SystemC

SV / UVM

UVM TLM 2.0 Initiator Socket

UVM TLM 2.0 Target Socket

SC TLM 2.0 Target Socket

SC TLM 2.0 Initiator Socket


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