Definition:

IA-64 is a 64-bit processor architecture which has been developed at Intel and is based on

Explicitly Parallel Instruction Computing ( EPIC ) and is designed as the foundation for Intel's

line of microprocessors through 2005. The Itanium is the first in Intel's line of IA-64 processors.

ISA means Itanium Solutions Alliance.[1]

Abstract:

The article reveals the meaning of the term "64 bits" which briefly discusses the history of 64-bit

system development, describes the most popular 64-bit processors of the Intel 64 architecture

and the 64-bit Windows operating system.[2]

Introduction:

The term "64-bit", within the scope of computer architecture, means that 64-bit integers and

other data types with the size 64 bits. By "64-bit systems" 64-bit microprocessor architectures or

64-bit operating systems may be understood. The 64 bit microprocessors are EM64T, IA-64 and

the 64-bit operating systems are Windows XP Professional x64 Edition. There are also compilers

that generate 64-bit program code.[2]

This article will discuss various aspects that are related to 64-bit technologies. It is intended for

programmers to start developing 64-bit programs and is oriented on Windows-developers since

the task of studying 64-bit systems is the most relevant for them.[2]

The Intel IA-64 chip has a different background for two reasons. Firstly it is having a family of

processors that have different characteristics from the RISC chips presented. Secondly its first

implementation, the Itanium processor is not yet available in regular products. Many vendors

have announced to market systems with the Itanium processor, like NEC and Fujitsu Siemens

while HP and SGI will offer them as alternative processors in their high end systems like the HP

SuperDome and the SGI Origin3000.[4]

History:

64 bits have just recently come into life of most users and applied programmers. But the history

with 64-bit data is rather long.[2]

1961: IBM delivers the IBM 7030 Stretch supercomputer, which uses 64-bit data words and 32-

or 64-bit instruction words.[2]

1974: Control Data Corporation launches the CDC Star-100 vector supercomputer, which uses a

64-bit word architecture (previous CDC systems were based on a 60-bit architecture).[2]

1976: Cray Research delivers the first Cray-1 supercomputer, which is based on a 64-bit word

architecture and will form the basis for later Cray vector supercomputers.[2]

1985: Cray releases UNICOS, the first 64-bit implementation of the Unix operating system.[2]

1991: MIPS Technologies produces the first 64-bit microprocessor, the R4000, which

implements the MIPS III ISA, the third revision of their MIPS architecture. The CPU is used in

SGI graphics workstations starting with the IRIS Crimson. Kendall Square Research deliver their

first KSR1 supercomputer, based on a proprietary 64-bit RISC processor architecture running

OSF/1.[2]

1992: Digital Equipment Corporation (DEC) introduces the pure 64-bit Alpha architecture which

was born from the PRISM project.[2]

1993: DEC releases the 64-bit DEC OSF/1 AXP Unix-like operating system (later renamed

Tru64 UNIX) for its systems based on the Alpha architecture.[2]

1994: Intel announces plans for the 64-bit IA-64 architecture (jointly developed with Hewlett-

Packard) as a successor to its 32-bit IA-32 processors. A 1998 to 1999 launch date is targeted.

SGI releases IRIX 6.0, with 64-bit support for the R8000 chip set.[2]

1995: Sun launches a 64-bit SPARC processor, the Ultra SPARC. Fujitsu-owned HAL Computer

Systems launches workstations based on a 64-bit CPU, HAL's independently designed first-

generation SPARC64. IBM releases the A10 and A30 microprocessors, 64-bit PowerPC AS

processors. IBM also releases a 64-bit AS/400 system upgrade, which can convert the operating

system, database and applications.[2]

1996: Nintendo introduces the Nintendo 64 video game console, built around a low-cost variant

of the MIPS R4000. HP releases an implementation of the 64-bit 2.0 version of their PA-RISC

processor architecture, the PA-8000.[2]

1997: IBM releases the RS64 line of 64-bit PowerPC/PowerPC AS processors.[2]

1998: Sun releases Solaris 7, with full 64-bit UltraSPARC support.[2]

1999: Intel releases the instruction set for the IA-64 architecture. AMD publicly discloses its set

of 64-bit extensions to IA-32, called x86-64 (later branded AMD64).[2]

2000: IBM ships its first 64-bit ESA/390-compatible mainframe, the zSeries z900, and its new

z/OS operating system.[2]

2001: Intel finally ships its 64-bit processor line, now branded Itanium, targeting high-end

servers. It fails to meet expectations due to the repeated delays in getting IA-64 to market.

NetBSD is the first operating system to run on the Intel Itanium processor at the processor's

release. Additionally, Microsoft releases Windows XP 64-Bit Edition, also for the Itanium's IA-

64 architecture, although it was capable of running 32-bit applications through an execution layer

WoW64.[2]

2003: AMD introduces its Opteron and Athlon 64 processor lines, based on its AMD64

architecture which is the first x86 based 64 bit processor architecture. Apple also ships the 64-bit

"G5" PowerPC 970 CPU courtesy of IBM. Intel maintains that its Itanium chips would remain its

only 64-bit processors.[2]

2004: Intel, reacting to the market success of AMD, admits it has been developing a clone of the

AMD64 extensions named IA-32e (later renamed EM64T, then yet again renamed to Intel 64).

Intel also ships updated versions of its Xeon and Pentium 4 processor families supporting the

new instructions.[2]

2004: VIA Technologies announces the Isaiah 64-bit processor.[2]

2005: On January 31, Sun releases Solaris 10 with support for AMD64 / Intel 64 processors. On

April 30, Microsoft releases Windows XP Professional x64 Edition for AMD64 / Intel 64

processors.[2]

2006: Sony, IBM, and Toshiba begin manufacturing of the 64-bit Cell processor for use in the

PlayStation 3, servers, workstations, and other appliances. Microsoft releases Windows Vista,

including a 64-bit version for AMD64 / Intel 64 processors that retains 32-bit compatibility. All

Windows applications and components are 64-bit, although many also have their 32-bit versions

included for compatibility with plugins.[2]

2009: Microsoft's Windows 7, like Windows Vista, includes a full 64-bit version for

AMD64/Intel 64 processors and most new computers are loaded by default with a 64-bit version.

Apple's Mac OS X 10.6, "Snow Leopard" is shipped with a 64-bit kernel for AMD64 / Intel 64

processors, although only certain recent models of Apple computers will run this by default.

Most applications bundled with Mac OS X 10.6 are now also 64-bit.[2]

Architechture of INTEL IA-64 Processor:

The architechture of INTEL IA-64 consists of registers and instruction set.

Registers:

Inorder to enable fast throughput which is more of multiple, independent instructions, the IA-64

architecture includes a generous complement of registers, including 128 82-bit floating point

registers, and an equal number of 64-bit integer registers. In addition to this sheer number of

registers, IA-64 includes a rotation mechanism of registers that is controlled by the Register

Stack Engine. Rather than the typical spill/fill or window mechanisms used in other processors,

the Itanium processor can rotate in a set of new registers to accommodate for new function

parameters or temporaries. The register rotation mechanism that is combined with predication is

very effective in executing automatically unrolled loops. Various registers are as follows.[3]

16 integer 64-bit general-purpose registers (RAX, RBX, RCX, RDX, RBP, RSI, RDI, RSP, R8 -

R15)

8 80-bit floating-point registers (ST0 - ST7)

8 64-bit Multimedia Extensions registers (MM0 - MM7, they share space with the registers ST0 -

ST7)

16 128-bit SSE registers (XMM0 - XMM15)

64-bit RIP pointer and 64-bit flag register RFLAGS

Instruction set:

IA-64 provides instructions for multimedia operations and floating point operations. Where as a

typical VLIW that will assign sub-instructions from each long instruction word to a particular

fixed functional unit, the Itanium supports several bundle mappings inorder to allow for more

instruction mixing possibilities and to provide a balance between serial and parallel execution

modes.[3]

There was room left in the initial bundle encodings for adding more mappings in future versions

of IA-64. In addition to that Itanium also has individually settable predicate registers to issue a

kind of runtime-determined "cancel this command" directive to the respective instruction. This is

sometimes more efficient than branching.[3]

Fig:4Block diagram of the Intel IA-64 Itanium processor[4]

The expected clock frequency for Itanium in the products to be shipped this year will probably

be around 800 MHz. Figure 4 shows a large amount of functional units that must be kept busy.

This is done by large instruction words of 128 bits that contain 3 41-bit instructions and a 5-bit

template that aids in steering and decoding the instructions. This is an idea that is inherited from

the Very Large Instruction Word machines that have been on the market for some time about ten

years ago. The two load/store units fetch two instruction words per cycle so six instructions per

cycle are dispatched. The Itanium has also in common with these systems that the scheduling of

instructions, unlike in RISC processors, is not done dynamically at run time but rather by the

compiler. The VLIW-like operation is enhanced with predicated execution which makes it

possible to execute instructions in parallel that normally would have to wait for the result of a

branch test. Intel calls this refreshed VLIW mode of operation EPIC, Explicit Parallel Instruction

Computing.[4]

Load instructions can be moved and the loaded variable can be used before a branch or a store by

replacing this piece of code by a test on the place is originally came from to see whether the

operations have been valid. To keep this track of the advanced loads an Advanced Load Address

Table records them. When checked it is made about the validness of an operation depending on

the advanced load, the ALAT is searched and when no entry is present the operation chain

leading to the check is invalidated and the appropriate fix-up code is executed. Note that this is

code that is generated at compile time so no control speculation hardware is needed for this kind

of speculative execution.[4]

This would become exceedingly complex for the many functional units.

As can be seen from Fig:4 there are four floating-point units capable of performing Fused

Multiply Accumulate (FMAC) operations. Two of these work at the full 82-bit precision which

is the internal standard on Itanium processors, while the other two can only be used for 32-bit

precision operations. When working in the customary 64-bit precision the Itanium has a

theoretical peak performance of 3.2 Gflop/s at a clock frequency of 800 MHz. Using 32-bit

floating arithmetic, the peak is doubled. In addition to the floating-point units there are 4 integer

units for integer arithmetic and other integer or character manipulations and four MMX units to

accommodate instructions for multi-media operations, an inheritance from the Intel Pentium

processor family. For compatibility with this Pentium family a special IA-32 decode and control

units are present in the Pentium processor family inorder to maintain perfect compatibility.

The register files for integers and floating-point numbers is large: 128. However, only the first 32

entries of these registers are fixed while entries 33--128 are implemented as a register stack. The

primary data and instruction caches are 4-way set associative and rather small: 16 KB each. This

reflects the long development time of the Itanium. At the design time of the chip 16 KB was

considered to be large. Just as that L2 cache of 96 KB now considered small in contrast to the L3

cache of 4 MB. [4]

The introduction of the Itanium has been deferred time and again but it will be available from the

second quarter of 2001 on in reasonable quantities. Its successor with the code name McKinley

will be built along the same principles but with a clock frequency of > 1 GHz and larger caches.

The definitive design of the McKinley chip which is also called as tape-out has been completed

and it is expected to be available in the first half of 2002 and so replace the Itanium processor

quite quickly.[4]

The need for a 64-bit architecture is determined by applications that need a large address space.

First of all, these are high-performance servers, data managers, CAD and, of course, games.

These applications will get significant benefits from the 64-bit address space and extended

number of registers. Few registers available in the obsolete x86 architecture limit performance in

computational tasks. The increased number of registers provides sufficient performance for many

applications.[2]

IA-64 is a 64-bit microprocessor architecture developed by Intel and Hewlett Packard companies

jointly. It is implemented in Itanium and Itanium 2 microprocessors. To learn more about the

architecture IA-64, see the Wikipedia entry: "Itanium". [2]

The Itanium architecture is supported by most server vendors: Bull, Fujitsu, Fujitsu Siemens

Computers, Hitachi, HP, NEC, SGI and Unisys. These manufacturers joined Intel and many

software developers to create Itanium Solutions Alliance with the purpose of promoting the

architecture and speeding up the software porting rate.[2]

1.ZX1 CEC

2.1 or 2 Intel® Itanium 2® CPUs (Fanwood)

3.Front Panel

4.2 Hot-swap U320 Drives (internal RAID support with optional RAID card) 5.Slimline Optical

Drive (optional)

6.System Power Supply Unit

7.2 PCI-X Slots

8.8 DIMM slots 1-GB to 16-GB with chip sparing

9.Optional Management Processor Card

Conclusion:

Although other 64-bit architectures have existed for a long time, most (Alpha, PA-RISC) have

faded from the marketplace. Itanium's remaining competition for the high-end of the 64-bit

server market (servers with 8 or more processors designed for enterprise-class computing

environments) appear to be IBM's POWER architecture, and Sun's UltraSparc architecture.[3]

At the low end of the 64-bit market (primarily 4-way and smaller servers), Itanium servers

compete with AMD's Opteron servers based on IA-32/AMD64 architecture and with Intel's own

Xeon servers, based on IA-32/EM64T architecture.[3]

References:

[1] http://whatis.techtarget.com/definition/0,,sid9_gci214614,00.html

[2] http://software.intel.com/en-us/articles/all-about-64-bits/

[3] http://kiwitobes.com/wiki/IA-64.html

[4] http://www.phys.uu.nl/~steen/web01/itanium.html

[5] http://www.google.co.uk/images?hl=en&q=intel%20ia%2064%20isa

%20processor&um=1&ie=UTF-8&source=og&sa=N&tab=wi&biw=1280&bih=656