integrating hardware experiences into a computer architecture core course

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Hardware Hardware Experiences into a Experiences into a Computer Computer Architecture Core Architecture Core Course Course Fred Martin Fred Martin Computer Science Computer Science University of Massachusetts University of Massachusetts Lowell Lowell

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Integrating Hardware Experiences into a Computer Architecture Core Course. Fred Martin Computer Science University of Massachusetts Lowell. Motivations. Simulation is important Simulation lets you build more complex designs in limited time, but simulation-only is not fun - PowerPoint PPT Presentation

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Page 1: Integrating Hardware Experiences into a Computer Architecture Core Course

Integrating Hardware Integrating Hardware Experiences into a Experiences into a

Computer Architecture Computer Architecture Core CourseCore Course

Fred MartinFred Martin

Computer ScienceComputer Science

University of Massachusetts LowellUniversity of Massachusetts Lowell

Page 2: Integrating Hardware Experiences into a Computer Architecture Core Course

MotivationsMotivations

Simulation is importantSimulation is important Simulation lets you build more complex Simulation lets you build more complex

designs in limited time, butdesigns in limited time, but simulation-only is not funsimulation-only is not fun interesting problems are at the edgesinteresting problems are at the edges

Understanding low-level provides basis for Understanding low-level provides basis for understanding higher abstractionsunderstanding higher abstractions

Page 3: Integrating Hardware Experiences into a Computer Architecture Core Course

More MotivationsMore Motivations

I like hardwareI like hardware Hardware is funHardware is fun Hardware plus software is really funHardware plus software is really fun Everyone should get to play with hardware Everyone should get to play with hardware

at least onceat least once I need students who can do hardwareI need students who can do hardware

Page 4: Integrating Hardware Experiences into a Computer Architecture Core Course

ContextContext

UML-CS dept has history UML-CS dept has history of doing hardwareof doing hardware

UML has an ECE dept, UML has an ECE dept, but we’re separatebut we’re separate

CS has 3-semester Logic CS has 3-semester Logic Design, Org, Arch Design, Org, Arch sequencesequence

When I joined dept in When I joined dept in 2002 there was no core 2002 there was no core hardware experience for hardware experience for majorsmajors

Page 5: Integrating Hardware Experiences into a Computer Architecture Core Course

ConstraintsConstraints

No dedicated lab spaceNo dedicated lab space Can not add lab units to courseCan not add lab units to course Some money but not lots ($50/kit x 35 Some money but not lots ($50/kit x 35

students)students) Can’t extract lab-kit money from studentsCan’t extract lab-kit money from students

Page 6: Integrating Hardware Experiences into a Computer Architecture Core Course

SolutionSolution

Nearly all students have computers; let’s Nearly all students have computers; let’s use themuse them

Can also use our computer labsCan also use our computer labs Give them everything they need to build Give them everything they need to build

(and hopefully debug) logic + embedded (and hopefully debug) logic + embedded CPU designsCPU designs

Answer: A take-home lab kit!Answer: A take-home lab kit!

Page 7: Integrating Hardware Experiences into a Computer Architecture Core Course

Custom “UML 305DEV” BoardCustom “UML 305DEV” Board

+5v supply

serial outserial in

8 LED inputs

8 switch ins

piezo

logic probe

gnd

Parts +Board:

$25

RS-232 to TTL level shifter

Page 8: Integrating Hardware Experiences into a Computer Architecture Core Course

Rest of the KitRest of the Kit

Page 9: Integrating Hardware Experiences into a Computer Architecture Core Course

Course DesignCourse DesignWeekWeek TopicsTopics AssignmentsAssignments

1–21–2 Digital logic, 74xxDigital logic, 74xx Mystery chipsMystery chips

2–32–3 State machinesState machines Make robot follow lineMake robot follow line

44 ISA of 68HC11 CPUISA of 68HC11 CPU Boot your HC11Boot your HC11

55 Timing & cycle countTiming & cycle count Make particular beepsMake particular beeps

66 Mem mapped I/OMem mapped I/O Address decodingAddress decoding

7, 87, 8 x86 ISAx86 ISA ““Bomblab”Bomblab”

9, 109, 10 6-state execution6-state execution ““Archlab A + B”Archlab A + B”

11, 1211, 12 PipeliningPipelining ““Archlab C”Archlab C”

13, 1413, 14 Cache memoryCache memory ““Perflab”Perflab”

hardwarehardware simulationsimulation real SWreal SW

Page 10: Integrating Hardware Experiences into a Computer Architecture Core Course

Digital Logic LabDigital Logic Lab

Build oscillator, counter/divider, view Build oscillator, counter/divider, view signalssignals

Mystery chips: you are given one 14-pin Mystery chips: you are given one 14-pin and one 16-pin DIP. Figure out which and one 16-pin DIP. Figure out which member of the 74HCxx series it is!member of the 74HCxx series it is!

A review of digital logic topics, but with A review of digital logic topics, but with more emphasis on understanding signals, more emphasis on understanding signals, including high impedance state. including high impedance state.

Page 11: Integrating Hardware Experiences into a Computer Architecture Core Course

State Machine LabState Machine Lab

Implement state Implement state machine with register, machine with register, logic equations, logic equations, minimizationminimization

Actually implement Actually implement with latch chipswith latch chips

Program a LEGO Program a LEGO robot to follow a line robot to follow a line with a 4-state, 1-with a 4-state, 1-sensor solutionsensor solution

Page 12: Integrating Hardware Experiences into a Computer Architecture Core Course

HC11 Boot LabHC11 Boot Lab

Install and configure tools on your PC Install and configure tools on your PC (Java source provided)(Java source provided)

Get HC11 to load 3-line program and light Get HC11 to load 3-line program and light an LEDan LED

Introduce addressing modes, memory Introduce addressing modes, memory map, bootloadermap, bootloader

Relatively little wiring neededRelatively little wiring needed

Page 13: Integrating Hardware Experiences into a Computer Architecture Core Course

Why 68HC11?Why 68HC11?

Simple, 8-bit processor with standard von Simple, 8-bit processor with standard von Neumann architectureNeumann architecture

16-bit external memory interface16-bit external memory interface Serial boot modeSerial boot mode Available in DIP packageAvailable in DIP package I know it wellI know it well

Page 14: Integrating Hardware Experiences into a Computer Architecture Core Course

HC11 Beep LabHC11 Beep Lab

Generate particular tones on HC11 output Generate particular tones on HC11 output pin; listen to them with piezopin; listen to them with piezo

Doubly-nested delay loopsDoubly-nested delay loops Many levels of time: usec instruction clock, Many levels of time: usec instruction clock,

millisec half-wave delay, audio frequenciesmillisec half-wave delay, audio frequencies Introduced scopes when later had a labIntroduced scopes when later had a lab Timing stuff is particularly valuable and Timing stuff is particularly valuable and

new to studentsnew to students

Page 15: Integrating Hardware Experiences into a Computer Architecture Core Course

HC11 Address DecodingHC11 Address Decoding

Build combo logic to decode 4 bits of addr Build combo logic to decode 4 bits of addr and allow HC11 to write to a latchand allow HC11 to write to a latch

Test design by running provided code and Test design by running provided code and seeing bit flash pattern on latch outputsseeing bit flash pattern on latch outputs

Also do paper design of RAM addressingAlso do paper design of RAM addressing Advanced for most students: hard to Advanced for most students: hard to

debug, possible for wrong designs to workdebug, possible for wrong designs to work

Page 16: Integrating Hardware Experiences into a Computer Architecture Core Course

Rest of Course: CS/APPRest of Course: CS/APP

Switched text to Bryant/O’Hallaron’s Switched text to Bryant/O’Hallaron’s Computer Systems: A Programmer’s Computer Systems: A Programmer’s PerspectivePerspective (2003) (2003)

ORG: by decompiling Linux executablesORG: by decompiling Linux executables—“Binary Bomb Lab”—“Binary Bomb Lab”

ARCH: based on “Y86” pedagogical ARCH: based on “Y86” pedagogical processor simulatorprocessor simulator

Cache treatment with “Perflab”—improve Cache treatment with “Perflab”—improve stride in 2D image processing appstride in 2D image processing app

Page 17: Integrating Hardware Experiences into a Computer Architecture Core Course

Discussion & ConclusionsDiscussion & Conclusions

Review/revisiting with a fresh perspective Review/revisiting with a fresh perspective is goodis good

Basic design (take-home kits + labs Basic design (take-home kits + labs themselves) is soundthemselves) is sound

Labs are fairly modular and could be Labs are fairly modular and could be adopted by othersadopted by others

Later revs of class left out Logic Lab Later revs of class left out Logic Lab (made room for Perf Lab)(made room for Perf Lab)

Page 18: Integrating Hardware Experiences into a Computer Architecture Core Course

More DiscussionMore Discussion

Some students like it a lot; others are Some students like it a lot; others are annoyedannoyed

I repeatedly refer back to HW labs in core I repeatedly refer back to HW labs in core arch materialarch material

Would love to do arch material with FPGA Would love to do arch material with FPGA implementationsimplementations

Best measure of success: students Best measure of success: students recruited to my research lab, and those recruited to my research lab, and those graduated in HW-oriented industry jobsgraduated in HW-oriented industry jobs

Page 19: Integrating Hardware Experiences into a Computer Architecture Core Course

Final PitchFinal Pitch

Have successfully handed off course to dept Have successfully handed off course to dept colleague colleague

I am happy to give away all course material for I am happy to give away all course material for academic use, including:academic use, including: PCB artwork for “305DEV” boardPCB artwork for “305DEV” board Parts listsParts lists Java-based HC11 toolsJava-based HC11 tools LabsLabs ExamsExams

Please contact me if you are interested! Please contact me if you are interested! [email protected]@cs.uml.edu