input / output modules are the third

8/14/2019 Input / Output Modules Are the Third

1/9

1

EE 4504 Section 4 1

EE 4504

Computer Organization

Section 4

Input / Output

EE 4504 Section 4 2

Overview

Input / Output modules are the third

critical element of the computer system

(others are the CPU and the memory)

All computer systems must have efficient

means to receive input and deliver output

Failure to address I/O concerns has doomedmany otherwise good systems

We will look at

I/O modules and their interface to the rest of

the system

I/O mechanisms

Example interfaces

Reading: Text, Chapter 6


2/9

2

EE 4504 Section 4 3

I/O Modules

External devices are not generally

connected directly into the bus structure of

the computer

Wide variety of devices require different logic

interfaces -- impractical to expect CPU to

know how to control each device

Mismatch of data rates

Different data representations

The I/O module

Provides a standard interface to the CPU and

the bus

Tailored to specific I/O device and its interface

requirements

Relieves the CPU of the management of the I/O

devices

Interface consists of

Control

Status and

Data signals

EE 4504 Section 4 4

Figure 6.3 I/O Module block diagram


3/9

3

EE 4504 Section 4 5

Programmed I/O

I/O operation in which CPU issues the I/O

command to the I/O module

CPU is in direct control of the operation

CPU waits until the I/O operation is completed

before it can perform other tasks

Completion indicated by a change in themodule status bits

CPU must periodically poll the module to check

its status

As a result of the speed difference between

a CPU and the peripheral devices (orders

of magnitude), programmed I/O wastes an

enormous amount of CPU processing

power

Very inefficient

CPU slowed to the speed of the peripheral

EE 4504 Section 4 6

Advantages

Simple to implement

Requires very little special software or

hardware

Figure 6.4a Programmed I/O operation


4/9

4

EE 4504 Section 4 7

I/O addressing

Isolated (standard) I/O

Address space of the I/O modules is

isolated from the memory address space

Separate instructions in the instruction set

are used to perform I/O

Typical control lines include the read/write

lines plus an IO/M line to switch address

reference between memory space and I/O

space

Memory mapped I/O

I/O devices are integrated into the normal

memory address space

All of the memory accessing instructions

can be used to access the I/O peripherals

Cost is the loss of real memory

addressesNot a big problem today with the huge

address spaces in current systems

EE 4504 Section 4 8

Interrupt-Driven I/O

To reduce the time spent on I/O operations,

the CPU can use an interrupt-driven

approach

CPU issues I/O command to the module

CPU continues with its other tasks while the

module performs its task

Module signals the CPU when the I/O operation

is finished (the interrupt)

CPU responds to the interrupt by executing an

interrupt service routine and then continues on

with its primary task

CPU recognizes and responds to interrupts

at the end of an instruction execution cycle

Interrupt technique is used to support a

wide variety of devices


5/9

5

EE 4504 Section 4 9

Figure 6.4b Interrupt-driven I/O

EE 4504 Section 4 10

Figure 6.6 CPUs response to an interrupt


6/9

6


Design issues -- with multiple modules and

thus multiple interrupts

How does the CPU determine which device

caused the interrupt?

If multiple interrupts occur at the same time,

which is processed first?

Interrupt determination Provide multiple interrupt signal lines for a

system

Practical only for small numbers of

interrupts

Use 1 interrupt for more than 1 device

Must perform some sort of device polling to

determine which requested service

Requesting device can place an ID on the

bus -- vectored interrupts

Bus arbitration and vectored interruptsDetermination scheme prioritizes multiple

interrupts


Intel 8259 Interrupt Controller


7/9

7


Direct Memory Access

Both programmed and interrupt driven I/O

require the continued involvement of the

CPU in ongoing I/O operations

Direct memory accessing takes the CPU

out of the task except for initialization of

the operationLarge amounts of data can be transferred

between memory and the peripheral w/o

severely impacting CPU performance

CPU initializes DMA module

Read or write operation defined

I/O device involved

Starting address of memory block

Number of words to be transferred

CPU then continues with other work


Figure 6.4c Direct memory accessing I/O


8/9

8


DMA operates by stealing bus cycles

from the CPU

In practice, it uses the bus when the CPU is not

using it -- no impact on the CPU performance

Accesses memory to retrieve a data word

Forwards the word to the I/O peripheral

Figure 6.13 DMA configurationsEE 4504 Section 4 16

External Interface

The external interface, made with the I/O

module, must be tailored to the nature and

operation of the peripheral

Parallel vs. serial data transfers

Data format conversions

Transfer rates Number of devices supported

Examples

RS-232 serial ports

Game ports

High speed I/O buses

Support external mass storage devices and

multimedia devices


9/9

9


Small Computer System Interface (SCSI)

Introduced by Apple in 1984

Used to interface a wide variety of high speed

devices to the computer system

While called a bus it is really a mechanism to

daisy chain devices together

SCSI-1

Used 8-bit data bus width

5 MHz clock -- transfer rate of 5 MB/sec

Supported up to 7 devices (compare to the 2

of a typical IDE configuration)

SCSI-2

Current standard

Expands the bus width to 16 or 32 bits

Clock rate of 10 MHz

Supports wide variety of device types,

making I/O software in the host simplier


P1394 High Performance Serial Bus

High speed, low cost serial link

Gaining support in consumer electronics

products as well as computer systems

Deliberately move away from parallel

connections with associated high cable and

connector costs

Provide high speed serial link (25-400 Mbps)

that is able to connect to many devices

Daisy chain up to 63 devices together on 1 bus,

interconnect up to 1022 buses together through

bridging techniques

Communication is based on a 3-layer protocol

Physical layer

Link layer

Transaction layer

input / output modules are the third

Documents