ina 102
DESCRIPTION
ampli de instrumentacionTRANSCRIPT
-
INA102
FEATURESl LOW QUIESCENT CURRENT: 750A maxl INTERNAL GAINS: 1, 10, 100, 1000l LOW GAIN DRIFT: 5ppm/C maxl HIGH CMR: 90dB minl LOW OFFSET VOLTAGE DRIFT:
2V/C maxl LOW OFFSET VOLTAGE: 100V maxl LOW NONLINEARITY: 0.01% maxl HIGH INPUT IMPEDANCE: 1010
APPLICATIONSl AMPLIFICATION OF SIGNALS FROM
SOURCES SUCH AS:Strain Gages (Weigh Scale Applications)ThermocouplesBridge Transducers
l REMOTE TRANSDUCER AMPLIFIERl LOW-LEVEL SIGNAL AMPLIFIERl MEDICAL INSTRUMENTATIONl MULTICHANNEL SYSTEMSl BATTERY POWERED EQUIPMENT
DESCRIPTIONThe INA102 is a high-accuracy monolithic instrumen-tation amplifier designed for signal conditioningapplications where low quiescent power is desired.On-chip thin-film resistors provide excellent tempera-ture and stability performance. State-of-the-art laser-trimming technology insures high gain accuracy andcommon-mode rejection while avoiding expensiveexternal components. These features make the INA102ideally suited for battery-powered and high-volumeapplications.The INA102 is also convenient to use. A gain of 1, 10,100, or 1000 may be selected by simply strapping theappropriate pins together. A gain drift of 5ppm/C inlow gains can then be achieved without externaladjustment. When higher-than-specified CMR isrequired, CMR can be trimmed using the pins pro-vided. In addition, balanced filtering can be accom-plished in the output stage.
International Airport Industrial Park Mailing Address: PO Box 11400 Tucson, AZ 85734 Street Address: 6730 S. Tucson Blvd. Tucson, AZ 85706
Tel: (520) 746-1111 Twx: 910-952-1111 Cable: BBRCORP Telex: 066-6491 FAX: (520) 889-1510 Immediate Product Info: (800) 548-6132
Low PowerINSTRUMENTATION AMPLIFIER
ABRIDGED DATA SHEETFor Complete Data Sheet
Call Fax Line 1-800-548-6133Request Document Number 10523
A1
A2
A3
14
2
8
4.44k
404
40.04
5pF
1 16
13
11
5pF
20k20k20k
7
6
15
10
3
4
5
20k20k20k
5pF5pF
12 9
V+ V
1985 Burr-Brown Corporation PDS-523G Printed in U.S.A. October, 1993
SBOS137
-
SPECIFICATIONSELECTRICALAt TA = +25C with 15VDC power supply and in circuit of Figure 2, unless otherwise noted.
INA102AG INA102CG INA102KP/INA102AUPARAMETER CONDITIONS MIN TYP MAX MIN TYP MAX MIN TYP MAX UNITSGAINRange of Gain 1 1000 * * * * V/VGain Equation, External, 20% G = 1 + (40k/RG)(1) * * V/VError, DC: G = 1 TA = +25C 0.1 0.05 0.15 %
G = 10 TA = +25C 0.1 0.05 0.35 %G = 100 TA = +25C 0.25 0.15 0.4 %G = 1000 TA = +25C 0.75 0.5 0.9 %G = 1 TA = TMIN to TMAX 0.16 0.08 0.21 %G = 10 TA = TMIN to TMAX 0.19 0.11 0.44 %G = 100 TA = TMIN to TMAX 0.37 0.21 0.52 %G = 1000 TA = TMIN to TMAX 0.93 0.62 1.08 %
Gain Temp. CoefficientG = 1 10 5 * ppm/CG = 10 15 10 * ppm/CG = 100 20 15 * ppm/CG = 1000 30 20 * ppm/C
Nonlinearity, DCG = 1 TA = +25C 0.03 0.01 * % of FSG = 10 TA = +25C 0.03 0.01 * % of FSG = 100 TA = +25C 0.05 0.02 * % of FSG = 1000 TA = +25C 0.1 0.05 * % of FSG = 1 TA = TMIN to TMAX 0.045 0.015 * % of FSG = 10 TA = TMIN to TMAX 0.045 0.015 * % of FSG = 100 TA = TMIN to TMAX 0.075 0.03 * % of FSG = 1000 TA = TMIN to TMAX 0.15 0.1 * % of FS
RATED OUTPUT
Voltage RL = 10k (|VCC| 2.5) * * VCurrent 1 * * mAShort Circuit Current(2) 2 * * mAOutput Impedance, G = 1000 0.1 * *
INPUT
OFFSET VOLTAGEInitial Offset(3) TA = +25C 300 300/G 100 200/G * V
INA102AU 500 300/G Vvs Temperature 5 10/G 2 5/G * V/Cvs Supply 40 50/G 10 20/G * V/V
vs Time (20 + 30/G) * * V/moBIAS CURRENTInitial Bias Current
(Each Input) TA = TMIN to TMAX 25 50 6 30 * * nAvs Temperature 0.1 * * nA/Cvs Supply 0.1 * * nA/V
Initial Offset Current TA = TMIN to TMAX 2.5 15 2.5 10 * * nAvs Temperature 0.1 * * nA/C
IMPEDANCEDifferential 1010 || 2 * * || pFCommon-Mode 1010 || 2 * * || pFVOLTAGE RANGERange, Linear Response TA = TMIN to TMAX (|VCC| 4.5) * * VCMR With 1k Source Imbalance
G = 1 DC to 60Hz 80 94 90 * 75 * dBG = 10 DC to 60Hz 80 100 90 * * * dBG = 10 to 1000 DC to 60Hz 80 100 90 * * * dB
NOISEInput Voltage Noise
fB = 0.01Hz to 10Hz 1 * * Vp-pDensity, G = 1000: fO = 10Hz 30 * * nV/Hz
fO = 100Hz 25 * * nV/HzfO = 1kHz 25 * * nV/Hz
Input Current NoisefB = 0.01Hz to 10Hz 25 * * pAp-pDensity: fO = 10Hz 0.3 * * pA/Hz
fO = 100Hz 0.2 * * pA/HzfO = 1kHz 0.15 * * pA/Hz
-
ORDERING INFORMATION
PRODUCT PACKAGE TEMPERATURE RANGE
INA102AG 16-Pin Ceramic DIP 25C to +85CINA102CG 16-Pin Ceramic DIP 25C to +85CINA102KP 16-Pin Plastic DIP 0C to +70CINA102AU 16-Pin Plastic SOIC 25C to +85C
ABSOLUTE MAXIMUM RATINGSSupply ................................................................................................ 18VInput Voltage Range .......................................................................... VCCOperating Temperature Range ......................................... 25C to +85CStorage Temperature Range: Ceramic .......................... 65C to +150C
Plastic, SOIC .................. 55C to +125CLead Temperature (soldering, 10s) ............................................... +300COutput Short Circuit Duration .................................Continuous to Ground
PIN CONFIGURATION
Offset Adjust10 Gain
100 Gain
1000 Gain
1000 Gain Sense
Gain Sense
Gain Set
CMR Trim
Offset Adjust+In
In
Filter
+V
Output
Common
V
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
CC
CC
x
x
x
x PACKAGE INFORMATIONPACKAGE DRAWING
PRODUCT PACKAGE NUMBER(1)
INA102AG 16-Pin Ceramic DIP 109INA102CG 16-Pin Ceramic DIP 109INA102KP 16-Pin Plastic DIP 180INA102AU 16-Pin SOIC 211
NOTE: (1) For detailed drawing and dimension table, please see end of datasheet, or Appendix C of Burr-Brown IC Data Book.
Top View DIP/SOIC
ELECTRICAL (CONT)INA102AG INA102CG INA102KP/INA102AU
PARAMETER CONDITIONS MIN TYP MAX MIN TYP MAX MIN TYP MAX UNITS
DYNAMIC RESPONSE
Small Signal,3dB Flatness VOUT = 0.1Vrms
G = 1 300 * * kHzG = 10 30 * * kHzG = 100 3 * * kHzG = 1000 0.3 * * kHz
Small Signal,1% Flatness VOUT = 0.1Vrms
G = 1 30 * * kHzG = 10 3 * * kHzG = 100 0.3 * * kHzG = 1000 0.03 * * kHz
Full Power, G = 1 to 100 VOUT = 10V, RL = 10k 1.7 2.5 * * * * kHzSlew Rate, G = 1 to 100 VOUT = 10V, RL = 10k 0.1 0.15 * * * * V/sSettling Time RL = 10k, CL = 100pF0.1%: G = 1 10V Step 50 * * s
G = 100 360 * * sG = 1000 3300 * * s
0.01%: G = 1 10V Step 60 * * sG = 100 500 * * sG = 1000 4500 * * s
POWER SUPPLY
Rated Voltage 15 * * VVoltage Range 3.5 18 * * * * VQuiescent Current VO = 0V,
TA = TMIN to TMAX 500 750 * * * * A
TEMPERATURE RANGE
Specification 25 +85 * * 0 +70 CINA102AU 25 +85 C
Operation RL > 50k(2) 25 +85 * * 25 +85 CStorage 65 +150 * * 55 +125 C
*Specification same as for INA102AG.NOTES: (1) The internal gain set resistors have an absolute tolerance of 20%; however, their tracking is 50ppm/C. RG will add to the gain error if gains other than1, 10, 100, or 1000 are set externally. (2) At high temperature, output drive current is limited. An external buffer can be used if required. (3) Adjustable to zero.
-
WARM-UP DRIFT vs TIME50
40
30
20
10
0
Chan
ge in
Inpu
t Offs
et V
olta
ge (m
V)
0 1 2 3 5
Time (ms)4
GAIN vs FREQUENCY
Gai
n (dB
)
80
60
40
20
0
20
Frequency (Hz)10 1M100 1k 10k 100k
G = 1000
G = 100
G = 10
G = 1 1% Error
VOUT = 0.1Vrms
PAD FUNCTION1 Offset Adjust2 X10 Gain3 X100 Gain4 X1000 Gain5 X1000 Gain Sense6 Gain Sense7 Gain Set8 CMR Trim9 VCC
PAD FUNCTION10* Common11 Output12 +VCC13 Filter14 In15 +In16 Offset Adjust17 (A1 Output)18 (A2 Output)
* Glass covers upper one-third of this pad.Substrate Bias: Electrically connected to V supply.NC: No Connection.
MECHANICAL INFORMATIONMILS (0.001") MILLIMETERS
Die Size 142 x 104 5 3.61 x 2.64 0.13Die Thickness 20 3 0.51 0.08Min. Pad Size 4 x 4 0.10 x 0.10Backing GoldINA102 DIE TOPOGRAPHY
TYPICAL PERFORMANCE CURVESAt +25C and in circuit of Figure 2 unless otherwise noted.
COMMON-MODE REJECTION vs SOURCE IMBALANCE120
100
80
60
40
Com
mon
-Mod
e Re
jectio
n (dB
)
100 1k 10k 100k 1M
Source Resistance Imbalance ( )
RIMB20Vp-p5Hz
10k
G = 10 to 1000
G = 1
COMMON-MODE REJECTION vs FREQUENCY
Com
mon
-Mod
e Re
jectio
n (dB
)
Frequency (Hz)1 100 1k
120
100
80
60
4010
V = 20Vp-pIN0 Source Imbalance
G = 1
G = 10
G = 100G = 1000
-
POWER SUPPLY REJECTION vs FREQUENCY125
100
75
50
25
0
Pow
er S
uppl
y Re
jectio
n (dB
)
1 10 100 1k 10k
Frequency (Hz)
Gain = 1000
Gain = 100
Gain = 10
Gain = 1
INPUT NOISE VOLTAGE vs FREQUENCY1000
100
101 10 100 1k 10k
Frequency (Hz)
Inpu
t Noi
se V
olta
ge (n
VH
z)
G = 1
G = 10
G = 100, G = 1000
PEAK-PEAK VOLTAGE NOISE vs GAIN1000
100
10
1Tota
l Inp
ut P
refe
rred
Noise
Vol
tage
(Vp
-p)
1 10 100 1000
Gain (V/V)
See Applications SectionR = 0S
R = 1MS
R = 100kS
Bandwidth = 1Hz to 1MHz
RS
500k500k
SETTLING TIME vs GAIN
Settl
ing
Tim
e (m
s)
Gain (V/V)1 10 100 1000
10
1
0.1
0.01
L
RC
L = 10k= 1000pF
0.01%
0.1%1%
STEP RESPONSE15
10
5
0
5
10
15
Out
put V
olta
ge (V
)
0 8
Time (ms)1 2 3 4 5 6 7
G = 1
G = 1000L
RC
L = 10k= 1000pF
QUIESCENT CURRENT vs SUPPLY1000
900800700600500400300200100
0
Quies
cent
Cur
rent
(A)
0 5 10 15 20
Supply Voltage (V)
VO = 10V(no load)
VO = 0
TYPICAL PERFORMANCE CURVES (CONT)At +25C and in circuit of Figure 2 unless otherwise noted.
-
GeCMCMRR
~
~
~ ~ ~
e2
e1
e0ZaZCM
eCM
ed /2
ed /2
Zd
ZCMea eb
Gain Set
DISCUSSION OFPERFORMANCEINSTRUMENTATION AMPLIFIERSInstrumentation amplifiers are differential-input closed-loopgain blocks whose committed circuit accurately amplifies thevoltage applied to their inputs. They respond mainly to thedifference between the two input signals and exhibit ex-tremely high input impedance, both differentially and com-mon-mode. The feedback networks of this instrumentationamplifier are included on the monolithic chip. No externalresistors are required for gains of 1, 10, 100, and 1000 in theINA102.An operational amplifier, on the other hand, is an open-loop,uncommitted device that requires external networks to closethe loop. While op amps can be used to achieve the samebasic function as instrumentation amplifiers, it is very diffi-cult to reach the same level of performance. Using op ampsoften leads to design tradeoffs when it is necessary to amplifylow-level signals in the presence of common-mode voltageswhile maintaining high-input impedances. Figure 1 shows asimplified model of an instrumentation amplifier that elimi-nates most of the problems associated with op amps.
eO = eA + eBeA = G(e2 e1) = GeD
G(e2 + e1) /2 GeCMCMRR CMRR
eB =
Gain set is pin-programmable for x1, x10, x100, x1000 in the INA102.
eO = GeD +
=
FIGURE 1. Model of an Instrumentation Amplifier.
THE INA102A simplified schematic of the INA102 is shown on the firstpage. A three-amplifier configuration is used to provide thedesirable characteristics of a premium performance instru-mentation amplifier. In addition, INA102 has features notnormally found in integrated circuit instrumentation amplifi-ers.
The input buffers (A1 and A2) incorporate high performance,low-drift amplifier circuitry. The amplifiers are connected inthe noninverting configuration to provide the high input
impedance (1010) desirable in instrumentation amplifierapplications. The offset voltage, and offset voltage versustemperature, are low due to the monolithic design, andimproved even further by state-of-the-art laser-trimmingtechniques.The output stage (A3) is connected in a unity-gain differentialamplifier configuration. A critical part of this stage is thematching of the four 20k resistors which provide thedifference function. These resistors must be initially wellmatched and the matching must be maintained over tempera-ture and time in order to retain good common-mode rejec-tion.All of the internal resistors are made of thin-film nichromeon the integrated circuit. The critical resistors are laser-trimmed to provide the desired high gain accuracy andcommon-mode rejection. Nichrome ensures long-term sta-bility and provides excellent TCR and TCR tracking. Thisprovides gain accuracy and common-mode rejection whenthe INA102 is operated over wide temperature ranges.
USING THE INA102Figure 2 shows the simplest configuration of the INA102.The output voltage is a function of the differential inputvoltage times the gain.A gain of 1, 10, 100, or 1000 is selected by programming pins2 through 7 (see Table I). Notice that for the gain of 1000, aspecial gain sense is provided to preserve accuracy. Al-though this is not always required, gain errors caused byexternal resistance in series with the low value 40.04internal gain set resistor are thus eliminated.
GAIN CONNECT PINS
1 6 to 710 2 to 6 and 7
100 3 to 6 and 71000 4 to 7 and separately 5 to 6
TABLE I. Pin-Programmable Gain Connections.
FIGURE 2. Basic Circuit Connection for the INA102.
INA102
~
+In
In
15
7
6
14
~
e2
VCC
9
11
Gain = 1
Output
1210
1FTantalum
1FTantalum
10k+VCC
-
Other gains between 1 and 10, 10 and 100, and 100 and 1000can also be obtained by connecting an external resistorbetween pin 6 and either pin 2, 3, or 4, respectively (seeFigure 6 for application).G = 1 + (40/RG) where RG is the total resistance between thetwo inverting inputs of the input op amps. At high gains,where the value of RG becomes small, additional resistance(i.e., relays or sockets) in the RG circuit will contribute to again error. Care should be taken to minimize this effect.
OPTIONAL OFFSET ADJUSTMENT PROCEDUREIt is sometimes desirable to null the input and/or output offsetto achieve higher accuracy. The quality of the potentiometerwill affect the results; therefore, choose one with goodtemperature and mechanical-resistance stability.The optional offset null capabilities are shown in Figure 3. R4adjustment affects only the input stage component of theoffset voltage. Note that the null condition will be disturbedwhen the gain is changed. Also, the input drift will beaffected by approximately 0.31V/C per 100V of inputoffset voltage that is trimmed. Therefore, care should betaken when considering use of the control for removal ofother sources of offset. Output offset correction can beaccomplished with A1, R1, R2, and R3, by applying a voltageto Common (pin 10) through a buffer amplifier. This bufferlimits the resistance in series with pin 10 to minimize CMRerror. Resistance above 0.1 will cause the common-moderejection to fall below 100dB. Be certain to keep this resist-ance low.
INA102
VCC
101M
OPA27
A1
1
16
R2 1k
R1100k
Output OffsetAdjust
+15VDC
15VDC
R3
15mV adjustment at the output.R4
100k
Input Offset Adjust
FIGURE 3. Optional Offset Nulling.
It is important to not exceed the input amplifiers dynamicrange. The amplified differential input signal and its associ-ated common-mode voltage should not cause the output ofA1 or A2 to exceed approximately 12V with 15V supplies,or nonlinear operation will result. To protect against mois-ture, especially in high gain, sealing compound may be used.Current injected into the offset pins should be minimized.
OPTIONAL FILTERINGThe INA102 has provisions for accomplishing filtering withone external capacitor between pins 11 and 13. This single-pole filter can be used to reduce noise outside the signalbandwidth, but with some degradation to AC CMR.When it is important to preserve CMR versus frequency(especially at 60Hz), two capacitors should be used. Theadditional capacitor is connected between pins 8 and 10. Thiswill maintain a balance of impedances in the output stage.Either of these capacitors could also be trimmed slightly, tomaximize CMR, if desired. Note that their ratio tracking willaffect CMR over temperature.
OPTIONAL COMMON-MODE REJECTION TRIMThe INA102 is laser-adjusted during manufacturing to assurehigh CMR. However, if desired, a small resistance can beadded in series with pin 10 to trim the CMR to an improvedlevel. Depending upon the nature of the internal imbalances,either positive or negative resistance value could be required.The circuit shown in Figure 4 acts as a bipolar potentiometerand allows easy adjustment of CMR.
FIGURE 4. Optional Circuit for Externally Trimming CMR.
TYPICAL APPLICATIONSMany applications of instrumentation amplifiers involve theamplification of low-level differential signals from bridgesand transducers such as strain gages, thermocouples, andRTDs. Some of the important parameters include common-mode rejection (differential cancellation of common-modeoffset and noise, see Figure 1), input impedance, offsetvoltage and drift, gain accuracy, linearity, and noise. TheINA102 accomplishes all of these with high precision atsurprisingly low quiescent current. However, in higher gains(>100), the bias current can cause a large offset error at theoutput. This can saturate the output unless the source imped-ance is separated, e.g., two 500k paths instead of one 1Munbalanced input. Figures 5 through 16 show some typicalapplications circuits.
1k
OPA177
1k
20CMRAdjust
1k
1kINA102
Procedure:1. Connect CMV to both inputs.2. Adjust potentiometer for near zero at the output.
10Common~
eCM
15
14
-
15
4
5
6
7
14
INA10211
ResistanceBridge
V
R R
R R
e1
e1
Shield
eIN
e2
+In
In10
+15V
15V
9
12
1000x 1
16
+15V
OptionalOffset Adjust100k
eOUT = 1000 (e2 e1)
INA102 replaces classical three-op-ampinstrumentation amplifier.
FIGURE 5. Amplification of a Differential Voltage from a Resistance Bridge.
eOUT = G (eIN) RY 4.4k, 404, or 40 in gains Note: Gain drift will be higher than thatG = 1 + (40k/[RG + RY]) of 10, 100, or 1000 respectively. specified with internal resistors only.
RG = (40k RY[G 1]) /(G 1)
15
3
7
6
14
INA10211
Shield
+In
In
10
+15V
15V
9
12
100x
eOUTTransduceror
AnalogSignal
TransformerNoise
(60Hz Hum)
Noise(60Hz Hum)
RG
FIGURE 6. Amplification of a Transformer-Coupled Analog Signal Using External Gain Set.
15
3
7
6
14
INA10211
+In
In
10
+15VDC
+15VDC9
12
10x
G = 100
OPA27
15VDC
+VOFFSETTING
500
1M
SpanAdjust
10k
VFC32/320/62
HCPL-2731
ISOSupply
+15VDC
15VDC
+15VDC +15VDC15VDC
Digital100
4990
15k
KThermocouple
1M
IN914
ColdJunction
Compensation15VDC
100kZero Adjust
+15VDC
15VDC15VDC
Opto-Coupler
Up-ScaleBurn-OutIndication
FIGURE 7. Isolated Thermocouple Amplifier with Cold Junction Compensation.
-
FIGURE 8. ECG Amplifier or Recorder Preamp for Biological Signals.
INA102
15376
14
+In
In
x10011
eOUT
G = 100
12
910
+9V
100k
100k
eIN
eOUT contains a midscaleDC voltage of +4.5V.
FIGURE 9. Single Supply Low Power Instrumentation Amplifier.
* Does not requireexternal isolationpower supply.
Note that x1000 gain sense has notbeen used to facilitate simple switching.
INA102
1523476
14
+In
In
x10
11
eOUT
1210
1M
eIN
9
+15
VDC
Inpu
t Com
mon
15
VDC
ISO1003650
or3656 *
IsolationBarrier
IsolationAmplifier
722IsolationPowerSupply
15VDC
x1 x100x1000
Bias CurrentReturn Resistor
+15
VDC
Out
put C
omm
on
15VD
C
FIGURE 10. Precision Isolated Instrumentation Amplifier.
15
4
5
6
7
14
INA10211
+In
In
10
+15VDC
15VDC
9
12
1000xG = 1000
eOUT = 1Vp-pto isolation amplifier.RL
RA
LA
eIN = 1mVp-p
-
* As shown channels 0 and 1 may be used for auto offset zeroing, and gain calibration respectively.
FIGURE 11. Multiple Channel Precision Instrumentation Amplifier with Programmable Gain.
FIGURE 12. 4mA to 20mA Bridge Transmitter Using Single Supply Instrumentation Amplifier.
INA102
10
139
11
15V 15V
PGA102 15
12
34
5eOUT
G = 1, 10, 100
+15V
16
x10 x100Gain Select
678
G = 112
76
+In
In
15
14
15V
+15V +15V
D
D
15V
+15V
D
D
10k
10k
eIN
Input Protection: D = FDH300 (Low Leakage)
FIGURE 13. Programmable-Gain Instrumentation Amplifier Using the INA102 and PGA102.
INA102
INA102
INA102
INA102
PGA100
IN7IN6IN5IN4IN3IN2IN1IN0
INA102
VREF*
eOUT
ControlLogic
ChannelSelect
GainSelect
CPCE
e2
e4
e6
e5
INA102e3
e1
INA102
15376
14
1512
435
XTR110
11314
109
2
G S
D
4mA to 20mA VLRLOPA27+6V
40k
60k
1211
+24V
300
910
+10VREF
40mV
G = 100
+2V to +10V
+24V
2N3055
40 40
20
16
4
I O(m
A)
0VIN (mV)
16
-
15
4
5
6
7
14
INA10211
10
+15V
15V
9
121000x
eOUT
eIN
Ground Resistance
V1
FIGURE 14. Ground Resistance Loop Eliminator (INA102 senses and amplifies V1 accurately).
Overall Gain = eOUT/eIN = 200
15V
INA102 11
eOUT
+15V
12
376
9
10
15
14
eIN
+In
In
x 100
15V
INA102 11
+15V
12
376
9
10
15
14
+In
In
x 100
FIGURE 15. Differential Input/Differential Output Amplifier (twice the gain of one INA).
-
CONTROL S1 S2 S3 S4 S5 MODE
1 Closed Closed Open Open Closed Signal Amplification0 Open Open Closed Closed Open Auto-Zeroing
15V
INA102 11
+15V
12
376
9
10
15
14
eIN
+In
In
x 100
OPA111or OPA121
1k
0.1F 1/2DG5043CJ
Reference10
DG5040CJ
16
8
6 eOUT
15V
15 13 14
+15V11
15 13 14
200sControl
1
4
11
16
9
5
1
S2
S4
S5
1/2DG5043CJ
S1
S33
All switches shown inLogic 0 switch state.
FIGURE 16. Auto-Zeroing Instrumentation Amplifier Circuit.
The information provided herein is believed to be reliable; however, BURR-BROWN assumes no responsibility for inaccuracies or omissions. BURR-BROWN assumesno responsibility for the use of this information, and all use of such information shall be entirely at the users own risk. Prices and specifications are subject to changewithout notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. BURR-BROWN does not authorize or warrantany BURR-BROWN product for use in life support devices and/or systems.
-
IMPORTANT NOTICE
Texas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinueany product or service without notice, and advise customers to obtain the latest version of relevant informationto verify, before placing orders, that information being relied on is current and complete. All products are soldsubject to the terms and conditions of sale supplied at the time of order acknowledgment, including thosepertaining to warranty, patent infringement, and limitation of liability.
TI warrants performance of its semiconductor products to the specifications applicable at the time of sale inaccordance with TIs standard warranty. Testing and other quality control techniques are utilized to the extentTI deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarilyperformed, except those mandated by government requirements.
Customers are responsible for their applications using TI components.
In order to minimize risks associated with the customers applications, adequate design and operatingsafeguards must be provided by the customer to minimize inherent or procedural hazards.
TI assumes no liability for applications assistance or customer product design. TI does not warrant or representthat any license, either express or implied, is granted under any patent right, copyright, mask work right, or otherintellectual property right of TI covering or relating to any combination, machine, or process in which suchsemiconductor products or services might be or are used. TIs publication of information regarding any thirdpartys products or services does not constitute TIs approval, warranty or endorsement thereof.
Copyright 2000, Texas Instruments Incorporated