implementation of single-phase photovoltaic systems for

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Implementation of Single-Phase Photovoltaic Systems for common ground type Transformer less Inverters 1 D.Venkateswarlu M.tech(power electronics)/ Dept. of EEE, Shree institute of technical education, Tirupathi A.P. India 2 M.Purushotham Assistant Professor / Dept.EEE, Shree institute of technical education, Tirupathi A.P. India Abstract This paper proposes a family of novel flying capacitor transformer less inverters for single-phase photovoltaic systems. Each of the new topologies proposed are based on a flying capacitor principle and requires only four power switches and/or diodes, one capacitor, and a small filter at the output stage. A simple unipolar sinusoidal pulse-width modulation technique is used to modulate the inverter to minimize the switching loss, output current ripple, and the filter requirements. In general, the main advantages of the new inverter topologies are: (1) The negative polarity of the PV is directly connected to the grid, and therefore, no leakage current; (2) reactive power compensation capability; and (3) the output ac voltage peak is equal to the input dc-voltage (unlike neutral- point-clamped and derivative topologies, which requires twice the magnitude of the peak ac-voltage). A complete description of the operating principle with modulation techniques, design guidelines, and comprehensive comparisons are presented to reveal the properties and limitations of each topology in detail using MATLAB/SIMULINK. KeywordsFlying capacitor, micro inverter, photovoltaic (PV) system, reverse blocking insulated- gate bipolar transistor (RB-IGBT) inverters, transformer less inverter, fuzzy logic controller. Introduction GRID-TIED inverters for photovoltaic (PV) systems, especially low-power single-phase systems (up to 5 kW), are developing quickly for both utility-scale and distributed power generation applications because of the declining costs of the PV panel, government incentives for PV energy, and progression in power hardware and semiconductor innovation [1]. Continued technological advancements and further cost reductions will expand these opportunities in both developed and developing countries where favorable solar conditions exist. In 2014,more than 178 GW of PV are installed globally, multiplying the installed capacity by a factor of 100 in only 14 years of development, which represents a new all-time record in the history of global PV deployment [2]. In PV applications, a transformer is often used to provide galvanic isolation and voltage ratio transformations. However, these conventional iron and copper-based transformers increase the weight/size and cost of the inverter while reducing the efficiency and power density. It is therefore desirable to avoid using transformers in the inverter; however, additional care must be taken to avoid safety hazards such as ground fault currents and leakage currents, e.g., via the parasitic capacitance between the PV panel and/or its frame and ground. Consequently, grid connected transformer less PV inverters must comply with strict safety standards [3]. Recently, there is a strong trend in the PV inverter technology to use transformer less topologies in order to obtain both higher efficiencies and very low ground leakage current. In addition, it also reduces the cost and weight when compared to their counterparts using a transformer. Various research works have been proposed recently to eliminate the leakage current using different techniques in a transformer less inverter [1], [4]–[6], e.g., decoupling the dc from ac side and/or clamping the common mode voltage (CMV) during the freewheeling period [7]–[23], or using common ground configurations [24]–[30]. The zero state decoupled topologies (H5 [7], HERIC [8], and H6 family [9]–[12]) and the zero state mid-point clamped topologies (oH5 [13] and HB-ZVR [14], and HBZBR- D [15]) are effective in eliminating the leakage current of the PV. However, they require a large number of active and passive components (more than six switching devices except H5), which increases complexity, cost, and size of the inverter. In addition, the higher number of switches in the current path during the active state increases the total on-state resistance RDS,on and hence, increases the conduction loss in the system, e.g., in H5, H6, oH5, and similar topologies proposed in [1], [4]–[6], and [16], where ≥ 3 devices are in series during the active state. The multilevel neutral-point-clamped (NPC) [17]–[19] inverter is also suitable for reducing the leakage current; however, the input voltage or dc-link voltage must be more than twice that of the H-bridge type inverters (H5, HERIC, oH5, etc.). A flying capacitor similar to the NPC multilevel converter is International Journal of Research Volume VIII, Issue I, January/2019 ISSN NO:2236-6124 Page No:172

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Page 1: Implementation of Single-Phase Photovoltaic Systems for

Implementation of Single-Phase Photovoltaic Systems for common

ground type Transformer less Inverters 1 D.Venkateswarlu

M.tech(power electronics)/ Dept. of EEE, Shree institute of technical education, Tirupathi A.P. India

2 M.Purushotham

Assistant Professor / Dept.EEE, Shree institute of

technical education, Tirupathi A.P. India

Abstract This paper proposes a family of novel flying capacitor transformer less inverters for single-phase photovoltaic systems. Each of the new topologies proposed are based on a flying capacitor principle and requires only four power switches and/or diodes, one capacitor, and a small filter at the output stage. A simple unipolar sinusoidal pulse-width modulation technique is used to modulate the inverter to minimize the switching loss, output current ripple, and the filter requirements. In general, the main advantages of the new inverter topologies are: (1) The negative polarity of the PV is directly connected to the grid, and therefore, no leakage current; (2) reactive power compensation capability; and (3) the output ac voltage peak is equal to the input dc-voltage (unlike neutral-point-clamped and derivative topologies, which requires twice the magnitude of the peak ac-voltage). A complete description of the operating principle with modulation techniques, design guidelines, and comprehensive comparisons are presented to reveal the properties and limitations of each topology in detail using MATLAB/SIMULINK.

Keywords— Flying capacitor, micro inverter, photovoltaic (PV) system, reverse blocking insulated-gate bipolar transistor (RB-IGBT) inverters, transformer less inverter, fuzzy logic controller.

Introduction

GRID-TIED inverters for photovoltaic (PV) systems, especially low-power single-phase systems (up to 5 kW), are developing quickly for both utility-scale and distributed power generation applications because of the declining costs of the PV panel, government incentives for PV energy, and progression in power hardware and semiconductor innovation [1]. Continued technological advancements and further cost reductions will expand these opportunities in both developed and developing countries where favorable solar conditions exist. In 2014,more than 178 GW of PV are installed globally, multiplying the installed capacity by a factor of 100 in only 14 years of development, which represents a new all-time record in the history of global PV deployment [2]. In PV

applications, a transformer is often used to provide galvanic isolation and voltage ratio transformations. However, these conventional iron and copper-based transformers increase the weight/size and cost of the inverter while reducing the efficiency and power density. It is therefore desirable to avoid using transformers in the inverter; however, additional care must be taken to avoid safety hazards such as ground fault currents and leakage currents, e.g., via the parasitic capacitance between the PV panel and/or its frame and ground. Consequently, grid connected transformer less PV inverters must comply with strict safety standards [3]. Recently, there is a strong trend in the PV inverter technology to use transformer less topologies in order to obtain both higher efficiencies and very low ground leakage current. In addition, it also reduces the cost and weight when compared to their counterparts using a transformer. Various research works have been proposed recently to eliminate the leakage current using different techniques in a transformer less inverter [1], [4]–[6], e.g., decoupling the dc from ac side and/or clamping the common mode voltage (CMV) during the freewheeling period [7]–[23], or using common ground configurations [24]–[30]. The zero state decoupled topologies (H5 [7], HERIC [8], and H6 family [9]–[12]) and the zero state mid-point clamped topologies (oH5 [13] and HB-ZVR [14], and HBZBR-D [15]) are effective in eliminating the leakage current of the PV. However, they require a large number of active and passive components (more than six switching devices except H5), which increases complexity, cost, and size of the inverter. In addition, the higher number of switches in the current path during the active state increases the total on-state resistance RDS,on and hence, increases the conduction loss in the system, e.g., in H5, H6, oH5, and similar topologies proposed in [1], [4]–[6], and [16], where ≥ 3 devices are in series during the active state. The multilevel neutral-point-clamped (NPC) [17]–[19] inverter is also suitable for reducing the leakage current; however, the input voltage or dc-link voltage must be more than twice that of the H-bridge type inverters (H5, HERIC, oH5, etc.). A flying capacitor similar to the NPC multilevel converter is

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also described in [20] and [21]; however, it suffers from a similar problem apart from a complex precharge control circuit with additional capacitors. A flying inductor also called “Karschny” is also proposed in [22], but this topology is not capable of delivering reactive power to the grid. In addition, it uses a large number of switching devices. Common-ground-type PV inverter can effectively reduce the leakage current of the PV system and has attracted a lot of interest from both academia and industry. A common ground transformer less inverter is proposed in [23].However, it requires five switches and a relatively large filter inductor (8 mH) to meet the power quality requirements. This is primarily due to a virtual dc bus, which is created by a capacitor, and it charges only during the positive power cycle. There is no path to charge the capacitor during the negative cycle, where it requires a sustaining voltage at the so-called virtual dc bus. This not only distorts the output voltage waveforms and thus requires a large virtual dc-bus capacitor and a filter inductor, but also unnecessarily increases the current stress in the switches. The charging process has been much improved in [24], where the capacitor charges during both the positive and negative cycles. However, it requires two additional diodes with a large filter inductor (5 mH). A common-ground-type three-switch three-state single-phase Z-source inverter (TSTS-ZSI) is introduced in [25] with higher voltage gain. Although higher voltage gain is obtained, the three inductors (L1, L2 , and L3 ) in the TSTS-ZSI make the circuit a bit bulky and heavy. In addition, a simple unipolar sinusoidal pulse-width modulation (SPWM) technique is used to modulate the inverter, which further minimizes the switching loss, output current ripple, and filter requirements. The paper is organized as follows: Section II describes the principle of the flying capacitor followed by the three main topologies resulted from the combination of different switching devices and the flying capacitor. Their operating modes are discussed in detail in Section III. A comprehensive comparison with design rules and components selection is presented in Section IV. Simulations and experimental results of each of the 1-kW inverter topologies are eventually provided in Section V for verification, and the paper is concluded in Section VI. II. PROPOSED TOPOLOGY AND PRINCIPLE OF OPERATION In this section, the generalized structure of the proposed topology is introduced and its operation is explained.

Proposed Structure : A) Principle of Operation: The common ground type transformer less inverter presented in this paper works on the principle of a flying capacitor. Fig. 1 illustrates the charging and discharging process of the capacitor to create a negative supply voltage for the inverter during the negative cycle. When the switch is in position 1, the flying capacitor CFC connects to the input voltage and charges up to the input voltage and, consequently, when the switch turns to position 2, the negative voltage with equal voltage magnitude as of the input voltage appear at the output side. The process is continuously repeated at a high switching frequency to maintain a constant voltage across the load, which when connected across x and y.

Fig. 1. Illustration of the charging and discharging of the flying capacitor (CFC) to create a negative bus voltage in the inverter during the negative cycle. B. Flying Capacitor Inverter Topologies: The above principle is integrated into the new inverter circuit using appropriate active switches such as MOSFET, IGBT, reverse blocking IGBT (RB-IGBT) etc. and/or diodes. Several inverter topologies are possible using various combinations of these switches and diodes with the flying capacitor CFC at different positions. However, only three main topologies are discussed in this paper, which require fewer active and passive components to improve efficiency, reliability, power density, and to reduce cost and weight of the system, whilst maintaining the system performance and safety requirements. These three circuits are described in detail with its operating principle and analysis as follows: Figure 2 (a) shows Type-I topology introduced with two switches in series during both positive (S1 and S3) and negative cycle (S2 and S4). In this topology, the switch S1 and diode D charge CFC, whilst S2 and S4 discharge it creating a negative polarity. The switch S3 creates a positive cycle, whereas the switch S2 creates a negative cycle. The inverter is modulated using a standard unipolar SPWM as shown in Fig. 2 (b) to reduce the overall loss, electromagnetic interference (EMI), and filter requirements. All switches in this topology experience uniform voltage stress and are equal to the input dc-link voltage.

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1)Type-I: Two switches in series during the positive cycle

Fig. 2. Type-I flying capacitor transformerless grid-connected single-phase inverter topology with two switches in series during positive cycle. 2) Type-II: Single switch in series during positive cycle The circuit schematic of the second topology is similar to the first as shown in Fig. 3 (a). However, only one switch (S3) carries the load current during the positive cycle (active state). The negative cycle remains the same as of the first topology, where S2 and S4 carry the load current. Similar to the first topology, the switch S3 creates a positive cycle, whereas S2 creates a negative power cycle by discharging CFC through S4. In every switching cycle, the switch S1 and diode D charge the flying capacitor CFC in both the positive and negative power cycle. The switches are modulated using a standard unipolar SPWM. All switches and diodes experience uniform voltage stress, i.e., equal to the input dc-link voltage except S3, which experiences two times the input dc-link voltage. 3) Type-III: H-bridge type (Siwakoti-H Inverter) Figure 4 (a) shows a unique combination of switches and a flying capacitor; completely eliminating the requirement of an extra diode as in the previous two topologies to form a topology similar to a conventional H-bridge. In this topology, only one switch carries the load current during both positive (S3) and negative (S2) cycles (active). The switch S3 creates a positive cycle, whereas the switch S2 creates

the negative cycle. Turning on switch S4, which also charges the flying capacitor through S1, creates the zero state during both the positive and negative cycle.

Fig. 3. Type-II flying capacitor transformer less grid-connected single-phase inverter topology with a single switch in series during the positive cycle. The inverter is modulated using a standard unipolar SPWM as shown in Fig. 4 (b), where S1 and S4 experience high frequency switching in both positive and negative cycles to charge CFC. Switches S1 and S4 experience bipolar voltage stress, which require switches with bipolar voltage blocking capability like RB-IGBT with voltage stress equal to the input voltage (±Vdc), and S2 and S4 are devices with unipolar voltage withstanding capability such as MOSFETs with a voltage stress of 2Vdc. The unique property of the circuit is that it can be realized in both common ground as well as common positive configurations. Figures 5 (a) and 5 (b) respectively illustrate the realization of the inverter in both common ground and common positive configurations using two RB-IGBTs and two MOSFETs. The reduction in the number of active and passive components and a simple modulation technique makes this topology very versatile and useful for applications, which require common bus bar configurations (positive or negative).

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Fig. 4. Type-III: H-bridge transformer less inverter (Siwakoti-H Inverter) (a) illustrating its configuration in both common positive and common ground configurations, and (b) unipolar SPWM modulation signal for the switches.

Fig. 5. Realization of the H-bridge grid-connected single-phase transformer less inverter using RB-IGBT and MOSFET: (a) common negative bus configuration, and (b) common positive bus configuration. III. OPERATING MODES OF THE PROPOSED TOPOLOGIES All three topologies has three modes of operation, i.e. positive active (P), negative active (N) and zero state (O). The zero state is common in both positive and negative cycle, e.g. in positive cycle, the switching sequence is POPO and in negative cycle, the switching sequence is NONO.

Fig. 6. Three operation states of the proposed Type-I transformer less inverter topology (Fig. 2(a)) (red dotted-line represents the active current path, blue dotted-line represents the reactive current path and violet dotted-line represents CFC charging current path). Fig. 6 to Fig. 9 shows the different switching states of each topologies and current paths (red dotted line represents the active current path, blue dotted-line represents the reactive power path and violet dotted-line represents CFC charging current path). A) Type-I: Two switches in series during the positive cycle Type-I inverter with two switches in series during the positive cycle has three operating modes as shown in Fig. 6 and is described in brief as follows:

i) Positive cycle (active): The switch S1 and diode D remains on during the whole positive cycle, which helps in precharging the capacitor CFC for the negative cycle. In addition, S2 remains off for the whole positive cycle to assist the charging of the capacitor. In this mode, the switch S3 switches at a higher switching frequency (gate signal modulated by a positive sinusoidal reference) to create a unipolar positive voltage at the filter (Fig. 6 (a)). ii) Negative cycle (active): The switch S3 is off and the switch S4 remains on for the whole negative cycle. In this mode, S2 switches at a higher switching frequency (gate signal modulated by negative sinusoidal reference) to create a unipolar negative voltage at the filter. The diode D goes off automatically when the switch S2 turns on, whilst the

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precharge capacitor CFC, supplies the voltage to the load (Fig. 6 (b)). iii) Positive cycle/Negative cycle (zero): Following the positive or negative active state, the switch S1 and S4 are on to create a zero voltage across the filter. This forms a bidirectional current path, i.e. S1 with antiparallel diode of S4 or S4 with antiparallel diode of S1. Equivalent circuit can be drawn as shown in Fig. 7. In this state, the flying capacitor charges through the diode D, which was reversed biased in the earlier positive and negative active states (Fig. 6 (c)). The capacitor is considered to be large enough to keep a constant voltage over the switching cycles ��� ≈ . So irrespective of the polarity of the power cycle, the voltage across the diode or before the filter inductor is �0 = ��� − ��� ≈ 0. The zero current flows through S4 and diode in positive zero cycle and VCF and S4 during the negative cycle. B. Type-II: Single switch in series during positive cycle The operating modes of this inverter are also similar to Type-I inverter topology as shown in Fig. 8 with three operating modes. These three operating modes repeat after each power cycle and create a unipolar positive and negative voltage before the filter, which is filtered out to get a pure sinusoidal voltage and current waveform at the output. These operating states are described in detail as follows: i) Positive cycle (active): In this state, the switch S3 switches at a high switching frequency to create a unipolar positive voltage before the filter (Fig. 8 (a)). Turning off S2 automatically turns diode D to forward biased, which charges the capacitor through the switch S1. This process helps in precharging the capacitor for the negative power cycle. ii) Negative cycle (active): The precharge capacitor acts as a virtual dc-bus during this state. The switch S2 switches at a high switching frequency to create a unipolar negative voltage before the filter using the precharge capacitor CFC. As S4 remains on for the whole negative cycle, turning the switch S2 on reverse biases the diode D and helps in avoiding short circuiting the capacitor (Fig. 8 (b)). iii) Positive cycle/Negative cycle (zero): Following the positive or negative active state, turning the switch S2 off automatically forward biases the diode, which charges the capacitor. At the same time, the switch S4 turns on to create a zero voltage across the filter (Fig. 8 (c)).

Fig. 8. Three operation states of the proposed Type-II transformer less inverter topology (Fig. 3(a)) (red dotted-line represents the active current path, blue dotted-line represents the reactive current path and violet dotted-line represents CFC charging current path). C. Type-III: H-bridge type Similar to the previous two new topologies, the third topology also has three modes of operation as shown in Fig. 9. This topology is similar to the conventional NPC T-type inverter, where it only uses four active switches; two of them with unipolar voltage capability and two with bipolar voltage capability. However, the dc-link voltage requirement of the proposed topology is only half of that required in NPC [18], ANPC [21], and Conergy, and their derivative topologies [6].

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Fig. 9. Three operation states of the proposed Type III H-bridge topology (Fig. 4(a)) (red dotted-line represents the active current path, blue dotted-line represents the reactive current path and violet dotted-line represents CFC charging current path). This reduces the front-end voltage boost requirement and associated circuits, which helps in improving the efficiency and size of the system. In addition, it also reduces the size and number of passive component (capacitor) requirements. The details of the operating states are described as follows: i) Positive cycle (active): The positive modulating signal is compared with a triangular waveform to create a correct switching pulse for the switch S3, which creates a unipolar positive voltage at the filter (Fig. 9 (a)). Switches S1 and S4 are off during this state, while S2 also remains off for the whole positive cycle. ii) Negative cycle (active): The negative modulating signal is compared with a triangular waveform to create the correct switching pulse for the switch S2. The flying capacitor, which charges in each zero state (both positive and negative cycle), acts as a virtual dc-bus for the inverter to create a unipolar negative voltage at the filter (Fig. 9 (b)). Switches S1 and S4 are off during this state, while S3 also remains off for the whole positive cycle.

iii) Positive cycle/Negative cycle (zero): Following the above positive and negative active state, switch S4 turns on to create zero state in the circuit. In the same state, switch S1 also turns on, which charges the capacitor through S4 (Fig. 9 (c)). This shows that the capacitor charges in every switching cycle regardless of the polarity of the power cycle. This helps in reducing the size of the capacitor with the switching frequency. IV .Fuzzy logic controller:

Fuzzy logic is a form of many-valued logic in which the truth values of variables may be any real number between 0 and 1. By contrast, in Boolean logic, the truth values of variables may only be 0 or 1. Fuzzy logic has been extended to handle the concept of partial truth, where the truth value may range between completely true and completely false. Furthermore, when linguistic variables are used, these degrees may be managed by specific functions.

Usually fuzzy logic control system is created from four major elements presented on Figure fuzzification

interface, fuzzy inference engine, fuzzy rule matrix and defuzzification interface. Each part along with

basic fuzzy logic operations will be described in more detail below.

Fig 10. Block diagram of fuzzy logic controller

The fuzzy logic analysis and control methods shown in Figure 10 can be described as:

1. Receiving one or large number of measurements or other assessment of conditions existing in some system that will be analyzed or controlled.

2. Processing all received inputs according to human based, fuzzy ”if-then” rules, which can be expressed in simple language words, and combined with traditional non-fuzzy processing.

3. Averaging and weighting the results from all the individual rules into one single output decision or signal which decides what to do or tells a controlled system what to do. The

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result output signal is a precise defuzzified value.

Fig 11 CHANGE IN ERROR

Fig 12 ERROR

Fig 13 OPTIMIZED ERROR

Fig. 11-Fig 13 Membership function Editor.

D.Rule Table

Basically a linguistic controller contains rules in the If-then format. Here used seven variables for one input, then totally 25 rules.

Change error/error

NB NS Z PS PB

NB NB NB NB NS ZO NS NB NB NS ZO PS Z NB NS ZO PS PB PS NS ZO PS PB PB PB ZO PS PB PB PB

Fig. 14 Rule Editor.

Rule editor The Rule Editor is for editing the list of rules that defines the behavior of the system. Rule base consist of If –then rules which tie the inputs with the outputs. Using if –then rules, stored in the rule base, convert fuzzy inputs to fuzzy output. Here we are using two parameters error and error rate, which is scaledNegativeSmall(NS),NegativeMedium(NM),NegativeBig(NB),PositiveSmall(PS),PositiveMedium(PM),PositiveBig(PB).Depending these variables we are creating or editing rule editor.

V. SIMULATION RESULTS

Type-I Topology

Fig 15 type1 input and output ac voltage and currents

Fig 16 type1 switching pulses

Fig 17 FFT analysis of vac type 1 with R load

Fig 18 FFT analysis with Iac type1 with R load

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Fig 19 type 1 ac voltage and switching pulses with RL load

Fig 20 type 1 input and output ac voltage and currents with RL load

Fig 21 FFT analysis of vac kind 1 with RL load

Fig 22 FFT analysis of Iac kind 1 with RL load.

Fig.15- FIG 22 Key simulation results of Type-I

topology showing the input and output ac voltage and

currents (in both resistive and inductive load) along

with switch voltage stress.

Type-II Topology

Fig 23 type 2 input and output ac voltage and currents

Fig 24 type 2 switching pulses

Fig 25 FFT analysis with vac type 2 with R load

Fig 26 FFT analysis with Iac type1 with R load Fig 23 -Fig 26 Type-II topology showing input and output voltages and currents along with switch voltage stress. Type-III Topology

Fig27 type3 input and output ac voltage and currents with R Load

Fig28 type 3 switching pulses with R Load

0 0.01 0.02 0.03 0.04 0.05 0.06 0.07 0.08 0.09 0.1

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Time (s)

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Fundamental (50Hz) = 340.3 , THD= 1.95%

Mag

(% o

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Fundamental (50Hz) = 340.2 , THD= 1.91%

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% of

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Fundamental (50Hz) = 5.788 , THD= 2.68%

Mag

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Fig 29 FFT analysis with Vac type3 with R load

Fig30 FFT analysis with Iac type3 with R load

Fig 31 type3 input and output ac voltage and currents with RL Load

Fig 32 FFT analysis with Vac type3 with RL load

Fig 33 FFT analysis with Iac type3 with RL load Fig 27- Fig 33 Type-3 with R load & RL load

Type 1, Type-2, Type-3 methods with fuzzy logic controller:

Fig 34 type1 input and output ac voltage and currents with R Load by using fuzzy logic controller

Fig 35 switching pulses with R Load by using fuzzy logic controller

Fig 36 FFT analysis of vac type 1 with R Load by using fuzzy logic controller

Fig 37 FFT analysis of Iac type 1 with R Load by

using fuzzy logic controller

Fig 38(A)

0.05 0.1 0.15

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Selected signal: 7.5 cycles. FFT window (in red): 1 cycles

Time (s)

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Fundamental (50Hz) = 261.6 , THD= 14.97%

Ma

g (

% o

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am

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Selected signal: 7.5 cycles. FFT window (in red): 1 cycles

Time (s)

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Fundamental (50Hz) = 3.62 , THD= 12.17%

Ma

g (

% o

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amen

tal)

0.05 0.1 0.15

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Selected signal: 7.5 cycles. FFT window (in red): 1 cycles

Time (s)

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Fundamental (50Hz) = 264.1 , THD= 14.18%

Mag

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0

5Selected signal: 7.5 cycles. FFT window (in red): 1 cycles

Time (s)

0 100 200 300 400 500 600 700 800 900 10000

5

10

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Fundamental (50Hz) = 4.741 , THD= 26.74%

Mag (

% of

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dame

ntal)

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Fig38 (B)

Fig 38 (A) & (B) type 1 input and output ac voltage and currents with RL Load by using fuzzy logic controller

Fig 39 FFT analysis of Vac type 1with RL Load by using fuzzy logic controller

Fig 40 FFT evaluation of Iac kind 1 with RL Load by using fuzzy logic controller

Above Key simulation results of Type-I topology showing the input and output ac voltage and currents

(in both resistive and inductive load) together with switch voltage strain.

Fig 41 type 2 input and output ac voltage and currents with R Load by using fuzzy logic controller

Fig 42 switching pulses with R Load by using fuzzy logic controller

Fig 43 FFT analysis of Vac type 2 with R Load by using fuzzy logic controller

Fig 44 FFT analysis of Iac type 2 with R Load by using fuzzy logic controller

Type-II topology showing enter and output Voltages and currents together with transfer voltage stress.

Fig 45 type 2 input and output ac voltage and currents with RL Load by using fuzzy logic controller

0 0.01 0.02 0.03 0.04 0.05 0.06 0.07 0.08 0.09 0.1

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0

200

Selected s ignal: 5 cycles. FFT window (in red): 1 cycles

Time (s)

0 100 200 300 400 500 600 700 800 900 10000

2

4

6

8

10

Frequency (Hz)

Fundamental (50Hz) = 340.3 , THD= 1.95%

Mag

(%

of

Fu

nda

me

nta

l)

0 0.01 0.02 0.03 0.04 0.05 0.06 0.07 0.08 0.09 0.1

-5

0

5

Selected signal: 5 cycles. FFT window (in red): 1 cycles

Time (s)

0 100 200 300 400 500 600 700 800 900 10000

2

4

6

8

10

Frequency (Hz)

Fundamental (50Hz) = 5.603 , THD= 1.98%

Mag

(% o

f Fun

dam

enta

l)

0 0.01 0.02 0.03 0.04 0.05 0.06 0.07 0.08 0.09 0.1

-200

0

200

Selected signal: 5 cycles. FFT window (in red): 1 cycles

Time (s)

0 100 200 300 400 500 600 700 800 900 10000

2

4

6

8

10

Frequency (Hz)

Fundamental (50Hz) = 340.2 , THD= 1.91%

Mag (

% o

f F

undam

enta

l)

0 0.01 0.02 0.03 0.04 0.05 0.06 0.07 0.08 0.09 0.1

-5

0

5

Selected signal: 5 cycles. FFT window (in red): 1 cycles

Time (s)

0 100 200 300 400 500 600 700 800 900 10000

2

4

6

8

10

Frequency (Hz)

Fundamental (50Hz) = 5.788 , THD= 2.68%

Ma

g (

% o

f F

un

dam

en

tal)

International Journal of Research

Volume VIII, Issue I, January/2019

ISSN NO:2236-6124

Page No:181

Page 11: Implementation of Single-Phase Photovoltaic Systems for

Fig 46 switching pulses with RL Load by using fuzzy logic controller

Fig 47 FFT analysis of Vac type 2 with RL Load by using fuzzy logic controller

Fig 48 FFT analysis of Iac type 2 with RL Load by using fuzzy logic controller

Fig 49 type 3 input and output ac voltage and currents with RL Load by using fuzzy logic controller

Fig 50 FFT analysis of Vac type 3 with RL Load by using fuzzy logic controller

Fig 51 FFT analysis of Iac type 2 with RL Load by using fuzzy logic controller

Type-3 with RL load by using fuzzy logic controller

VI. CONCLUSION

This paper disclosed three new single-stage transformer less inverters for a lattice associated PV framework. The working guideline of these inverters was dependent on the flying capacitor guideline, furthermore, it used a base number of dynamic and inactive segments. Other than a shared conviction for the network and source, which viably wipes out the spillage streams, the three new topologies have three levels of yield voltage, which Streams, the three new topologies have three tiers of yield voltage, which lessens the yield modern-day swells, EMI, and channel prerequisites. What's more, simply couple of switches (≤ 2) are in association amid the dynamic nation, which helps in lessening lessens the yield current swells, EMI, and channel prerequisites. What's more, just couple of switches (≤ 2) are in arrangement amid the dynamic state, which helps in lessening the conduction misfortune in the framework. Further, a uniform voltage worry over all switches in the Sort I topology permits the execution of industry standard half-connect modules, which spares the general expense and volume of the framework. The normal execution exhibited by each 1-kVA lab models is promising for a useful grid connected PV framework.

REFERENCES [1] S. Koura, J. I. Leon, D. Vinnikov, and L. G. Franquelo, “Grid-connected photovoltaic systems: An overview of recent research and emerging PV Converter technology,” IEEE Ind. Electron. Mag., vol. 9, no. 1, pp. 47–61,Mar. 2015. [2] Global Market Outlook for Solar Power 2015-2019, Jun. 2015 [Online].Available: http://www.solarpowereurope.org [3] Safety of Power Converters for Use in Photovoltaic Power Systems - Part2: Particular Requirements for Inverters, International Electro technical Commission IEC 62109-2 ED. 1 Standard, 2011. [4] S. B. Kjaer, J. K. Pedersen, and F. Blaabjerg, “A review of single phase grid-connected inverters for photovoltaic modules,” IEEE Trans.Ind. Appl., vol. 41, no. 5, pp. 1292–1306, Sep./Oct. 2005. [5] D. Meneses, F. Blaabjerg, O. Garcia, and J. A. Cobos, “Review and comparison of step-up transformer less topologies for photovoltaic AC-module application,” IEEE Trans. Power Electron., vol. 28, no. 6, pp. 2649–2663,Jun. 2013. [6] M. Islam, S. Mekhilef, and M. Hasan, “Single phase transformer less inverter topologies for grid-tied

0.05 0.1 0.15

-200

0

200

Selected signal: 7.5 cycles. FFT window (in red): 1 cycles

Time (s)

0 100 200 300 400 500 600 700 800 900 10000

5

10

15

20

25

Frequency (Hz)

Fundamental (50Hz) = 261.6 , THD= 14.97%

Mag

(% o

f Fun

dam

enta

l)

0.05 0.1 0.15

-4

-2

0

2

4

Selected signal: 7.5 cycles. FFT window (in red): 1 cycles

Time (s)

0 100 200 300 400 500 600 700 800 900 10000

5

10

15

20

25

30

Frequency (Hz)

Fundamental (50Hz) = 3.62 , THD= 12.17%

Mag

(%

of

Fun

dam

enta

l)

0.05 0.1 0.15

-200

0

200

Selected signal: 7.5 cycles. FFT window (in red): 1 cycles

Time (s)

0 100 200 300 400 500 600 700 800 900 10000

5

10

15

20

25

30

Frequency (Hz)

Fundamental (50Hz) = 264.1 , THD= 14.18%

Mag

(% o

f Fun

dam

enta

l)

0.05 0.1 0.15-5

0

5Selected signal: 7.5 cycles. FFT window (in red): 1 cycles

Time (s)

0 100 200 300 400 500 600 700 800 900 10000

5

10

15

20

Frequency (Hz)

Fundamental (50Hz) = 4.741 , THD= 26.74%

Mag

(%

of

Fun

dam

enta

l)

International Journal of Research

Volume VIII, Issue I, January/2019

ISSN NO:2236-6124

Page No:182

Page 12: Implementation of Single-Phase Photovoltaic Systems for

photovoltaic system: A review,” Renew.Sustain. Energy Rev., vol. 45, pp. 69–86, 2015. [7] M. Victor, F. Greizer, S. Bremicker, and U. Hubler, “Method of converting a direct current voltage from a source of direct current voltage, more specifically from a photovoltaic source of direct current voltage, into an alternating current voltage,” U.S. Patent 7 411 802, Aug. 12, 2008. [8] J.Ketterer,H. Schmidt, and C. Siedle, “Inverter for transforming aDCvoltage into an AC current or an AC voltage,” Europe Patent 1 369 985 (A2), May 13, 2003. [9] B. Ji, J. Wang, and J. Zhao, “High-efficiency single-phase transformer less PV H6 inverter with hybrid modulation method,” IEEE Trans. Ind. Electron., vol. 60, no. 5, pp. 2104–2115, May 2013. [10] B. Yang, W. Li, Y. Gu, W. Cui, and X. He, “Improved transformer less inverter with common-mode leakage current elimination for a photovoltaic grid-connected power system,” IEEE Trans. Power Electron., vol. 27, no. 2, pp. 752–762, Feb. 2012.

International Journal of Research

Volume VIII, Issue I, January/2019

ISSN NO:2236-6124

Page No:183