Implementation & Evaluation of the DeltaImplementation & Evaluation of the Delta--Sigma ModulationSigma Modulation--Based BIST Scheme Based BIST Scheme for Sampledfor Sampled--Data MixedData Mixed--Signal SystemsSignal Systems

H.H.--C. HongC. Hong‡‡, J., J.--L. HuangL. HuangTim ChengTim Cheng , C., C.--W. W. WuWu ‡‡

ECE,ECE, UnivUniv. of California, Santa Barbara . of California, Santa Barbara EE Dept., EE Dept., Tsing HuaTsing Hua University, Taiwan University, Taiwan ‡‡

Jun. 2001 2

DSPDSP--based v.s. analog ATEbased v.s. analog ATEIncreased test throughputIncreased test throughput

Reduced switching & settling Reduced switching & settling timetime

Device response is memorized Device response is memorized and analyzed for different and analyzed for different parametersparameters

Software DSP doesn’t have to Software DSP doesn’t have to be realbe real--timetime

Performance limited by Performance limited by ADC/DACADC/DAC

Research Directions Research Directions --DSPDSP--based selfbased self--testing of analog componentstesting of analog components

DSP-based ATE

ADCDAC AnalogDUT

Memory

Digital signal processing

Synchronization

SOC

ADCDAC AnalogCUT

Memory

Digital signal processing

Synchronization

DSP/Processor core

DSPDSP--based BIST based BIST -- onon--chip chip testertester

Relieve the need of expensive Relieve the need of expensive ATEATEReduce external noiseReduce external noise

Practical issuesPractical issuesTest quality limited by Test quality limited by DAC/ADCDAC/ADCDAC/ADC are not always DAC/ADC are not always available, and must be tested available, and must be tested firstfirst

1-bit DAC

1-bit DSM

Jun. 2001 3

Delta-sigmamodulation

fs >> 2fo

DeltaDelta--Sigma ModulationSigma Modulation

High sampling rate (High sampling rate (ffss >> 2f>> 2foo), low output amplitude resolution), low output amplitude resolutionAverage output tracks input valueAverage output tracks input value

Allows the use of relatively “imperfect” componentsAllows the use of relatively “imperfect” componentsSuitable for VLSI implementationSuitable for VLSI implementation

fo Hz

modulationnoise

Hzfo

Analog input Digital output

Jun. 2001 4

1-bit Softwaredelta-sigmamodulator

DeltaDelta--sigma Modulation Based Signal sigma Modulation Based Signal Generation Generation [Roberts][Roberts]

N-bit DACo/p levels

1-bit DAC

Digital signal processing

1+ bit in DAC 1+ bit in DAC 6dB SNR gain6dB SNR gain

How to measure the DAC output levels using onHow to measure the DAC output levels using on--chip chip

resources?resources?

Jun. 2001 5

1-bit ∆Σmodulator1-bit ∆Σ

modulator

AnalogCUT

AnalogCUT

Low-res. DAC& LPF

Low-res. DAC& LPF

Responseanalysis

Programmablecore + memory

Test stimuli& spec.

Pass/fail ?

Software ∆Σmodulator

DeltaDelta--Sigma Modulation Based Sigma Modulation Based BIST ArchitectureBIST Architecture

ATEATE DUTDUT

Jun. 2001 6

The test chip The test chip -- block diagramblock diagram

Stage 1 Stage 21-bit DA

Ext. signalsource

DUT: 2nd-order LPF

DSM 1

DSM 2

Patterngenerator

DSP

Jun. 2001 7

The test chipThe test chip

DUT: 2ndDUT: 2nd--order LPForder LPFDifferential, sampledDifferential, sampled--data implementation (@ 5 MHz)data implementation (@ 5 MHz)

BIST circuitryBIST circuitry11--bit DACbit DAC

Analog Analog multiplexermultiplexer

11--bit 1st/2nd DSM (DSM1/DSM2)bit 1st/2nd DSM (DSM1/DSM2)

Area (mmArea (mm22))

DUTDUT DSM1DSM1 DSM2DSM2

0.7190.719 0.2270.227 0.3630.363

11--bit DACbit DAC

0.0020.002

Area/DUTArea/DUT 11 0.3160.316 0.5040.5040.0030.003

Jun. 2001 8

The DUT specificationThe DUT specificationDesigned sampling rate: 5 MHzDesigned sampling rate: 5 MHz

1st-order output2nd-order output

103 104 105 106

Frequency Response

Jun. 2001 9

The experimentsThe experiments

Performance validation of the Performance validation of the DSMsDSMsUtilize external precision signal generatorUtilize external precision signal generator

Not needed in real test applicationNot needed in real test application

SingleSingle--tone test (STT)tone test (STT)High spectral purity test signalHigh spectral purity test signal

For DR, SNR, and SNDRFor DR, SNR, and SNDR

MultiMulti--tone test (MTT)tone test (MTT)For IMD and FRFor IMD and FR

Jun. 2001 10

Stimulus synthesis Stimulus synthesis -- single tonesingle tone4th4th--order synthesizer: 64 order synthesizer: 64 kbitskbits, 2 , 2 KHzKHz, , --20 20 dBFS dBFS @ 5 MHz@ 5 MHz

102 103 104 105 106

Jun. 2001 11

Stimulus synthesis Stimulus synthesis -- IMDIMD

1st-order2nd-order4th-order

102 103 104 105 106

Choose the 4th-order synthesizer - lower noise floor

Jun. 2001 12

Stimulus synthesis Stimulus synthesis -- FRFR

1st-order2nd-order4th-order

Choice of synthesizer depends on tones of interest

103 104 105 106

Jun. 2001 13

Stimulus synthesis Stimulus synthesis -- FRFR

1st-order2nd-order4th-ordersolid line: STFsymbol: simulation

Choice of synthesizer depends on tones of interest

Jun. 2001 14

The DSM performanceThe DSM performance

82 dB SNDR when < 10 MHz82 dB SNDR when < 10 MHz80 dB SNDR up to 25 MHz80 dB SNDR up to 25 MHz

60 dB SNDR when < 20 MHz60 dB SNDR when < 20 MHz58 dB SNDR up to 25 MHz58 dB SNDR up to 25 MHz

Input: 1 Input: 1 KHz KHz , , --4.6 4.6 dBFSdBFS, OSR: 128, OSR: 128

10 20 30

1st-order2nd-order

Jun. 2001 15

The DSM performanceThe DSM performance

DR of the 1st/2nd DSM: 63 dB/85 dBDR of the 1st/2nd DSM: 63 dB/85 dB(Pass(Pass--band: DC band: DC -- ~100 ~100 KHzKHz))

DR of the 1st/2nd DSM: 65 dB/87 dBDR of the 1st/2nd DSM: 65 dB/87 dB(Pass(Pass--band: DC band: DC -- 20 20 KHzKHz))

Jun. 2001 16

SingleSingle--tone test (STT)tone test (STT)Input: Input: --14 14 dBFSdBFS, 2 , 2 KHzKHz, modulated by 4th, modulated by 4th--order SW DSMorder SW DSMDynamic range is no worse then 65 dB (Dynamic range is no worse then 65 dB (--51 dB @ 10 MHz 51 dB @ 10 MHz -- 14 14 dBFSdBFS))

DUT’s DUT’s DC gainDC gain

SNDRSNDR

DSM1DSM1 DSM2DSM2

5757 7070

SNRSNR 5959 7373

SDRSDR 6161 7373

DRDR 7373 8787

102 103 104 106105

1st-order2nd-orderinput

Jun. 2001 17

MultiMulti--tone test tone test -- IMDIMD66--tone signal, tone signal, --27.4 27.4 dBFS dBFS each, 3X the each, 3X the freqfreq. of previous one. of previous one

102 103 104 106105

1st-order2nd-orderinput

Jun. 2001 18

MultiMulti--tone test (MTT) tone test (MTT) -- FRFR

x: 1st DSMx: 1st DSMo: 2nd DSMo: 2nd DSM

DSM1 is as good as DSM2 for FR analysis.DSM1 is as good as DSM2 for FR analysis.

103 104 105

1st-order synthesizer2nd-order synthesizer4th-order synthesizer

Jun. 2001 19

Diagnosing the DUTDiagnosing the DUTExcessive gain at the first stage: ~3.4 dBExcessive gain at the first stage: ~3.4 dBCause SNDR degradationCause SNDR degradation

103 104 105

1st-order synthesizer2nd-order synthesizer4th-order synthesizer

Jun. 2001 20

Conclusion & future workConclusion & future work

11--bit DSM suitable as onbit DSM suitable as on--chip analog response chip analog response digitizerdigitizer

BaseBase--band, low to medium resolution applicationsband, low to medium resolution applications

DR of DSM1/2 is 63/85 dB for DCDR of DSM1/2 is 63/85 dB for DC--100 100 KHz KHz passpass--bandband

OnOn--going workgoing workValidating techniques for testing the Validating techniques for testing the DSM’sDSM’s

Optimizing the DSP proceduresOptimizing the DSP proceduresSynthesis & analysisSynthesis & analysis

Jun. 2001 21

The 1The 1--bit DACbit DAC

++VrefVref

--VrefVrefvirtual groundvirtual ground

virtual groundvirtual ground

--

++

ph2dph2dph1dph1dph1ph1

ph2*ph2*DinBDinBph2*Dinph2*Din