Impact of Practical Issues on the HarmonicPerformance of Phase-Shifted Modulation Strategies

for a Cascaded H-bridge StatCompost IECON 2010 paper

Abstract—Phase shifted carrier modulation has become anindustry standard in its application to multi-level H-bridgeStatComs (H-StatComs). The technique uses the cancellationof harmonics within each phase-leg to significantly improvethe harmonic performance relative to the switching frequency.This paper investigates subtle practical implementation issueswhich deteriorate the harmonic performance of this technique.The effects of non-uniform DC bus voltages, capacitor voltagebalancing strategies and phase shift error are investigated. Acomparison with an alternative modulation strategy is developedin terms of a defined set of performance indicators. Simulationand experimental results are presented which show that thereis an important relationship between the performance of thephase shifted carrier technique and the number of voltage levelsproduced by the H-StatCom.

I. INTRODUCTION

Multi-level Static Compensators are increasingly being im-plemented as multi-level cascaded H-bridge converters. Thereare a number of reasons for this, the main one being that itis feasible to obtain a large number of voltage levels withthis topology [1]–[3]. With other topologies the level numbersare constrained by component number and capacitor voltagebalance issues [4], [5]. The other important advantage of theH-bridge multi-level converter is that the topology is ideallysuited to reactive power and harmonic filtering applicationsas the converter does not need to handle any real power, andtherefore there is no need for expensive isolated DC powersupplies [6], [7].

One of the well established modulation schemes for powerelectronic converters is Selective Harmonic Elimination (SHE)PWM. This technique creates an output voltage waveform thatis a staircase approximation to a sine wave. The switchinginstants of the voltage waveforms are pre-computed in such away as to enforce the elimination of particular harmonics [8]which decreases the Total Harmonic Distortion (THD) of theconverter current.

The harmonic performance of SHE-PWM is relatively goodfor converters of a low level number. However when the levelnumber increases the harmonic performance of an alternatetechnique known as Phase Shifted Carrier (PSC) PWM in-creases more rapidly [9]. This, coupled with the fact thatsolving the transcendental equations in SHE-PWM for a widerange of input conditions can be complex, has limited the useof the technique.

PSC-PWM is based on the triangle wave modulation tech-nique, which is employed extensively in two-level inverters

[10]. Triangle wave modulation uses a low frequency referencewaveform which is compared against a higher frequencytriangular carrier wave. Instants at which the two waveformsintersect correspond to the required switching instants for theH-bridge. When each H-bridge within the phase-legs of a H-StatCom is modulated by triangle waves which are shifted byappropriate angles, the harmonics of each individual H-bridgecan have a phase relationship to the others in the leg so thata number of harmonics can be canceled over the whole phaseleg [11]–[13].

Using Fourier analysis and analytical methods developed incommunication theory to describe modulated waveforms it ispossible to calculate the harmonic components of the resultantwaveforms when utilising PSC-PWM. This paper investigatesthe harmonic cancellation for practical implementations of H-StatComs. Specifically, the theory behind PSC-PWM assumesa constant DC bus voltage [14]. While this may be a reasonableassumption in drive system applications where each capacitorhas its own DC supply, this paper shows that due to deviationin H-bridge capacitance and the inherent 100Hz capacitorvoltage ripple common to H-StatCom systems, the assumptionis not always valid. As will be shown, this can have an effecton the harmonic performance of the scheme.

The effect on harmonic performance of carrier phase-shifterror and the capacitor voltage balancing scheme employed inPSC-PWM is also investigated.

Space Vector Modulation (SVM) is an alternative methodto calculate appropriate switching instants for the H-bridges.This scheme chooses a number of capacitors to switch infor the entire control interval and symmetrically pulse widthmodulates one of the remaining H-bridges to create the totalaverage output voltage. The use of SVM in a H-StatComapplication creates an extra degree of freedom, which canbe used to create an effective voltage balancing scheme [15].This balancing scheme avoids the control loop interactions andsubsequent instabilities present in the PSC-PWM techniquedescribed in [5].

This paper makes a comparison between PSC-PWM andSVM in terms of harmonic performance and switching fre-quency. For a given switching frequency SVM applied to H-StatComs produces an inferior harmonic performance as com-pared to the ideal implementation of PSC-PWM. However, itis shown that due to non-ideal effects there is a point at whichthe harmonic performance trade-off with the switching lossesis similar for both techniques. With the ease of implementation

Figure 1. Circuit configuration for a star-connected 19-level H-bridgeStatCom.

of SVM it is proposed that this technique will begin to gainwider acceptance, especially for use in H-StatComs above acertain level number.

[16] and [17] have developed some theoretical analysisand preliminary simulation results describing the practicaleffects of non-uniform DC bus voltages, phase-shift errorand capacitor balancing. This paper develops a more rigorousmathematical derivation of the equations which describe theharmonic cancellation when practical effects are modeled.Experimental results are also provided which highlight theimportance of considering the practical effects in H-StatComdesign and construction.

II. BACKGROUND

Fig. 1 shows the circuit configuration for a 19-level (line toneutral) H-StatCom. Each stack of H-bridges essentially formsone phase of a three phase current controlled voltage source.The purpose of the H-StatCom is to modulate the voltageat the output of each stack so that the current through theinductors can be controlled to provide power factor correction,compensate for system harmonics, and alleviate other powerquality problems.

Before any comparison between the modulation schemesemployed in H-StatComs is made, it is necessary to identifythe elements of the H-StatCom system which affect theharmonic performance. The comparison conditions includingthe effect of control strategy, voltage rating and level numberof the considered H-StatCom, are outlined in a previous paper[16]. The analysis in this paper considers an 11kV 19-level H-StatCom which is absorbing a peak leading current of 200A.The capacitors in each of the H-bridges are assumed to havea nominal value of 2200µF with ±10% tolerance. Theseconditions are kept constant in the analysis and simulation ofboth the PSC-PWM and SVM modulation schemes to allowan effective comparison.

0.005 0.01 0.015 0.02 0.025 0.03 0.035 0.04 0.045

1140

1160

1180

1200

1220

1240

1260

X: 0.03751Y: 1265

Time (sec)

Vol

tage

(V

)

X: 0.03746Y: 1253

Figure 2. Theoretical capacitor voltages for an 11kVl−l, 19-level H-StatComwith a leading current of 200A.

III. THE PRACTICAL IMPLEMENTATION OF PSC-PWM

There are three important practical issues to consider whenquantifying the performance of the PSC-PWM scheme.

A. Non-Uniform DC Bus Voltage

To determine the deterioration in harmonic performance dueto the non-uniform DC bus voltages it is necessary to calculatethe variance in capacitor voltages for the particular application.In [16] the expression for a capacitor voltage in a H-StatComsystem was developed by considering the form of the outputvoltage and current. By modifying the capacitance value Cin the resultant expression (1) it is possible to determine thevariance in capacitor voltage ripple.

VC(t) =

(A2V 2mN2

+VmIm2ωoNC

(sin(2ωot+ ϕ)− sinϕ)+

VmImNC

t cosϕ

) 12

(1)

where A is a constant dependent on the initial voltage onthe capacitors, Vm is the peak output H-StatCom voltage, Imand ϕ are the peak magnitude and angle of the H-StatComcurrent respectively, N is the number of H-bridge modules ineach phase-leg and ωo is the fundamental system frequency.

Equation 1 gives the expression for the capacitor voltageas a function of time. Fig. 2 shows a graphical representationof (1) for the considered operational condition. It is importantto note that there is a difference in the DC capacitor voltagesdue to the variance in H-bridge capacitance values.

The following analysis considers a steady state conditionwhere it is assumed the capacitor voltages are periodic. Thismeans the VmImNC t cosϕ term in (1) is balanced out by thereal power loss in the phase-leg and therefore this term canbe ignored. The capacitor voltage is then expressed as:

VC (t) =AVmN

(1 +

ImN

2ωoCA2Vm(sin (2ωot+ ϕ)− sin (ϕ))

) 12

(2)

Due to the square root in (2) the non-linear expression forthe capacitor voltage is approximated with a Taylor series. Thehigher order terms in this expansion are negligible thereforethe first order Taylor series is utilised:

VC (t) ≈AVmN

(1 +

1

2

ImN

2ωoCA2Vm(sin (2ωot+ ϕ)− sin (ϕ))

)=

AVmN

+Im

4ωoCA(sin (2ωot+ ϕ)− sin (ϕ)) (3)

Having calculated the capacitor voltage ripple, it is possibleto develop the mathematical descriptions of the resultantmodulated waveforms. Drawing from the fundamental PSC-PWM equations [14], the complete expression for the voltagewaveform produced at the output of one H-bridge by asym-metrical regular sampled PWM is expressed as:

Vab (t) =8VCπ

∞∑n=1

1[nωo

ωc

]Jn(nωoωc

π

2M

)× sin

(nπ

2

)cos (nωot)

+8VCπ

∞∑m=1

∞∑n=−∞

1

q′J2n−1

(q′π

2M)cos ([m+ n− 1]π)

× cos (2mωct+ [2n− 1]ωot) (4)

where q′ = 2m+[2n− 1] ωo/ωc, M is the modulation index,m is the carrier index, n is the baseband index, ωc is thefrequency of the carrier wave and Jn (x) refers to a Besselcoefficient evaluated with argument x and order n.

To quantify the harmonic distortion introduced due to non-uniform capacitor voltages, the second term in (3) needs to besubstituted into (4), for each H-bridge in the phase-leg. Theresultant expression for the extra distortion introduced into theH-StatCom output voltage as a function of the indexes m andn is shown in (5).

Vdis =

(8

π

1

q′J2n−1

(q′π

2M)cos [(m+ n− 1)π]

)×[

VC1 cos

(2m

(ωct+

[1− 1]πN

)+ [2n− 1]ωot

)+ VC2 cos

(2m

(ωct+

[2− 1]πN

)+ [2n− 1]ωot

)+ ...+ VCN cos

(2m

(ωct+

[N − 1]πN

)+ [2n− 1]ωot

)](5)

where,

VCi =Im

4ωoACi(sin(2ωot+ ϕ)− sinϕ) (6)

Using Euler’s formula, an expression for the distortion intro-duced by the ith H-bridge can be written using exponentials,

Vdis,i = p (m,n)1

Ci

(1

2j

(ej(2ωot+ϕ) − e−j(2ωot+ϕ)

)− sinϕ

)× 1

2

(ej(2m

(ωct+

[i−1]πN

)+[2n−1]ωot

)

+ e−j

(2m

(ωct+

[i−1]πN

)+[2n−1]ωot

))(7)

where,

p (m,n) =Im

4ωoA

8

π

1

q′J2n−1

(q′π

2M)cos ([m+ n− 1]π) (8)

By performing the multiplications in (7) and collectingterms,

Vdis,i = p (m,n)1

Ci

[1

4j

(ej(2m

(ωct+

[i−1]πN

)+[2n+1]ωot+ϕ

))+

1

4j

(e−j

(2m

(ωct+

[i−1]πN

)+[2n−3]ωot−ϕ

))− 1

4j

(ej(2m

(ωct+

[i−1]πN

)+[2n−3]ωot−ϕ

))− 1

4j

(e−j

(2m

(ωct+

[i−1]πN

)+[2n+1]ωot+ϕ

))− 1

2sinϕ

(ej(2m

(ωct+

[i−1]πN

)+[2n−1]ωot

)

+e−j

(2m

(ωct+

[i−1]πN

)+[2n−1]ωot

))](9)

Converting back to trigonometric functions,

Vdis,i = p (m,n)1

Ci

[1

2sin

(2m

(ωct+

[i− 1]πN

)+ [2n+ 1]ωot+ ϕ

)− 1

2sin

(2m

(ωct+

[i− 1]πN

)+ [2n− 3]ωot− ϕ

)−sinϕ cos

(2m

(ωct+

[i− 1]πN

)+ [2n− 1]ωot

)](10)

Finally, to calculate the total distortion present in the outputH-StatCom voltage the individual distortion from each bridgeis summed as follows:

Vdis = Vdis,1 + Vdis,2 + ...+ Vdis,N (11)

The preceding analysis has developed equations to describethe extra harmonics that the output voltage will contain dueto the double frequency component in the H-bridge capacitorvoltages. If the capacitance value of each H-bridge module isidentical then there is no extra distortion introduced, as theprocess of shifting the carrier waveforms will cancel all theterms in (10) for all harmonics up to 2Nωc. However when thecapacitances differ the cancellation will deteriorate and extraharmonics will be induced.

Remark 1: The presence of the DC voltage ripple on eachcapacitor will also induce extra distortion into the output H-StatCom voltage at ω = 2ωo. However a simple feed-forwardcompensation scheme [18] can be included in the controlstructure to eliminate these harmonics, therefore they will notbe considered in this paper. n

B. Phase-Shift Error

The harmonic performance of PSC-PWM will further dete-riorate when there are errors in the phase-shifts of the carrierwaveforms applied to each H-bridge. In practice there will besome non-zero error associated with the phase of the carrierwaveforms. The magnitude of this error may be insignificantdepending on how the multiple carrier waveforms are createdand how their comparison with the reference waveform isimplemented i.e. if the carrier waveform is created within eachpower module there may be greater synchronisation problemsas opposed to if the comparison operations are performedfrom a central DSP running off one clock. The analysis ofphase-shift errors is included if only to highlight the need forminimising this source of error through converter design.

The mathematical description of the resultant waveformsunder the condition of an error in the carrier phase-shifts isshown in (12).

Vdis =

(8

π

VCq′J2n−1

(q′π

2M)cos [(m+ n− 1)π]

)×[

cos

(2m

(ωct+

[1− 1]πN

+ θ1

)+ [2n− 1]ωot

)+ cos

(2m

(ωct+

[2− 1]πN

+ θ2

)+ [2n− 1]ωot

)+ ...+ cos

(2m

(ωct+

[N − 1]πN

+ θN

)+ [2n− 1]ωot

)](12)

where θi is the phase-shift error associated with the ith

carrier waveform.It can be seen from (12) that the phase-shift error modifies

the angle of the harmonics produced by each H-bridge. In theideal implementation of PSC-PWM the harmonics producedby each H-bridge have a phase relationship that cancels theharmonics through the phase-leg. However when consideringthis non-ideal effect the harmonic cancellation will deterio-rate due to the extra phase-offset in the resultant harmonicsproduced by each bridge.

C. Balancing the H-bridge Capacitor Voltages

Thus far only the steady state harmonic performance of thePSC-PWM scheme has been considered i.e. the operationalcondition where the H-StatCom is supplying a constant H-StatCom current and the capacitor voltages remain naturallybalanced without an explicit mechanism to maintain theirbalance. The following analysis investigates the situationwhere the DC capacitor voltages are not naturally periodic.This situation will arise in practice due to unequal chargingand discharging of the capacitors, which can be caused bycapacitor leakage currents, transient changes in the currentreference and errors in measurement of the system variables(particularly the DC bus voltages). Variation in the capacitancevalues of each H-bridge, which is unavoidable due to capacitortolerance, will also cause unequal charging and discharging ofthe capacitors over the 20ms period of the H-StatCom current.

VC;ave

VC;ave

+

-

§ k1

cos(wt)k1

cos(wt) §+

+

kp

+k

i

s

kp

+k

i

s

Vcap

Vcap

Vref

Vref

Vbridge

Vbridge

1

1+s=!

cut

1

1+s=!

cut

Vbal

Vbal

Figure 3. Block diagram of the individual capacitor voltage balancingscheme.

When the H-StatCom is transferring only reactive power eachcapacitor voltage will be naturally periodic. However whenthe H-StatCom is absorbing a finite real power (to supply thelosses), the string of capacitors spends a larger percentageof the 20ms period charging than discharging. When thisoccurs the total cluster voltage (the addition of all capacitorvoltages in a phase-leg) remains periodic but also unevenlydistributed between the capacitors. To correct for this unevendistribution the individual voltage balancing loops (shown inFig. 3.) enforce a control action, with the magnitude of thecontrol action essentially dependent on the H-bridge module’scapacitance value and the amount of real power being absorbedby the phase-leg [19].

It is difficult to quantify the difference in capacitor voltagesthat will arise due to the combination of these issues. That iswhy this paper attempts to provide results demonstrating theeffect on the harmonic performance of a range of capacitorvoltage deviations. The precise effect on the THD valueswill most likely need to be evaluated based on the particularapplication, the real power losses within each phase-leg andthe observed capacitor voltages within that application.

A block diagram of the capacitor voltage balancing schemeis shown in Fig. 3. From this diagram it is noted that the bal-ancing scheme modifies both the magnitude and phase of thereference waveforms. The Bessel coefficient in (4) is a functionof the reference waveform magnitude. Therefore to model theeffect of the balancing scheme the Bessel coefficients mustbe re-evaluated for each H-bridge. From this observation it ispossible to derive the mathematical description of the resultantwaveforms when the capacitor voltages are aperiodic, or whencontrol action is required from the voltage loops to enforcetheir periodicity.

Vdis =

(8

π

1

q′cos [(m+ n− 1)π]

)×[

VC1J2n−1(q′π

2M1)cos

(2m

(ωct+

[1− 1]πN

)+ [2n− 1] (ωot+ θ1)

)+VC2J2n−1

(q′π

2M2)cos

(2m

(ωct+

[2− 1]πN

)+[2n− 1] (ωot+ θ2)

)+ ...+ VCNJ2n−1

(q′π

2MN

)× cos

(2m

(ωct+

[N − 1]πN

)+ [2n− 1] (ωot+ θN )

)](13)

where Mi is the modulation index (modified by the balanc-ing scheme) of the ith reference waveform and θi is the extraphase-shift, caused by the balancing scheme, associated withthe ith reference waveform.

As depicted in Fig. 3 the reference waveform for each H-bridge is developed from the addition of the two sinusoidalwaveforms Vref and Vbal:

Vbridge,i = Vref sin (ωot)+(k1Kp (VC,ave − VCi)+k1KI

t∫0

VC,ave (τ)−VCi (τ) dτ)cos (ωot)

(14)

The capacitor voltages are filtered to remove both the dou-ble frequency component and higher order switching ripple.Therefore only the DC component of each capacitor voltageis used to form the resulting modulation index and phase-shiftwhich can be approximated by:

Mi ≈√

(k1 [KpVC,ave −KpVCi + tKI (VC,ave − VCi)])2 + (Vref )2(15)

θi ≈ tan−1(k1 [KpVC,ave −KpVCi + tKI (VC,ave − VCi)]

Vref

)(16)

Equations (15), (16) and (13) provide a means to quantifythe increase in harmonic distortion due to the effect of thecapacitor voltage balancing scheme. Note that if the averageof the capacitor voltages is equal to the target value theneach modulation index for the differing H-bridges will also beequal. Therefore there will be no extra distortion introducedinto the output voltage waveform. However as discussedthe modulation indexes will vary between H-bridges, due tomeasurement errors, transient network events and the adversecontrol interactions between the voltage balancing loops whensupplying real power losses. The effect on harmonic per-formance of varying the modulation indexes is quantified inSubsection IV-C.

IV. APPLICATION OF ANALYSIS TO AN 11kV H-STATCOM

The following analysis attempts to consider a typical appli-cation with common operational goals and common limitationsencountered in the design of H-StatCom systems [16]. The H-StatCom application is defined as follows:• H-StatCom is rated as 11kVl−l direct connect;• It has 19-levels and consists of nine H-bridges per phase-

leg (to allow direct connection to 11kV without aninterposing transformer);

• The nominal DC bus voltage is 1200V ;• The peak leading current is 200A;• A nominal H-bridge capacitance of 2200µF . This value

was chosen, with some degree of subjectivity, from thespecification of the currents flowing into the H-Statcom,the amount of ripple that could reasonably be tolerated inthe capacitors from a control and power semiconductorvoltage rating perspective, consideration of space limi-tations, minimisation of the cost, and maximising theexpected lifetime of the capacitors subject to the previousconstraints;

Curr

ent (A

)

−400.0

−200.0

0.0

200.0

400.0

t(s)

0.7 0.72 0.74 0.76 0.78 0.8

Magnitude (

A)

0.0

10.0

20.0

f(Hz)

0.0 2.5k 5.0k 7.5k 10.0k 12.5k 15.0k 17.5k

Magnitude (

V)

0.0

200.0

400.0

600.0

Current (A) : t(s)

Ia

Magnitude (A) : f(Hz)

Ia

Magnitude (V) : f(Hz)

Va_output

Figure 4. Simulation results for the SVM Scheme - Top plot: Fourierspectrum of the output H-StatCom voltage, Middle plot: Fourier spectrum ofthe H-StatCom measured current Bottom plot: H-StatCom measured current.

• With nominal capacitance of 2200µF and a 9 bridgestack the corresponding bridge capacitance values aredistributed as follows: C1 = 1980µF , C2 = 2035µF, C3 = 2090µF , C4 = 2145µF , C5 = 2200µF ,C6 = 2255µF , C7 = 2310µF , C8 = 2365µF ,C9 = 2420µF ;

• A nominal value of 1mH for the H-StatCom connectioninductance.

• A carrier frequency of ωc = (2π × 2500) rad · s−1 anda system frequency of ωo = (2π × 50) rad · s−1.

At this point the SVM scheme used to compare the perfor-mance of PSC-PWM is analysed. This scheme executes thefollowing process each control cycle to create the desiredoutput voltage vector. Firstly the desired voltage vector isbroken down into its three constituent elements correspondingto the desired output voltage from each phase. The capacitorvoltages are then sorted in descending order of voltage ifthe instantaneous power flow is out of the phase leg, andin ascending order if the power flow is into the phase leg.Then, the number of capacitors required to create an outputvoltage less than or equal to the value of the desired outputvoltage is determined. This process starts at the top of thesorted queue of capacitor voltages. The residual voltage leftover by this process will be of less magnitude than the nextcapacitor voltage. This residual voltage is then produced byusing symmetrical PWM of the next H-bridge in the ordering.

Fig. 4 shows the harmonic spectrum of the output H-StatCom voltage when utilising SVM with a control frequencyof 2.5kHz and the same operational condition as definedabove. The associated THD for the H-StatCom current wascalculated at 12.06%.

In later sections the performance of the modulation schemesfor varying level number H-StatComs is considered. Thereforethe dependency of switching frequency on level number forthe SVM scheme needs to be defined. This is not straight

0 10 20 30 40 50 600.2

0.4

0.6

0.8

1

1.2

1.4

1.6

1.8

Bridge Number

Tra

nsiti

ons

/ Con

trol

Per

iod

Figure 5. Switching frequency of one H-bridge relative to control frequencywhen employing SVM.

forward due to the variable nature of the switching. HoweverFig. 5 shows the dependency by plotting the average switchingfrequency of each component per control cycle. This graphwas produced through a Matlab simulation which implementsa control scheme based on the SVM technique [15], for theoperational condition described above.

Fig. 5 shows that with an increasing level number theswitching frequency per component decreases asymptotically.This is due to the extra redundancy in a higher level numberH-StatCom which decreases the likelihood for a particularH-bridge to be switched in for a given control cycle. Theextra redundancy arises because of the comparative increasein available stack voltage over the constant voltage differencewhich is required across the H-StatCom inductance to createthe constant current.

Remark 2: There will be some variation to the shape ofthe curve in Fig. 5 for differing current magnitudes. This isdue to the change in RMS output voltage required to affectthe change in current. This variation is small, particularly forhigher level numbers (medium voltages) where the change inRMS output voltage is relatively small.

The harmonic performance of SVM will not vary withthe increase in level number when the H-StatCom voltagerating and current remain constant. This is because the voltagewaveform will be identical regardless of level number. Therewill be a greater number of bridges that are available to createthe voltage waveforms, but the modulation strategy will ensurethe creation of an identical voltage waveform, and thereforethe harmonic content of the waveform will be identical. Thisphenomenon is a consequence of the SVM scheme only pulsewidth modulating one bridge in the phase-leg, regardless ofhow many bridges the leg consists of.

Having quantified the performance of the SVM scheme,the performance of the PSC-PWM scheme for the equivalentoperational condition can now be analysed.

2 4 6 8 10 12 14x 10

4

0

50

100

150

200

250

300

350

Har

mon

ic D

isto

rtio

n (V

)

Frequency (Hz)

Figure 6. Fourier spectrum of the output H-StatCom voltage for the PSC-PWM scheme: showing range 0 → 140kHz.

A. Non-Uniform DC Bus Voltage

To calculate the deterioration in harmonic performance dueto the non-uniform DC bus voltages it is necessary to calculatethe variance in the capacitor voltages for this application. Thisis done by modifying the capacitance value in (1). Fig. 2 showsthe resultant voltage waveforms. Equations (5) - (11) are thenevaluated to quantify the induced harmonic distortion due tothe non-uniform DC bus voltages.

Fig. 6 shows the resultant Fourier spectrum of the H-StatCom output voltage when evaluating (11) for the listedoperational condition. It is important to note that Fig. 6 givesus a measure of the harmonic coefficients for this practicalimplementation of a H-StatCom. Fig. 7 shows a close up ofFig. 6 for the frequency interval 0 → 40kHz. The harmonicsintroduced in this interval are a consequence of the capacitorvoltage ripple, and only arise in the practical implementationof a H-StatCom. The magnitudes of these harmonics arerelatively small when compared to the harmonic peaks at2Nωc. However they have an increased effect on the harmonicspectrum of the resultant H-StatCom current, because theirrelatively low frequency means the connection inductance doesnot filter these harmonics as effectively. For this example itwas calculated that by modeling the capacitor voltage ripplethe THD of the H-StatCom current increases from 2.03% to2.05%. Therefore, for this particular operational condition, theharmonic deterioration is very minor.

It is now possible to investigate the trade-off betweenharmonic performance and switching losses for each modu-lation scheme. This can be done in various ways howevermany commercial H-StatComs use the switching frequencyper component as the basis for their design choice [20]. ForPSC-PWM each switching device will undergo two switchingtransitions per period of the carrier waveform, this is due to thefact that PSC-PWM switches in each H-bridge during everyperiod of the carrier waveform.

Using Fig. 5 the switching frequency per component for

0.5 1 1.5 2 2.5 3 3.5 4x 10

4

2

4

6

8

10

12

Har

mon

ic D

isto

rtio

n (V

)

Frequency (Hz)

Figure 7. Fourier spectrum of the output H-StatCom voltage for the PSC-PWM scheme: showing range 0 → 40kHz.

a nine bridge per phase-leg H-StatCom utilising SVM ismeasured at 0.45∗2500. Clearly, for the operational conditionanalysed, the PSC-PWM scheme is superior in terms of thetrade-off between harmonic performance and switching losses.For this condition the THD for the PSC-PWM scheme isnearly six times less than that of the SVM scheme with onlyfour times the number of switching transitions per component.However the analysis will now be extended to consider the ef-fect of non-uniform capacitor voltages in higher level numberH-StatComs.

Fig. 8 depicts the harmonic performance of PSC-PWM asthe level number increases, under the assumption of the sameoperational condition and practical implementation error. Thisgraph is produced by evaluating (5) - (11) for increasingN values. The graph demonstrates that as the level numberincreases the summation and subsequent cancellation of theharmonics in the phase-leg further deteriorates, and this leadsto an increasing current THD.

It can be seen in Fig. 8 that the deterioration of the harmoniccancellation at N = 9 is very minor. However as the bridgenumber per phase-leg increases past N = 10 the THD issignificantly increased. For example, this result shows that aH-StatCom with N = 20 bridges per phase-leg will have twicethe THD compared to the ideal implementation. Therefore thisapplication would require a filter inductor of twice the valueto meet grid connection standards. This results in an increasedsize and cost of the H-StatCom design.

B. Phase-Shift Error

The mathematical descriptions for the PSC-PWM wave-forms assume that the phase-shifts applied to the carriers areideal. In practice there will be some small but finite errorin these shifts as described in Subsection III-B. This erroris difficult to quantify, so an example result that highlightsthe importance of considering this effect in terms of theharmonic performance will be presented. This is based on a

Figure 8. THD of the H-StatCom current versus an increasing bridge number(non-ideal DC capacitor voltages modeled within PSC-PWM).

mathematical description of the resultant waveforms describedin (12).

The example assumes the variance in phase error is dis-tributed linearly through the phase-leg i.e. with an error of 1◦

and a nine bridge phase-leg the corresponding θ values are asfollows: θ1 = 0◦ , θ2 = 0.125◦ , θ3 = 0.25◦ , θ4 = 0.375◦ ,θ5 = 0.5

◦ , θ6 = 0.625◦ , θ7 = 0.75◦ , θ8 = 0.875◦, θ9 = 1◦.Fig. 9 was produced by evaluating (12) for increasing N

with the above phase-shift errors. The graph shows that atN = 9 the phase-shift error has increased the harmonicdistortion from 2.03% to 2.30%. This equates to a relativelyminor 13% increase in the THD, however at N = 15 theTHD has increased 100% over its ideal value. These resultsdemonstrate the importance of the phase-shift accuracy, andthe effect that it can have on the harmonic performance.

Remark 3: The increase in THD due to modeling the phase-shift error plateaus after approximately N = 20. This is incontrast to the distortion introduced by the capacitor voltageripple which showed a near linear increase in THD after N =20.

C. Capacitor Balancing Scheme

In the preceding discussion it was assumed that the in-dividual capacitor voltages are inherently balanced over thefundamental period. Now the effect of the individual capacitorbalancing scheme is considered. Again it is difficult to quantifythe necessary modification to the references to achieve capaci-tor voltage balancing due to the variable nature of the averagecapacitor voltages. However this paper provides some exampleresults that highlight the importance of considering this effectin terms of the harmonic performance. This is achieved byusing the mathematical description of the resultant waveformswhich is shown in (13).

Once the efficiency of the H-bridge modules is knownthe total losses for each phase-leg can be calculated. If we

Figure 9. THD of the H-StatCom current versus an increasing bridge number(phase-shift error modeled within PSC-PWM).

assume a 95% efficiency, the real power losses that need tobe compensated for are calculated via (17).

Ploss = 0.05VsysIstat (17)

where Vsys is the RMS phase to neutral system voltageand Istat is the RMS H-StatCom current being injected tocompensate the network.

Evaluating (17) for the considered operational conditiongives the following:

Ploss = 0.05× 6351× 141 (18)≈ 45kW (19)

Remark 4: In practice the real power losses will be afunction of H-StatCom current, switching frequency, parasiticresistances, the number of H-bridge modules in the phase-legand the particular IGBT’s that are utilised. A relatively lowefficiency value of 95% has been chosen to demonstrate theimportance of considering the real power losses and their effecton harmonic performance. nThe analysis in [19] develops a linearised model of the voltagebalancing loops utilised in PSC-PWM. Using this analysisit is possible to calculate the capacitor voltage variationthat occurs with a deviation in capacitance of ±10% whensupplying losses of 45kW . Under this condition the capacitortolerances will cause a difference in average capacitor voltageof approximately ±2.5% each fundamental cycle. Using (15)and (16) it is straight forward to calculate the required controlaction from each of the voltage balancing loops to correct forthis deviation.

Fig. 10 shows the variance of the THD when correcting fora number of average voltage differences. It has been assumedfor these results that KI = 0 so that (15) and (16) are nolonger functions of time. When correcting for a deviation of

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Figure 10. THD of the H-StatCom current versus an increasing bridgenumber (effect of the voltage balancing scheme used in PSC-PWM modeled).

±30V (2.5%) on the nine H-bridge capacitors each having anominal voltage of 1200V , the THD of the H-StatCom currentincreases from 2.03% to 3.68%. This is a significant amountof extra distortion for the compensation of a relatively smalldeviation in average capacitor voltage.

Remark 5: In producing the values labeled “Correct for” inFig. 10 it has been assumed that the capacitor voltages areperfectly balanced i.e. VC1 = VC2 = ... = VCN i.e. the onlysource of harmonic distortion is due to the voltage balancingscheme modifying each H-bridge reference voltage to ensurebalance is achieved. Obviously in practice there will be somedeviation in the capacitor voltages particularly due to errorsin measurement of the DC bus voltages. Values of THD whenassuming an error in the DC bus voltages of ±2.5% and ±1%have also been shown in Fig.10. This demonstrates the effectof typical measurement errors and highlights the importanceof minimising measurement error through the use of highprecision voltage sensors. n

This result demonstrates that when the capacitors experiencedeviation from their target value the harmonic performance ofthe PSC-PWM technique will quickly deteriorate. To demon-strate what effect this has on the overall performance ofthe PSC-PWM scheme a logical metric to compare to theSVM strategy is developed. This metric is the total harmonicdistortion - switching frequency product shown in (20).

Performance =1

THD× fsw(20)

where fsw is the switching frequency per component andTHD is the total harmonic distortion of the H-StatCom outputcurrent, for the respective modulation scheme.

The total harmonic distortion - switching frequency productfor the SVM scheme will be 112.06∗0.45∗2500 = 73.7µ, whereasthe product for PSC-PWM with the effect of non-uniform ca-pacitor voltages and the capacitor balancing scheme includedwill be 13.68∗2∗2500 = 54.3µ. Therefore for this operationalcondition the SVM scheme has a superior performance. This

HB1

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PhaseCtrl1

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Figure 11. Block diagram of the 415-V 10-kVA experimental system.

means the previously indicated clear superiority of the PSC-PWM scheme over SVM for a nine bridge per phase-leg H-StatCom is no longer a clear cut issue particularly when theeffect of the capacitor balancing scheme is considered.

Remark 6: Similar to the modeling of the capacitor voltageripple, the extension of the capacitor balancing modeling tohigh (N > 20) level number H-StatComs shows that thereis a linear relationship between the distortion introduced byeach carrier harmonic and the non-ideal element responsiblefor the distortion, in this case the modification of the H-bridge references to balance the capacitor voltages. This meansthe higher the level number the more distortion that will beintroduced into the output voltage waveforms for the sameoperational condition. n

V. EXPERIMENTAL RESULTS

In order to validate the simulation studies, the ‘C’ codedll used in the Saber simulations was slightly modified foroperation in the real-time control environment of a low volt-age (415VAC) 19-level H-StatCom. The H-StatCom used toproduce the experimental results is a scaled model of an 11kVH-StatCom. It has 9 H-bridges per phase, with each H-bridgedesigned with MOSFET power devices. The phase legs areWye connected. A block diagram of the experimental systemappears in Fig. 11. One can see that it is implemented as amulti-processor system, with individual processors implement-ing the control for each of the phase legs. These phase legprocessors are responsible for switching in the capacitors toapply the PSC-PWM. The desired H-StatCom output voltageswhich are passed to the phase leg controllers are developedin the control algorithm, which is implemented in a centralPentium PC.

The authors attempted to implement the PSC-PWM schemeutilising the capacitor balancing technique described in Sub-section III-C. It was found however that it is very difficult tofind proportional and integral gains (KI , Kp and k1 shown

in Fig. 3) that do not cause the system to become unstable.Problems with this type of PI based voltage balance controlwere previously noted in [5]. For this reason the experimentalresults were obtained by utilising a modified PSC-PWMscheme. In this scheme instead of adjusting the H-bridgereferences to balance the capacitor voltages, one of the H-bridges is switched in with a reverse polarity in each controlcycle so that the cluster voltage can be evenly shared [19]. Thismodified scheme chooses which H-bridge to switch in with anopposite polarity based on each capacitor’s voltage i.e. basedon whether the phase-leg is absorbing or supplying instanta-neous power in a control cycle, one capacitor is switched inwith an opposite polarity so that its voltage will move closer tothe average of all the capacitor voltages. The modified schemechanges the resultant harmonic spectrum of the H-StatComoutput voltage. Instead of harmonic cancellation up to 2Nωcthe modified scheme achieves harmonic cancellation up to 4ωc.

The use of the new capacitor balancing scheme means that itis difficult to directly compare the experimental results with theanalytical and simulation results which quantify the introduceddistortion due to the capacitor voltage ripple. This is becausethe modified PSC-PWM will result in different forms ofcapacitor voltage ripple due to one bridge in each phase-legbeing switched with an opposite polarity. This coupled withthe minor variation in harmonic performance for a nine bridgeper phase-leg H-StatCom means the difference in performanceis difficult to measure in the author’s experimental system.However in terms of the distortion introduced by the capac-itor balancing scheme the simulation results can be directlycompared to the experimental waveforms.

Fig. 12 shows the harmonic spectrum for the low voltageexperimental system when absorbing 200VARs capacitive.Fig. 13 shows the harmonic spectrum for the same system andoperational condition however for these results the H-bridgereferences are being modified to emulate the performance ofthe capacitor balancing scheme described in Subsection III-C.The modified balancing scheme that reverses the polarityof one capacitor within each phase leg is being used toevenly share the cluster voltages and avoid stability issues.However the effect on the harmonic performance of theoriginal balancing scheme is being measured by allowing thisscheme to attempt to re-balance capacitor voltages with a ±1%difference between the H-Bridges. In Fig. 13 the harmonicdistortion centered at 5kHz has increased by 285% (8.6V )over that shown in Fig. 12. For the same average differencein capacitor voltage, the PSC-PWM simulations indicate anincrease of 9.25V of distortion. The similarity of these valuesconfirms the simulation models and also confirms that theharmonic performance of the PSC-PWM scheme significantlydeteriorates even when correcting for a small average voltagedifference between capacitors.

VI. CONCLUSIONS & CONTRIBUTIONS

This paper has investigated the effects that practical imple-mentation issues have on the harmonic performance of PSC-PWM and SVM modulation strategies for a H-StatCom. The

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Figure 12. Experimental Results - FFT of the output H-StatCom voltage forthe PSC-PWM scheme.

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Figure 13. Experimental Results - FFT of the output H-StatCom voltagewith modified H-bridge references to demonstrate the effect of the balancingscheme.

paper has shown that:

• under ideal conditions (i.e. no voltage ripple, carrierphase shift and perfect capacitor voltage balancing) thePSC-PWM strategy is clearly superior with respect tothe trade-off between THD and switching frequency ascompared to a SVM based strategy;

• the performance of the PSC-PWM technique deteriorateswith variance in capacitor voltage ripple, phase-shifterror, and errors in the capacitor balancing;

• poor capacitor voltage balancing has the most significantinfluence on decreasing the THD of PSC-PWM relativethe SVM;

• for a 19-level H-StatCom SVM has a superior trade-offbetween THD and switching frequency compared to PSC-PWM when correcting for only a 2.5% variation in thevoltages on the capacitors; and

• the performance of the SVM strategy is independent ofthe amount of variation in the capacitor voltages.

The above results were confirmed by simulations and exper-imental studies on a 19 level (9 H-bridge per phase leg) H-StatCom.

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