imec 2009 1

The Role of European Research Institutes in the 450mm Wafer Transition ProcessIMEC nanoelectronics platformA Collaborative approach towards 450mm R&D IMEC

March 2009

imec 2009 3

Outline

• Introduction on IMEC & IMEC cooperation model

• Program Challenges in CMOS scaling

• Infrastructure @ imec: Today, and path into the future for 450mm

• European landscape 450mm

• Conclusions

Luc Van den hove imec 2008 5

Jan-02Jan-03Jan-04Jan-05Jan-06Jan-07Jan-08Jan-09Jan-10Jan-11Jan-12Jan-13Jan-14

Year of Production Start

Res

olut

ion,

"Sh

rink"

[nm

]

100

80

60

40

Logic

NAND Flash

DRAM

30

20

50

200

Relentless reduction of feature size“2D scaling”

Explosion of New Materials in Advanced Devices

Increased use of 3rd dimension“3D scaling”

Huge R&D challenge

Need for R&D has never been as highCost of R&D is rapidly increasing

CAGR semiconductor industry: 5-7%R&D cost increase per node: 20-30%

Outsourcing of R&Dto shared R&D platforms

Luc Van den hove imec 2008 6

Partnering for Cost-effective Research

World-wide

Centralized Research Platform

Foundries

MaterialSuppliers

RegionalGovernment Europe

EquipmentSuppliers

Logic IDM Memory IDM

FabliteFabless

Build critical mass

Share R&D cost

Luc Van den hove imec 2008 7

IMEC Partner Update 2009Q1

Luc Van den hove imec 2008 8

IMEC Partner Update 2009Q1

Partnerships in core Program IIAP’sThe World’s Largest Industry Commitment to Semiconductor Research in Partnership

LamRESEARCH

imec 2009 9

0

50

100

150

200

250

1985 1987 1989 1991 1993 1995 1997 1999 2001 2003 2005 2007

M€

Flemish Government Revenue (P&L)

Est

imat

ed for

2008

2008 revenue: 270 M€ (est.)

IMEC’s total revenue (P&L) versus research grant

44M€

270M€

Luc Van den hove imec 2008 10

Outline

• Introduction on IMEC & IMEC cooperation model

• Program Challenges in CMOS scaling

• Infrastructure @ imec: Today, and path into the future for 450mm

• European landscape 450mm

• Conclusions

Luc Van den hove imec 2008 11

time

Scaling

CMOS scaling

ArF + RET

ArF immersion

EUVL

DoublePatterning

Luc Van den hove imec 2008 12

Full field scanner plan

2006 2007 2008 2009 2010 2011

ASML XT:1250iNA=0.85

ASML EUVL α-tool, NA=0.25

Immersion

DPT

EUVL

Interference printer, NA>1.4

ASML XT:1250 dryNA=0.85

ASML XT:1700i, NA=1.2

IMEC intends to continue its leadership in advanced lithography, in immersion as well as EUV,

based on an “early tool” roadmap and proximity collaboration with ASML

ASML EUV Pre-Prod-Tool

ASML XT:1900i, NA=1.35

Luc Van den hove imec 2008 13

EUV lithography

Luc Van den hove imec 2008 14

ArF + RET

ArF immersion

EUVL

DoublePatterning

time

CMOS scaling

NiSi

25 nm

NiSi

25 nm

FUSI

strain

HfO2high -κ

metal gate

FinFET

USJ

Ge/IIIV

silicide

nanowires

graphene

Luc Van den hove imec 2008 15

ArF + RET

ArF immersion

EUVL

DoublePatterning

time

NiSi

25 nm

NiSi

25 nm

FUSI

strain

HfO2high -κ

metal gate

FinFET

USJ

Ge/IIIV

silicide

CMOS scaling

>=13090-65-45

45-32High-κ, Metal Gate

22-16

16 and beyond

nanowires

graphene

Non-planardevices

High-µ materials,

New devices

Strain, USJ

Luc Van den hove imec 2008 16

ArF + RET

ArF immersion

EUVL

DoublePatterning

time

NiSi

25 nm

NiSi

25 nm

FUSI

strain

HfO2high -κ

metal gate

FinFET

USJ

Ge/IIIV

silicide

CMOS scaling

>=13090-65-45

45-32High-κ, Metal Gate

22-16

16 and beyond

nanowires

graphene

Non-planardevices

High-µ materials,

New devices

Strain, USJ

32nm: High-k / metal gate integration

Lg=32nm

Gate first

8

10

12

14

16

18

20

22

24

26

28

30

32

34

1.E-10 1.E-09 1.E-08 1.E-07 1.E-06 1.E-05 1.E-04P static [W/stage]

Del

ay/s

tage

[ps]

FET65 (Poly/SiON)FUSI_HiKMIPS SMDD (Bulk Planar)MIPS pSMDD (Bulk Planar)

PMOSNMOS

pMOS

nMOS

RO (SMDD)

RO performance

Luc Van den hove imec 2008 17

ArF + RET

ArF immersion

EUVL

DoublePatterning

time

NiSi

25 nm

NiSi

25 nm

FUSI

strain

HfO2high -κ

metal gate

FinFET

USJ

Ge/IIIV

silicide

CMOS scaling

>=13090-65-45

45-32High-κ, Metal Gate

22-16

16 and beyond

nanowires

graphene

Non-planardevices

High-µ materials,

New devices

Strain, USJ

22nm: FinFET Device

Bulk FF10

SOI FF

poly-SiNiSi

Fin

50 nm

Luc Van den hove imec 2008 18

ArF + RET

ArF immersion

EUVL

DoublePatterning

time

NiSi

25 nm

NiSi

25 nm

FUSI

strain

HfO2high -κ

metal gate

FinFET

USJ

Ge/IIIV

silicide

CMOS scaling

>=13090-65-45

45-32High-κ, Metal Gate

22-16

16 and beyond

nanowires

graphene

Non-planardevices

High-µ materials,

New devices

Strain, USJ

New materials and devices will be needed

to continue the performance scaling

19Luc Van den hove

imec 2008

Spin-based probe memories

NVM Roadmap

NAND-Flash (FG)

Technology node F [nm]

Cell size[F2]

10

20

40

180 130 90 65 5x 3x

NOR-Flash (FG/NROM)

MRAM

FeRAM

PCM

RRAM?

2x4x 1x

niche and embedded applications

code

data

note: PCM may be applied in embedded applications as well (65nm)

evolutionary

disruptive

100

1

5 TANOS

Phase Change Memory

Most matureEmbedded memory - NOR replacement?

Resistive Switching RAM

OFF OFF →→ RRHighHigh ON ON →→ RRLowLow

Luc Van den hove imec 2008 20

time

NiSi

25 nm

NiSi

25 nm

FUSI

strain

HfO2high -κ

metal gate

FinFET

USJ

Ge/IIIV

silicide

CMOS scaling

nanowires

graphene

Low kk=3.0

Low kk=2.7

Low kk=2.5

3D SIP3D SIP

Air gap

3D TSV

CNT

Cu

Luc Van den hove imec 2008 21

3DIn

terc

onne

ct C

ompl

exity

3D Integration R&D Roadmap

ADVANCED

PACKAGING

AND

INTERCONNECT

Stacked-ICPackage

3D-SIP BGA

3D-SIP CSP

Face-to-Face Flip-Chip

Face-to-Face Micro-bumps

3D-WLP N-layer

3D-SIC 2-layer

Ultra-Thin-Chip Embedding

2-layer UTCS

N-layer UTCS

N-layer UTCS3D-WLP

3D-SIC N-layer

Chip-in-FlexUTCF

3DSIPDie-in-board

3D-WLP 2-layer Through-Si

N-layer UTCS3D-SIC

2005 200720062004 2008 2009

3D-WLP

3D-SIC

3D-SIP

2010

Research Roadmap

Landing die

1st stacked die

2nd stacked die

3rd stacked die

Carrier die

Landing die

1st stacked die

2nd stacked die

3rd stacked die

Carrier die

imec 2009 22

Universities

Global R&D platforms

Longer

ter

m,

man

y options

Short

er t

erm

, ap

plic

atio

ns

Tim

e f

ram

e

Lower HigherR&D cost

Industry

Shared R&D Platforms

Providing focus for universities and basic insight and solutions for industrial partners

imec 2009 23

Outline

• Introduction on IMEC & IMEC cooperation model

• Program Challenges in CMOS scaling

• Infrastructure @ imec: Today, and path into the future for 450mm

• European landscape 450mm

• Conclusions

imec 2009 24

One of the world’s most advanced state-of-the-art research facilitiesFully operational since July 2006 (~ 500M€)

imec 2009 25

IMECAMPUS

Total: 8000 m2 Clean Room

Clean Room 14800 m2 Clean Room1750 m2 Class 1200 mm pilot lineContinuous operation:

24hrs / 7 days

Clean Room 23200 m2 Clean Room300 mm pilot line Ball Room, Clean sub-FAB Continuous operation:

24hrs / 7 days

imec 2009 26

IMECAMPUS

Total: 8000 m2 Clean Room

Clean Room 23200 m2 Clean Room300 mm pilot line Ball Room, Clean sub-FAB Continuous operation:

24hrs / 7 days

300mmmost advanced

scalingR&D

imec 2009 27

IMECAMPUS

Total: 8000 m2 Clean Room

R&D and Prototyping

Facility

HeterogeneousSOC & SIP

Clean Room 14800 m2 Clean Room1750 m2 Class 1200 mm pilot lineContinuous operation:

24hrs / 7 days

imec 2009 28

R&D benefits from gradual transistionsexample: IIAP processing 200 > 300mm

imec 2009 29

An affordable path to 450 mm

• IMEC’s core competence is Process and Device R&D– using state-of-the-art processing equipment, including

several α- and β-type tools;– with world-class operational excellence (cycle time,

process quality, process stability, …)– with best-in-class fundamental research (materials

research, physical characterization, advanced electrical characterziation, …)

• IMEC plans to continue full integrated process R&D using its 300mm infrastructure during the following years and will therefore further expand its 300mm research infrastructure accordingly

• IMEC is also expanding its infrastructure to test early 450mm equipment, as soon as requested by its leading partners (preparing for partner pilot lines in 2012)

imec 2009 30

IMECAMPUS

Total: 8000 m2 Clean Room

FAB 14800 m2 Clean Room1750 m2 Class 1200 mm pilot lineContinuous operation:

24hrs / 7 days

FAB 23200 m2 Clean Room300 mm pilot line Ball Room, Clean sub-FAB Continuous operation:

24hrs / 7 days

Expansion projectClean room

Office building(First phase initiated)

imec 2009 31

Concept view

ExpansionBio-electronics Lab

Office BuildingExpansion Energy (PV) program

Expansion CMORE program

Expansion450mm test facility

imec 2009 32

An affordable path to 450 mm

• IMEC has received approval from the local government for financial support for FAB2 build-out on November 7th, 2008;

• Board approval was obtained on November 26th, 2008: IMEC will start construction in March 2009(Central Utility Building is available)

• Timing construction project:– Start engineering study: Jan 1, 2008– Start construction: March 2009– End construction: April 2010

imec 2009 33

Construction started on March 17th, 2009

imec 2009 34

IMEC Clean Room Extension

1000

5700

4200

4100

1600EUV tool height

Extension

1000 500

1000

2500

6001000

4500

900500

3900

300

5100

300

10900

Existing Building

300

2800

300

5800

Make Up Air duct

Plenum

Lab Cleanroom

2000

Option: Hoist in the corridor

clean elevator

Corridor - Steel Plattform

imec 2009 35

Jan 2008

An affordable path to 450 mm

2008

March 2009: Start construction

Mid 2010: Construction ready

Planning & decision processBuilding construction& Facility Preparation

2009 2010 20

imec 2009 36

An affordable path to 450 mm

2008

EngineeringPhase 1

EngineeringPhase 2

Building construction& Facility Preparation

2009 2010

300 mm process & device research

450mmModule 1

450mmModule 2

450mmModule 3

…

Generic 450 mm modules

20

imec 2009 37

3-phase program concept for worldwide cooperation towards viable 450mm…

2009 2010 2011 2012 2013 2014 20

Assumptions:

• Economical downturn will affect timeline;timeline will depend on initiative of key IC industry players;

• R&D should be ready to respond;

• More than ever, precompetitive R&D is best and most efficient to be done on a central location, shielded from development or production targets

• 450mm will require new models regarding infrastructure related cooperation; IMEC is interested to take part in this discussion

38Luc Van den hove

imec 2008

3-phase program concept for worldwide cooperation towards viable 450mm…

2009 2010 2011 2012 2013 2014 20

Program based 300/450 oriented cooperation with industrial partner (or JV, cluster…) and supporting governmentin locally hosted infrastructure

R&D in new dedicated 450mm infrastructure(EU, TW, JP, US…)

450mm R&D platformrequiring new concept -integrated cooperative program

300mm+ process & device research @ LeuvenIncluding build-up of Generic 450 mm modules

……

Leuven-based IMEC networkwith partners

IMEC CompanyA ?

IMEC CompanyB ?

Leuven-based IMEC networkwith partners

450mmfab with

interestedpartners

++

imec 2009 40

Outline

• Introduction on IMEC & IMEC cooperation model

• Program Challenges in CMOS scaling

• Infrastructure @ imec: Today, and path into the future for 450mm

• European landscape 450mm

• Conclusions

450mmViews from European R&D

42

Fraunhofer views

© CEA 2008. Tous droits réservés. Toute reproduction totale ou partielle sur quelque support que ce soit ou utilisation du contenu de ce document est interdite sans l’autorisation écrite préalable du CEAAll rights reserved. Any reproduction in whole or in part on any medium or use of the information contained herein is prohibited without the prior written consent of CEA

43

2007

450mm, Brussels - Dec. 19, 2008 - M Brillouët

2008

CEA-LETI & 450mm

Michel BRILLOUËT

© CEA 2008. Tous droits réservés. Toute reproduction totale ou partielle sur quelque support que ce soit ou utilisation du contenu de ce document est interdite sans l’autorisation écrite préalable du CEAAll rights reserved. Any reproduction in whole or in part on any medium or use of the information contained herein is prohibited without the prior written consent of CEA

44

2007

450mm, Brussels - Dec. 19, 2008 - M Brillouët

CEA-LETI ready to contribute in 450mm…

engineeredsubstrates devicesprocess applications

“independent”of wafer diameter

stronginvolvement

significantcontribution(esp. in FEOL

& ML2)

use for a laterdevelopment

phase

…when our industrial partners need 450mm

CEA-LETI active in the whole value chain

…whichtranslatesfor 450mm

in a…

© CEA 2008. Tous droits réservés. Toute reproduction totale ou partielle sur quelque support que ce soit ou utilisation du contenu de ce document est interdite sans l’autorisation écrite préalable du CEAAll rights reserved. Any reproduction in whole or in part on any medium or use of the information contained herein is prohibited without the prior written consent of CEA

45

2007

450mm, Brussels - Dec. 19, 2008 - M Brillouët

…with the associated research infrastructure

buildingsPresent200-300mmclean rooms

Potentialdoubling

Planned extensionfor large area substrates

© CEA 2008. Tous droits réservés. Toute reproduction totale ou partielle sur quelque support que ce soit ou utilisation du contenu de ce document est interdite sans l’autorisation écrite préalable du CEAAll rights reserved. Any reproduction in whole or in part on any medium or use of the information contained herein is prohibited without the prior written consent of CEA

46

2007

450mm, Brussels - Dec. 19, 2008 - M Brillouët

…as a part of the project

3,500 → 6,000+ m² clean rooms

imec 2009 47

Outline

• Introduction on IMEC & IMEC cooperation model

• Program Challenges in CMOS scaling

• Infrastructure @ imec: Today, and path into the future for 450mm

• European landscape 450mm

• Conclusions

© CEA 2008. Tous droits réservés. Toute reproduction totale ou partielle sur quelque support que ce soit ou utilisation du contenu de ce document est interdite sans l’autorisation écrite préalable du CEAAll rights reserved. Any reproduction in whole or in part on any medium or use of the information contained herein is prohibited without the prior written consent of CEA

48

2007

450mm, Brussels - Dec. 19, 2008 - M Brillouët

450mm sets forNew Cooperation models

View from European R&D on 450mm

R&D institutes are preparing to be ready will carefully listen and interact with industry

for timelines and priority setting

R&D institutes discuss cooperation Will share key infrastructure

and run complementary programs

R&D institutes have role for local industry To help European semiconductor industry in their strategy

to be part of worldwide 450mm effort when it happens

R&D institutes will strive for efficiency Via efficient R&D models

combining 300mm/450mm

imec 2009 49

Concept view

450mmREADY

imec 2009 50