CHARACTERIZATION OF p++ LAYER FABRICATION USING A LIQUID SOURCE FOR MEMS APPLICATIONS . .

C. Iliescu', M. Avram', J. Miao', F. E. H. Tay'.4

'Institute of Bioengineering and Nanotechnologies- 51 Scinece Park Road, 117586 Singaporc E-mail: ci1iescu~ihn.a-star.edu.sg

'National Institute tor Research and Development in Microtechnologies P.O.Box 38-160, Bucharest, Romania, Fax: 40.21.4908238, Tel.: 40.21,4908412

'Nanyang Technological University, Singapore 'National University of Singapore

Abstract-This paper presents the fabrication of boron etch stop layerusing spin on dopants and its applications in MEMS: thin diaphragm, cantilevers fabricated by surface and bulk micromachining process. The doping profile was simulated using T- Supreme4. The stress induces in this layer was analyzed using a TENCOR stress measurement. In addition, the surface roughness was measured by AFM analysis. Diaphragms and cantilevers (fabricated using bulk and surface micromachining) were successfully processed using etch-stop techniques. Keywords: SOD, etch-stop, diaphragms, can tilevers

1. INTRODUCTION A large number of MEMS devices base

their operation on thin diaphragms or cantilevers fabricated by bulk or surface micromachining. For such structures, a very common technique is the formation of a very thin doped boron layer (known also as p++ layer) acting as an etch-stop layer in etching solution like KOH [ l ] and EDP [2]. In this way, structures with very precise and uniform thickness can be obtained.

The application of this layer in pressure sensors [3] for a good definition of diaphragm thickness or to performed a sealed cavity [4] or inkjet dispenser [5] is well documented. p++ diffusion for the bottom plate of a capacitive microphone is presented in [6]. Microchannels fabricated in

0-7803-7821-0/03/$17.00 0 2003 IEEE

glass sealed by anodic bonded p++ layer are presented in [7].

2. EXPERIMENTAL DETAILS Our experiments were carried out using

4-inch silicon wafers, n type, <loo> crystallographic orientation with a resistivity of 1-10 Qcm.

For boron doping layer a liquid source B200 from Filmtronics was used. First, the wafers were cleaned in piranha (2:l H$04: H202) for 20 minutes at 12OoC, followed by DI water rinse and spin dry. For removing the thin silicon oxide layer a short etching 30 sec in BOE (1:6 H F NHd:F?) was performed. Before spin coating with spin-on dopant (SOD) solution the wafers were hard baked in an oven at 12OoC in an N2 environment.

The liquid source was applied (3 ml) on the wafer using a CEE spin coater at 500 rpmR sec and then 3000 rpm/lSsec. After this process a very uniform layer was obtained. The bard backing of this layer was processed at 135OC for 15 minutes. The diffusion was processed with a TYSTAR furnace at a temperature of 1 15OoC for 1 to 5 hours in a Nz (75%)/02 (25%) environment. After diffusion the boron source was removed in a solution of HF 40%. The measured resistance after diffusion was in the range of 1.8-0.8 R/ .

The anisotropic etching for bulk and surface micromachining was performed in

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30% KOH (2000g KOH, 5400 nil DI H20 solution, 250 ml IPA) in a controlled temperature bath.

3. SIMULATION RESULTS The results of simulation, using T-

Supreme4 software, of boron diffused layer at I 150°C for 3 hours, in <loo>, n type; 1 Qcm silicon wafer is presented in Fig. 1.

1 t

*.a1 1 .s +.II 1.M 1.- OI.4mCt I”,&”.>

Fig. 1. Simulation of diffused layer using T-Supreme4

Figure 2 presents the variation of “etch- stop” layer with the diffusion time (for 1 to 5 hours) at 1 lSO°C. More:profound layers can be also obtained by changing the diffusion temperature at 1 2 0 0 ~ ~ .

0 1 2 3 4 5 6

lu ls

Fig. 2. Variation of the thickness of etch-stop layer with the diffusion time. .

4 STRESS MEASUREMENT For most of diaphragms and cantilevers

applications, residual stress is a very important factor. High value of stress can break the thin structure or can affect the performances of the MEMS device. The

measurement of stress in the boron-doped layer was performed using TENCOR stress measurement equipment. First, the wafer was measured (radius and bow). After diffusion another measurement was performed. In the annealing process the back of the wafers will also be doped. To remove the stress effect of this layer and to achieve more accuracy results, a thin layer of 3 p m was etched from the back of the wafers in a classical HF/HN03/CH3COOH solution. The measurements performed on 5 wafers indicate a very low stress value: 20-35 MPa tensile.

3. rlOUGHNESS OF THE SURFACE

The roughness of the surface was analyzed using AFM (see Fig. 3). A very high value of roughness was obtained Ra=13.87 nm. This high value of roughness was also reported in [ 5 ] where the SOD Boronfilm 100 from Emulsitone was used, i t seems to be a characteristic of high doped diffusion from a liquid source.

Fig. 3. Surface profile observed using AFM (R,= 13.871nm).

Fig. 4. Surface profile (deepest pit with a depth less than 1.5pm).

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Figure 4 presents the surface profile. The sui~l'ke presents some deep pits with maximum depth of 1.5pm.

6. DIAPHRAGM FABRICATION The low stress value allowed us to use

this layer for conductive diaphragm fabrication, with potential application on silicon capacitive microphone. Square size diaphragm of 1.4, 1 and 0.7 mm was fabricated with diaphragm thickness of 3 and 5 pm. On the diffused wafers a &NI- LPCVD layer of 250 nm was deposited in a TYSTAR furnace. The mask was patterned using classical plasma etching on Micro-RE eqtiipment (from Technics) in a CFdO? environment at 350 W and a pressure of I50 mTorr. The etching was performed in KOH solution at 9OoC till we reach a thickness around 20-40 pm. After removing the nitride layer in H#O4 at 16OoC from the front of the wafer the process was continued at 6OoC. A very uniform diaphragm was obtained. No bulking of membrane was observed. A SEM image of a 5 pm p++ silicon diaphragm is presented in Fig. 5.

. .

Fig. 5. 5 pm p++ diaphragm.

7. SURFACE MICROMACHINING OF SILICON CANTILEVER

Another application of the silicon layer may be the silicon conductive cantilever. For this application a cantilever with 100 pm length and 50 pm width was fabricated using surface micromachining.

First a deep R E process in SF6/01 w a s performed using a 2pm thick photoresist mask (AZ7200). The deep etching was around 50pm. After removing the mask a KOH etching for 1.5 hours at 70°C was performed. The result is presented in Fig. 6.

Fig. 6. Canlilever ihbricated by surface iiiicrom:luh~ning.

The surface micromachining of cantilevers had some limitation due to the big volume of silicon, which intist be removed in the anisotropic etching process. The cantilever presented in Figure 6 is IOOpm by 50pm.

8. FABRICATION OF CANTILER USING BULK MICROMACHINING

For large cantilevers a bulk fabrication process is required. A fabrication process of cantilevers using bulk micromachining is presented in Figure 7. After the processing of p++ layer as previously described, a SilN4 - LPCVD low stress layer was grown on the wafer surfaces using a TYSTAR furnace, al 800°C, in SiH4 and NH3 solutions. This layer was used as mask for a 50-pm- dia hragm generation in KOH solution at 90 C. After removing the nitride layer in H@O4 at I 6OoC, a deep RIE process (1 5 pm deep) in SF6/02 was performed from the front surface. The last step was an anisotropic wet etching with stop on the boron layer, processed in KOH at 60°C. The process was performed with high efficiency.

B

283

.- Si3N4

-Si ‘Pi+

h n

d

FiC. 7. Fabrication process of bulk cantilever: a) deposition of Si?Nd-LPCVD on the wafer with p++ layer, b) anisotropic etching in KOH c).deep RIE d) removing of SilN, e) short time anisotroping etching.

Figure 8 presents a cantilever 2000pm x IOOOpm x 4pm fabricated using bulk micro- machining.

Fig. X. Cantilever fabricated using bulk micromachining proccrs.

9. DISCUSSIONS AND CONCLUSIONS Fabrication of MEMS structures such as

diaphragms and cantilevers using SOD solutions and etch-stop techniques have some major advantages: a very simple process, good uniformity of the achieved resistivity, uniform thickness of the doped layer. The process can be very easily simulated with the existing software and it is

a good correlation between the simulation and the experimental results.

The main disadvantage is the relatively high value of roughness of the doped surface.

The P++ layer has a huge potential application in MEMS field due to its property: etch stop layer for anisotropic etching, conductive and low stress layer, and, what makes it more suitable for application with diaphragm and cantilever, is that it can be deformed till 6OO0C without hysteresis (silicon propriety).

References

[I] H. Seidel, L. Csepregi, A. Heuberger, A. Baumgartel. “Anisotropic etching of crystalline silicon in alkaline solutions”, J . Electrocheni. Soc., 137 (1 I ) , pp. 3612- 3632, 1990.

[2] A. Borg, “Ethylene diaminie-pyrocathecol- water mixture shows etching anormally in boron-doped silicon” J. Electrochem. Soc., 118(11),pp.401402, 1971.

[3] M. Elwenspoek, R. Wiegerink “Mechanical Microsensors”, pp 107-1 12.

[4] M. Esashi, S. Sugiyama, K. Ikeda, Y. Wang, H. Miyashita “Vacuum sealed silicon micromachined pressure sensors” Proc. IEEE, 86 (8), pp.1627-1639, 1998.

[5] C. Meinhart, H. Zhang, “The flow structure inside a microfabricated inkjet printhead”, J. A4icroniech. Sys, 9 ( I ) , pp. 67-75. A.E. Kabir, et a1,”High sensitivity acoustic transducers with thin p+ membranes and gold back-plate” Sensors and Actiinrors, 78, pp, 138-142, 1999. P.V. Rainey, H. Zhao, S.J.N. Mitchel, H.S. Gamble “Boron etch stop for MEMS applications” Proc. MME’02, Sinaia, pp. 75-79,2002.

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