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VLSI PROJECT TITLES 2015-2016

S.NO PROJECT TITLE

1A Spread Spectrum Clock Generator Using a Programmable Linear

Frequency Modulator for Multipurpose Electronic Devices

2Floating-Point Butterfly Architecture Based on Binary Signed-Digit

Representation

3 Further Desensitized FIR Halfband Filters

4A Modified Partial Product Generator for Redundant Binary

Multipliers

5Implementation of Arithmetic Operations with Time-free Spiking

Neural P Systems

6A Clock and Data Recovery Circuit With Programmable Multi-Level

Phase Detector Characteristics and a Built-in Jitter Monitor

7 Unfaithful Glitch Propagation in Existing Binary Circuit Models

8Early Skip Mode Decision for HEVC Encoder With Emphasis on

Coding Quality

9Two-Step Optimization Approach for the Design of Multiplierless

Linear-Phase FIR Filters

10 Energy Consumption of VLSI Decoders

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11Timing Error Tolerance in Small Core Designs for SoC

Applications

1240-Gb/s 0.7-V 2:1 MUX and 1:2 DEMUX with Transformer-

Coupled Technique for SerDes Interface

13 Design and Analysis of Inexact Floating-Point Adders

14In-Field Test for Permanent Faults in FIFO Buffers of NoC

Routers

15Low-Cost High-Performance VLSI Architecture for Montgomery

ModularMultiplication

16High-Speed and Energy-Efficient Carry Skip Adder Operating

Under a Wide Range of Supply Voltage Levels

17Dual-Phase Tapped-Delay-Line Time-to-Digital Converter With

On-the-Fly Calibration Implemented in 40 nm FPGA

18A Low Power and High Sensing Margin Non-Volatile Full Adder

Using Racetrack Memory

19Signal Design for Multiple Antenna Systems With Spatial

Multiplexing and Noncoherent Reception

20 Synthesis of Genetic Clock with Combinational Biologic Circuits