A hybrid Push-Pull Converter with Series-Parallel Structure in the Primary Windings

Hui Chen1, Xinke Wu1 and Fang Z.Peng2 1.College of Electrical Engineering, Zhejiang University, Hangzhou 310027, China

2.Department of Electrical and Computer Engineering, Michigan State University, East Lansing, MI 48824, USA E-mail: wuxinke@zju.edu.cn

Abstract— This paper describes a hybrid current-fed push-pull converter with wide input voltage range and low input current ripple for voltage step up applications. With the proposed topology the primary windings of the transformers work in series when the input voltage is high, and in parallel when the input voltage is low. In this way, the conversion gain of the converter is extended, which makes this topology suitable for wide input voltage range applications. Meanwhile, interleaved operation reduces the current ripple in the input filter and minimizes the current sharing problem. Design procedures and parameters are introduced, and a prototype with 20-75V input voltage and 200 V/2.5 A output was built to verify the analysis.

I.INTRODUCTION With the fossil fuels running out on earth, the development

of the clean power sources and electricity has become an urgent topic to overcome the energy crisis and to protect the environment. Fuel cells (FCs) are considered a promising technology to solve these problems. They are free of pollution emission, with higher efficiency and lower device noise than any conventional power plant[1]. The DC voltage generated by the fuel cell stacks varies in wide range(2:1) and low in magnitude (typically <60 V for a 5-10 kW system) [2]-[3]. It provides a continuous power supply and slow in dynamics. So a voltage step-up dc–dc conversion stage with wide input range and small input current ripple is essential for generating a higher regulated dc voltage (typical 400V for 220V AC voltage or 200V for 110AC application).

The isolated current-fed push-pull converters are desirable for this voltage step up application for the following traits[5]: (1) push-pull topology has only a single device voltage-drop on the input side, it is attractive especially when the input voltage is very low and current is high; (2) power flow is nearly continuous at the input side, keeping the peak current down to a reasonable level; and (3) output filter inductor is not required and it saves a lot volume when output voltage is high. However, a conventional current fed push-pull converter is not very appropriate for the wide input range application for the duty cycle is limited (D>0.5 for current fed type). [6] and [7] demonstrate a concept of employing a coupled inductance to add an extra recharging circuit when duty cycle is small and these converters work in buck and boost mode when input voltage varies. The problem is that, the magnetic element design will become a big challenge in high power application. [8] proposes a hybrid converter that when the input voltage ranges, the circuit structure changes to meet the conversion gain requirement, however the control is much too

complicated and efficiency is limited. [9] introduces a multi-phase interleaved push-pull converter for the high power application, but the boost of voltage requires high turn ratio of transformer which will result in larger parasitic capacitance and leakage inductance, and the input current is not continuous, which makes it inappropriate for fuel cell application.

This paper proposes a new hybrid push-pull converter for wide input voltage range and high output voltage application. It combines two basic push-pull converter cells and two extra switches in a symbiotic setting, where current sharing and demagnetization are realized naturally. Close observation indicates that the proposed converter has the following features.

1) The series-parallel regulated structure increases the conversion gain and expands the input voltage range, making the proposed structure feasible for extra wide input range application.

2) The input current ripple through the input inductor is greatly reduced because of the interleaving control scheme, it also decreases the magnetic loss and minimizes the volume of magnetic elements.

3) No additional control is needed in the proposed converter and it achieves current sharing naturally.

All these features suggest that the proposed circuit is suitable for extra wide input voltage, high power density, small input current ripple and high output voltage application.

Fig.1. Schematic of the proposed hybrid push-pull converter

ILin

Lin

*

··

*

VinQ1 Q2 Q3 Q4 Q5 Q6

* ·

· · ·

·

·

· ·

·

·

· · · ·

·

·

D1

D2

D3

D4

D5

D6

D7

D8

T1

T2

C0 R0

Q7

·

a

b

Vab

Lm1

Lm2

978-1-4673-0158-9/12/$31.00 ©2012 IEEE 58

II.CIRCUIT DESCRIPTION AND ITS OPERATION PRINCIPLE Fig.1 shows the schematic of proposed hybrid push-pull

converter, which is composed of two push-pull converter cells: one of them consists of Q1, Q4, T1, D1, D2, D3 and D4,and the other consists of Q2, Q5, T2, D5, D6, D7and D8. Three auxiliary switches Q3, Q6 and Q7 are used for series connection. The input inductor Lin is shared by two cells, and the primary side of T1 and T2 are series-parallel connected as Fig.1 presents. The output full-bridge rectifiers are parallel connected. In this fashion, the input current is equally shared by two cells. Two auxiliary switches, Q3 and Q6, and proper driving scheme provide the series connection and demagnetizing path for the corresponding cells.

The switch Q1 and Q4, Q2 and Q5 are driven with 180o phase shift, and two push-pull cells work with 90o phase shift. Q3, Q6 and Q7 are logically derived from the previous four signals as depicted in Fig.2 and Fig.3. It is assumed that the converter works in CCM mode and the input inductance is large enough so the current ripple is neglected in following analysis. With corresponding driving signals, the converter has two different operating duty cycle ranges(D<0.25 and 0.25<D<0.5). Under each case, one switching period can be divided into several stages.

Case1 (D<0.25):

In this case, the input voltage Vin is bigger than nVo, where Vo is output voltage. The equivalent circuits of different stages of one switching cycle in this case (D<0.25) are shown in Fig.4.

Stage 1[t0-t1]:At t0, switch Q1 turns on while others are off, the energy from the input source charges the inductor and also transfers to load through T1. Therefore, transformer primary winding voltage VT1p is positive and the value is nVo, the input

current of the Lin increases. The magnetizing current of T2, iLm2, is positive and goes through freewheeling diode of Q3. The voltage of T2 is clamped to zero,keeping iLm2 a constant.

Stage 2[t1-t2]: At t1, Q1 turns off, Q3 turns on and connects primary side of T1 and T2 in series. The input energy and the energy stored in the inductance transfer to load through T1 and T2. The current of Lin decreases during this stage.

Stage 3[t2-t3]: At t2, Q3 turns off and Q2 turns on, the energy transfers to the load through T2. The magnetizing current charges the parasitic capacitor of Q3, the voltage of Cq3 increases from zero to nVo, Vcq3 is presented as:

3

( 1 )( ) loadcq

i sin t LCV tC LC

⋅ ⋅= (1)

iLoad is the current flowing through the switch when Q3 is on. This stage ends at t3 when the voltage of Cq3 reaches nVo.

Stage 4[t3-t4]: When the voltage of Cq3 exceeds nVo, the freewheeling diode of Q4 turns on and clamps the primary voltage of T1 to nVo.

Stage 5[t4-t5]:The same to stage 2.

Stage 6[t5-t6]:At t5, Q3 turns off and Q4 turns on. Primary side voltage of T1 is clamped to nVo and the magnetizing current of T1 increases from a negative value. The magnetizing current of T2 is reflected and goes through freewheeling diode of Q6. Q4 and Q6 clamp the primary voltage of T2 to zero, which is similar to stage 1. The magnetizing current of T1 reaches zero at t6. After t6, the operating stage is symmetric to Stage 1, and another half period begins. According to the volt-second balance of input inductor Lin in one switching cycle, the steady state gain can be obtained as equation(2):

( ) (0.25 ) ( 2 ) 0s in o in oDT V nV D V nV⋅ − + − ⋅ − = (2)

VgQ1 VgQ4 VgQ1

VgQ5

0

0

0

VgQ5

0

nVo

0

0

DTs

iin

LK1i

iLK2

VLm2

VLm1

VgQ7

VgQ2

0.25Ts

0.5Ts

t0 t4 t5t1 t2 t3

0

0

0

nVoVab

t6 Fig.2.Operation of the proposed converter when D<0.25 Fig.3.Operation of the proposed converter when D>0.25

59

Case2 (0.25<D<0.5):

When D>0.25, the input voltage Vin<nVo. The equivalent circuits of different stages when D>0.25 are shown in Fig.5. A half period can be simplified and divided into 5 stages.

Stage 1[t0-t1]: At t0, Q1, Q5 and Q7 are on, the inductor is charged by the input source directly, and the primary of the T1 and T2 is clamped to zero. The input current increases. The output capacitance is large enough that the load is supported by the output capacitor.

Stage 2[t1-t2]: Q5 and Q7 turn off at t1, and Q1 keeps on. The input energy and the energy stored in the inductor transfer to load through T1 during this stage. Meanwhile, the magnetizing current of T2 is positive and the reflected current goes through freewheeling diode of Q3, which clamps the primary side voltage of T2 to zero.

Stage 3[t2-t3]: At t2, Q2 and Q7 turn on and Vin charges the input inductor directly, this stage is similar to stage 1. This stage ends at t3 when Q1and Q7 turn off.

Stage 4[t3-t4]: Q1 and Q7 turn off at t3 and Q2 remains on, the magnetizing current of T1 charges the parasitic capacitor of Q3, which is the same as stage3 of Case 1. The voltage of Cq3 increases from zero to nVo, and this stage ends when Cq3 reaches nVo at t4.

Stage 5[t4-t5]: When the voltage of Cq3 exceeds nVo, the magnetizing current of T1 goes through the freewheeling diode of Q4 and clamps the primary side voltage of T1 to zero.

After t5, the operating stage is symmetric to stage 1, and another half period begins.

According to the volt-second balance of input inductor Lin in one switching cycle, the steady state gain of the proposed converter can be derived in (3).

( 0.25) (0.5 ) ( ) 0s in s in oD T V D T V nV− ⋅ + − ⋅ − = (3)

III.CHARACTERISTIC AND DESIGN CONSIDERATION The discussion in previous sections indicates that the

proposed converter has unique architecture and operational time sequences, which brings some specific characteristics. For better understanding of these features, the design considerations are discussed and analyzed below.

A. Conversion Gain and Turn Ratio Of Transformer Since switching transition intervals are much shorter than

the on time and off time in one switching cycle, they can be neglected in analyzing the DC characteristics of the proposed converter. Based on this simplification, the conversion gain of different duty cycle in overall input voltage range can be derived from (2) and (3), which can be expressed as:

ILin

Lin

*

··

*

VinQ1 Q2 Q3 Q5 Q6

* ·

· ·

·

·

· ·

·

·

· · ·

·

·

D1

D2

D3

D4

D5

D6

D7

D8

T1

T2

C0 R0

Q7

·

·

·

Q4

Stage1 Stage2

ILin

Lin

*

··

*

VinQ1 Q2 Q3 Q4 Q5 Q6

* ·

· ·

· ··

·

D1

D2

D3

D4

D5

D6

D7

D8

T1

T2

C0 R0

Q7

Stage1 Stage2

Stage3

ILin

Lin

*

··

*

Vin

Q1 Q2 Q3 Q4 Q5 Q6

* ·

· · ·

·

·

· ·

·

·

· · · ·

·

·

D1

D2

D3

D4

D5

D6

D7

D8

T1

T2

C0 R0

Q7

·

Stage4

ILin

Lin

*

··

*

VinQ1 Q2 Q3 Q4 Q5 Q6

* ·

·

D1

D2

D3

D4

D5

D6

D7

D8

T1

T2

C0 R0

Q7

·

·

Stage3 Stage4

Stage5

ILin

Lin

*

··

*

VinQ1 Q2 Q3 Q4 Q5 Q6

* ·

· · ·

·

·

· ·

·

·

·

·

·

D1

D2

D3

D4

D5

D6

D7

D8

T1

T2

C0 R0

Q7

·

Stage6

Stage5

Fig.4.Equivalent circuits of the proposed hybrid push-pull converter when D<0.25

Fig.5.Equivalent circuits of the proposed hybrid push-pull converter when D>0.25

60

1( )2 (1 2 )

o

in

VM DV n D

= =⋅ −

(4)

where D is the duty cycle of the switch Q1 and n =Np:Ns is the turn ratio of the transformer. And the turn ratio here is given as:

4 (0.5 - ( 2 ) 4 (0.5 -in_min in_min

max o F o max

V Vn =D ) V V V D )

≈⋅ + ⋅ ⋅

(5)

Where the VF is the forward voltage drop of the rectifying diode and Vo is the output voltage. Compared with the conventional two-phase current fed push-pull converter and other current fed wide range push-pull converters[6][7], the propose converter has a larger voltage gain.

Fig.6. Conversion gain comparison

Fig.6. depicts the gain curve of three types of converters, and it shows superiority of the proposed converter over other two structures mentioned in section I. The conventional current fed push-pull converter has a limited duty cycle (0.5<D<0.75) and the voltage range is limited. The buck-boost type push-pull converter in [7] improves the conventional push-pull converter and expands the conversion gain range. Compared with these two converters, the proposed converter has a higher step up gain, so the turn ratio of the transformer can be minimized, which leads to a smaller average current of the primary winding.

B. Input Inductance and Input Current Ripple Since the proposed converter has two operating cases

according to the different duty cycle, it should be analyzed separately. Considering case 1 and case 2, the current ripple can be expressed as (6) and the conventional and buck-boost type are given as (7) and (8):

( )

( 0.25)

in o s

inin

in s

in

V nV DT when D < 0.25LI

V D T when D > 0.25L

− ⋅⎧⎪⎪Δ = ⎨ ⋅ −⎪⎪⎩

(6)

( 0.5)in sin

in

V D TIL

⋅ −Δ = (7)

(0.5 )

( 0.5)

o s

inin

in s

in

nV D T when D < 0.5LI

V D T when D > 0.5L

⋅ −⎧⎪⎪Δ = ⎨ ⋅ −⎪⎪⎩

(8)

Fig.7 describes the comparison of the input current ripple between the proposed converter and the conventional ones with the same input inductance (Lin=30uH), and the ripple is in function of the input voltage. The conventional one is depicted in blue line, in order to cover the input range, the turn

ratio is doubled and current ripple is the largest; the buck-boost type converter can expand the conversion gain, but obviously, the current ripple of the proposed converter is much lower. This feature helps to reduce the power loss of the input filter, making the proposed converter feasible for the continuous power flow application, like FCs. What's more, the reduction of current ripple leads to the minimization of the volume of input inductance. Under the same standard of input current ripple, for instance, 5%, the volume of the input inductance Lin of the proposed converter can be reduced by 50% around. At the point where Vin=nVo, the ripple can even reach zero, which makes the proposed converter very attractive at some applications where ripple is strictly controlled

Fig.7. Current ripples of the proposed combined forward converter and the parallel combined converter

C. Voltage Stress Of Switches and Diodes The primary voltage stresses of switches are determined by

the turn ratio and the output voltage. The voltage stresses of the switches in the proposed converter are given in (9). When the input voltage is high (As case 1, D<0.25, two push-pull cells connect in series), the voltage across Q6 or Q3 will be higher because of the self-coupling of the center tapped transformer. When the input voltage is low, the duty cycle is larger than 0.25, Q7 works while Q3 and Q6 keeps off, it keeps the voltage stress of other switches in a relatively low level, which is 2nVo.

33 0.254 (0.5 -

i=1,2,4,52 0.25

2 (0.5 -

4 0.25(0.5 -

i=3,62 0.25

2 (0.5 -

22 (0.5 -

in_mino

maxQi

in_mino

max

in_mino

maxQi

in_mino

max

in_mino

Qi

VnV DD )

VVnV D

D )VnV D

D )V

VnV DD )

VnVD

V

⋅⎧ = <⎪ ⋅⎪= ⎨⎪ = >⎪ ⋅⎩⎧ = <⎪⎪= ⎨⎪ = >⎪ ⋅⎩

=⋅

= 0.25

i=7 0.25

4 (0.5 -

max

in_mino

max

D)

VnV DD )

⎧ <⎪⎪⎨⎪ = >⎪ ⋅⎩

(9)

The voltage stress of Q1, Q2, Q4, Q5 can be a little bit lower than that conventional converter. Since the voltage gain of this converter is larger than conventional one, the turn ratio is smaller for a specific Vin and Vout, thus, the voltage stress of those switches are relative lower.

61

The voltage stress of the diodes in the second winding is equal to the output voltage, as there is no output filter inductor, and the structure on the second winding is full bridge rectifier. The voltage stress is equal to the output voltage, which is expressed as (10)

i=1,2,3,4,5,6,7,8Di oV V= (10)

IV.EXPERIMENT VERIFICATION A prototype of the proposed hybrid push-pull converter

was built to verify the theoretical analysis, as Fig.8 presents. The input voltage is from 20V to 75V and the output is 200V/2.5A. The switch frequency is 100kHz. The turn ratio of transformer is designed according to input and output voltage range. The maximum voltage across its secondary winding is determined by the maximum input voltage, and the average current depends on the load and the maximum duty cycle. As analyzed above, when interleaving control strategy is adopted, the input inductance can be reduced 50% under the same input current ripple requirement. A conventional two phase interleaved push-pull converter was also built for comparison. The key parameters of the proposed converter and conventional prototype are listed in the table 1.

Table.1 key parameters of the prototypes

Proposed Conventional Q1,Q2,Q4,Q5,Q7 IRF250 STW45NM50

Q3,Q6 STW45NM50 ---------- Recitfier diodes MUR840 MUR840

Transfomer core PQ32/30 PQ32/30 turn ratio 4:4:16 4:4:8

Lm 70uH 70uH Lk 0.1uH 0.1uH

Input inductance 30uH 60uH

Fig.9 shows the driving signal Vgs waveforms of the proposed converter. (a) is the gate to source voltages Vgs of main switches Q1,Q2 and Q3 when D<0.25, and Q4, Q5 and Q6 are the same but with half cycle time delay. (b) shows the Vgs of Q1, Q2 and Q7 when D>0.25. In this case, Q3 and Q6 keep off, so they are not shown here.

Fig.10 shows the voltage of one terminal of input inductor, Vab, as Fig.1.shows, at different duty cycles. They are identical to the theoretical waveforms in Fig.2 (D<0.25) and Fig.3 (D>0.25) respectively. The driving signals of Q1 and Q4 are presented in Fig.10 too.

Fig.11 presents the measured waveforms of the second windings of two transformers at different cases. The parasitic capacitor Cds of Q3 and Q6 is relative larger when Vds is low, so the time of stage 3 of case 1 lasts much longer than analysis in section II. Just as the analysis in sectionII, the waveforms are neither identical nor symmetrical because of the current commutation influence, but this process involves very little energy and has no influence on to the energy transferring to the load.

Vgs1:10V/div

Vgs2:10V/div

Vgs3:10V/div

DTs 0.5Ts

(a)D<0.25 (b)D>0.25

Fig.9 measured drive signal Vgs waveforms of switches when D<0.25

(a)D<0.25 (b)D>0.25

Fig.10 measured drive signal Vgs waveforms of switches when D>0.25

(a)D<0.25 (b)D>0.25

Fig.11. Measured voltages the second winding of transformer Vt1s and Vt2s when Vin=60, D<0.25

Fig.8. A 500W proposed hybrid push-pull converter

62

(a) the efficiency when Vin=70V(D<0.25)

(b) the efficiency when Vin=20V(D>0.25) Fig.12 Measured Efficiency for the proposed converter at varied loads

Fig.12 presents the measured efficiency of the proposed converter under different input voltages and varied loads. The efficiency of conventional two-phase push-pull converter is also given as comparsion.

V.CONCLUSION A hybrid push-pull converter with series-parallel regulated

input and parallel output connection is proposed in this paper. The theoretical analysis indicates that the proposed converter can work under extra wide input voltage range, low input current ripple and voltage step up application. In addition, series-parallel regulated input and parallel output connection can distribute the power losses and thermal stresses of the switches, transformers and rectifiers evenly. Furthermore, the structure and operation time sequences reduce the input current ripple through the inductor. All these features make the proposed topology superior for DC/DC conversions with wide range input voltage, low input current ripple, high output voltage and high power density application.

The experimental results from a 500 Watts (200V/2.5A), 100 kHz prototype verify the theoretical analysis of the proposed topology.

ACKNOWLEDGMENT This work is supported by Natural Science Foundation of

China under Grant NSFC51007081.

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[5] Ryan, M.J., et al. "A new ZVS LCL-resonant push-pull DC-DC converter topology". in Industry Applications Conference, 1997. Thirty-Second IAS Annual Meeting, IAS '97., Conference Record of the 1997 IEEE. 1997.

[6] Ruiz-Caballero, D.A. and I. Barbi, "A new flyback-current-fed push-pull DC-DC converter". Power Electronics, IEEE Transactions on, 1999. 14(6): p. 1056-1064.

[7] Albrecht, J.J., J. Young and W.A. Peterson. "Boost-buck push-pull converter for very wide input range single stage power conversion". in Applied Power Electronics Conference and Exposition, 1995. APEC '95. Conference Proceedings 1995., Tenth Annual. 1995.

[8] Guo, R., Z. Liang and A. Huang, "A multi-modes charge-pump based high efficiency wide input range DC-DC converter". Energy Conversion Congress and Exposition (ECCE), 2010 IEEE, 2010.

[9] Jianqiang, W., L. Jingxin and Z. Weige. "Interleaved push-pull converter with very low input and high output". in Power Electronics and Intelligent Transportation System (PEITS), 2009 2nd International Conference on. 2009.

[10] Xinke Wu, Junming Zhang, Guoliang Wu, Zhaoming Qian, "High Efficiency Phase-shift Controlled Hybrid Full Bridge DC Bus Converter" In Proc. IEEE Applied Power Electronics Conference and Exposition (APEC), 2006 pp 1333-1338.

[11] Xinke Wu, Wei Lu , Junming Zhang, Zhaoming Qian, "Extra Wide Input Voltage Range and High Efficiency DC-DC Converter Using Hybrid Modulation", In Proc. IEEE 41st Annual Industry Applications Conference (IAS), 2006 . pp. 588-594.

[12] Zhang, Z., et al., "Analysis and Design of a Bidirectional Isolated DC-DC Converter for Fuel Cell and Super-Capacitor Hybrid System". Power Electronics, IEEE Transactions on, 2011. PP(99): p. 1-1.

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50 100 150 200 250 300 350 400 450 500

proposed converterconventional converter

Output Power (W)

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