[ieee 2012 13th international conference on electronic packaging technology & high density...

Experimentally Validated Analysis and Parametrie Optimization ofMonotonic 4-point Bend Testing of Advanced BGA Packages

Qiang Wang, Weidong Xie, Mudasir Ahmad Cisco Systems, Inc.

900 Yishan Lu Street, Shanghai, 200233 [email protected]

Abstract

With continuing miniaturization and more prevalent use of Ball Grid Array (BGA) packages in the microelectronics industry, the mechanical strength of Printed Circuit Board Assemblies (PCBAs) with BGA packages is becoming very critical. In a variety of applications ranging from smart phones to high end switches and routers, the mechanical robustness of PCBAs is becoming the key differentiator in product reliability. To enable a standard way to benchmark mechanical reliability, the IPC/JEDEC-9702 test method was developed several years ago. The test method has helped compare different PCBAs to optimize overall mechanical reliabiI ity.

However, a key challenge with mechanical testing is that by the time the testing is performed, it is too time consuming and expensive to make changes to the package if it's mechanical reliability needs improvement. In this study, bending tests for various BGA packages have been conducted based on the IPC/JEDEC-9702 standard, under different applied detlections to obtain the required data for studying the failure modes. Three-dimensional Finite Element Models (FEM) were developed to understand the relationship between PCB strain and solder joint strain. The strain values at different locations in the PCBA were estimated from the model, and compared with experimental data. Good agreement between model predictions and experimental data has been obtained. Then, a series of FEM analyses were performed with different design parameters. High performance cluster computing was used to reduce computation time without compromising accuracy. Finally, based on the resuIts presented in this study, optimization analysis was performed to improve BGA mechanical reliability for any given geometry.

Key words: Monotonie bending test; MPC, Contact, Finite element analysis; PCB strain; Parameters design; BGA; Solder joint reliability; High Performance Computing

Introduction

The need for integrating more functions into a shrinking package for various electronic devices has led to significant growth of microelectronic packaging technologies. This miniaturization trend poses several challenges to the reliability of the solder interconnects used in packages under much more stringent end-use conditions than before. Just as temperature cycle tests are usedto evaluate the life of Printed Circuit Board Assemblies (PCBAs) under thermomechanical loading, monotonie bending tests are widely used to examine the structural integrity of solder joints under mechanical loading. [1-5] Based on the IPC/JEDEC-9702 standard bending tests for various BGA packages are routinel; conducted under different loading conditions to obtain the

PCB strain it takes to induce a failure in the BGA electrical interconnect. [6] The failure modes induced during the bend testing are then analyzed.

Considering the current trend of cheaper, faster, and better e1ectronic products, it has become increasingly important to evaluate package and system performance very early in the design cyc\e using simulation tools. Three-dimensional Finite Element Models (FEM) were developed to und erstand the relationship between PCB strain and solder joint strain. The strain values at different locations in the PCBA were estimated from the model, and compared with experimental data. The solder joints were modeled as discrete entities, and Multi-Point Constraints (MPC) were used to better correlate the models with the experimental data.

Having validated the models with experimental data, a series of FEM analyses were performed with different package types, sizes, die sizes, PCB thicknesses, PCB pad designs, package pad sizes, ball pitches, load spans, support spans and applied detlections. Since the models are quite complex and several iterations of the analysis were needed, high performance computing was used to reduce computation time without compromising accuracy.

Finally, the results presented in this study were used to derive the critical design parameters and limits that could impact BGA mechanical reliability. The guidelines from this analysis were ultimately used to derive the optimal design window for minimizing the strain imparted on the solder joint interconnects and other critical interfaces for any given geometry.

Test VehicIe Description

A daisy chain test vehicle was developed to understand the variation of the solder and PCB strain better. Five different experimental data sets are obtained as follow:

1. HSBGA, package size is 37.5x 37.5 mm. Detail dimensions are shown as Table 1.

Table lHSBGA 37.5 x 37.5 mm details Variable Value Unit

Paekage size 37.5 x 37.5 mm

Die size 15.06 x 14.46 x 0.3 mm

Substrate thiekness 0.56 mm

Solder ball diameter 0.6 mm

Number ofBGA 36 x 36

BGA piteh mm

peB size 300 x 160 x 2.35 mm

Molding eompound thiekness 1. 17 mm

Monotonie bending speed 10 mmJs

Load span 90 mm

Support span 170 mm

2012 International Conference on Electronic Packaging Technology & High Density Packaging 978-1-4673-1681-1112/$31.00 m012 IEEE

706

Table 2HFCBGA 35 x 35 mm details

Variable Value Unit

Paekage size 35 x 35 mm

Die size 16 x 16.2 x 0.78 mm



Number ofBGA 34 x 34

BGA piteh I mm

peB size 300 x 160 x2.35 mm

Heat spreader thiekness 0.5 mm

Monotonie bending speed 10 mrnls

Load span 90 mm

Support span 170 mm

Table 3FCBGA (Iidless) 45 x 45 rum details

Variable Value Unit

Substrate size 45 x 45 x 1.09 mm


Number ofBGA 44 x44

BGA piteh I mm

peB size 200 x 90 x 2.35 mm


Load span 90 mm

Support span 180 mm

Table 4HFCBGA 45 x 45 mm details

Variable Value Unit

Paekage size 45 x45 mm

Die size 17.28 x 18. 18 x 0.787 mm



Number ofBGA 44 x44

BGA piteh I mm

peB size 300 x 160 x 2.35 mm

Heat spreader thiekness 0. 13 mm


Load span 90 mm

Support span 170 mm

2. HFCBGA, package size is 35 x 35 mm. Detail dimensions are shown as Table 2.

3. FCBGA (Iidless) , package size is 45 x45 mm. Detail dimensions are shown as Table 3.

4. HFCBGA, solder mask defined (SMD) , package size is 45 x45 mm. Detail dimensions are shown as Table 4.

5. HFCBGA, non-solder mask defined (NSMD), package size is 45 x45 rum . Detail dimensions are shown as Table 4.

To study the failure modes, strain values at different locations in the PCBA were obtained from the test. Strain gauge 1 was on top side of the PCB (far field) as shown in Fig.l. Gauge 1 was a uniaxial strain gage mounted on same side of PCB as the component, centered between package edge and anvil/roller centerline, and aligned with corner most solder joint or lead. Strain gauges 2 and3 are also shown as Fig.l. Uniaxial strain gauge 2 was mounted on the opposite side ofthe PCB as the component, and positioned coincident with corner most solder joint or lead. Uniaxial strain gauge 3 was mounted on the opposite side of the PCB as the component, and positioned at package center.

Fig. 1 Strain gauge locations

Numerical Analysis

Three-dimensional 1/4 FEA models were built as shown in Fig. 2 - 4to capture the PCB strain for each case. The entire model was meshed with hexahedral elements.

Table 5Material Properties

Material Modulus(Mpa) Poisson ratio

Silicon 162,7 16 0.28

Substrate 29,000 0.3

Lid 128,000 0.29

Solder 50,000 0.36

Underfill 1 1,220 0.29

Lid adhesive 9.36 0.29

peB 25,000 0. 18

Molding eompound 26,000 0.25

The material properties used in the model are shown in Table 5.Linear elastic properties were used for all the materials. In the FEA simulations, it was observed that the mesh density directly underneath the BGA skewed the PCB strain results. Maintaining a uniform mesh density on the PCB would have resulted in an unreasonably large element count. Consequently, Multi-Point Constraints (MPC)were used around the BGA structure to connect the part of the PCB under the package to the rest of the PCB as shown in Fig. 4. The MPC solution enabled an optimal balance between accuracy and computation time.

Fig. 2Three-dimensional 1/4 model and boundary conditions

2012 International Conference on Electronic Packaging Technology & High Density Packaging 707

Fig.3 Three-dimensional 1/4 model detail Fig. 4Multi-Point Constraint Contact

Table 6Error between model prediction and experimental data

Model Data (/Je) Error (%)

SN Package Package Displacement Force

gauge I Type Size (mm) (mm) (N)

I HFCBGA 35 8 452.28 454 1

2 HFCBGA 35 9 5 1 1.88 5097

3 HFCBGA

45 6 363.26 3709 (NSMD)

4 HFCBGA

45 8 492 4943 (SMD)

5 HFCBGA

45 9 557. 16 5544 (SMD)

6 HFCBGA

45 10 625 6 164 (SMD)

7 FCBGA

45 15.625 40 1.8 7778.8 (Lidless)

8 FCBGA

45 23.4375 676.36 1 1386 (Lidless)

9 HSBGA 37.5 6 346.98 3583

10 HSBGA 37.5 7 406.7 4 169

1 1 HSBGA 37.5 8 467.34 4752

12 HSBGA 37.5 10 592.06 59 12

Analyses resuIts show very close correlation for force and strain, within the variation of experimental error as shown in Table 6.

Having developed a model that correlates weil with the experimental data, the model was used to analyze different BGA design options and address the following questions:

1. What is the variation in joint strain along the corner and edge of a package?

2. How does solder joint strain change from the corner most to the center joint along the edge of the package?

3. What are the effects of all the geometric design variables on the joint-to-PCB strain ratio?

The change in solder joint strain along the edge of the package is shown in Fig.5. Joint number 1 is the solder joint in the middle of the package along the outer edge. Joint numbers 20 - 24 denote the solder joint at the corner of the package. (Refer to nomenclature shown in Fig. 6) .

As shown in Fig. 5, the solder joint strain changes differently for different packages, and as expected, significantly increases at the corner most solder joint.

In most of the packages, the joint strain drops by about 20 - 30% from the cornermost to the third ball in asshownin Table 7. For the overmolded PBGA package, the strain distribution is highest under the overmold edge as opposed to

gauge 2 gauge 3 Force

gauge I gauge 2 gauge 3 (N)

-5233 - 1644 22. 18 5.77 -26.23 5 1.68

-59 17 - 1872 17.58 0.70 -45. 16 63.53

-4400 - 14 1 1 19.68 52.52 -9. 14 -25.22

-6005 - 1883 24.62 19.75 14.96 43.03

-6788 -2 150 25.74 16.89 10.36 4 1.35

-7660 -2433 24.57 13. 17 6.88 39.46

-8936.5 -4386 3 1.67 2.77 - 1l.7 1 -9.65

- 13693 -6972 7.98 5. 12 -9.54 -26.76

-4046 - 150 1 33.54 -I 1.25 36.44 19.38

-4748 - 1778 33.6 1 -25.52 14.07 44.97

-5457 -2059 3 1.72 -25.9 1 - 17 1. 10 45.44

-6895 -2636 28. 1 1 - 18.67 36.57 - 16.4 1

Average 25.08 2.94 - 12.80 22.57

the cornermost solder joint. This is because the stiffuess of the overmold transfers most of the strain to the solder directly under the overmold edge. No significant difference in solder joint top (package side) strain was observed with SMD or NSMD PCB pads.

0.028 0.026 0.024 0.022 0.02

0.018 ]:0.016 ·�0.014 �0.012 .� 0.01 �0.008

0.006 0.004 0.002

o

r-- - HSBGA37.5mm-TopJnt

r-- - HFC35mm-TopJnt I r-- -FCBGA (no lid) 45mm-TopJnt I r-- - HFC45mmSMD-TopJnt I

- - HFC45mmNSMD-TopJnt ./ -I-- /

,...., / ..J "'" ./

o 2 4 6 8 W U M � � w n M Joint Number

Fig. 5Joint strain vs. joint number


Fig. 6Joint numbernomenclature

Table7 Reduction in strain from cornermost to 3rd ball in

Package

FCBGA (lidless) 45 mm

HFCBGA35 mm

HFCBGA45 mm

HSBGA 37.5m m

%Reduction

30

33

23

2 1

According to Fig.5, the cornermost solder joint strain is highest for the FCBGA package, which is also the largest package by size. However, the largest package also requires the highest strain to detlect it, so it would be more insightful to look at the joint-to-PCB strain ratio across all packages. Defining the Joint-Failure-Strain(JFS) to mean the critical strain in the joint that resuIts in failure, and defining the PCBFailure-Strain(PFS) to bethe critical strain in the PCB that resuIts in failure. Let R=JFS/PFS, the ratio of joint to board strain (referred to subsequently as "R-value").

As shown in Fig. 7 , for each unit of board strain applied, the solder joint undergoes much more strain (R-value > 1). The more rigid the package compared to the PCB, the higher the R-value. Fig.7 shows that the R-value of an overmolded PBGA package is much higher than that of an FCBGA package. Fig.7 also shows that while the absolute joint strain value is highest for the largest FCBGA package (Fig. 5) , the R-value is actually lower for the FCBGA package. In physical terms this means that while a large FCBGA may have high solder joint strain, it takes more PCB strain to induce the high strain in the package. Consequently, it is important to look at the R-value as opposed to just the absolute joint strain value only.

Since the strain of the cornermost solder ball is the highest, some additional analyses were run to verify the effect of corner ball redundancyon solder joint strain. Full array, 10 balls depopulating and 12 balls rounded are shown in Fig. 8. The analysis show that depopulating the corner 10 balls does not reduce the peak solder joint top strain as shown in Fig. 9. Actually, depopulation is done primarily for warpage induced solder bridging mitigation. However, rounding the corner by depopulating 12 balls reduces the strain slightly. Consequently, the optimal design rule is to make the corner

balls redundant in a rounded form, depending on the package baseline robustness. If a package warps excessively at the corners, to increase the risk of solder bridges during retlow, then the corner balls can be depopulated, but this depopulation will not increase the mechanical strength of the package from a monotonie bending perspective.

4.5

4

3.5

g3 o .;; �2.5 c ';0 5:; 2 "E �1.5 <0 � 1 c '0 --0.5

o

I--

f\ / \ /

\/ /

'-'

/, ../ J

--

HSBGA37.5mm-TopR -HFC35mm-TopR

I--FCBGA (No Lid) 45mm-TopR -HFC45mmSMD-TopR I--HFC45mmNSMD-TopR

o 2 4 6 8 10 12 14 16 18 20 22 24 Joint Number

Fig. 7Joint-to-board strain ratio vs. joint number

The resuIts of both Fig.5 and 7 indicate that the corner 3 solder joints take up alm ost 30% of the highest solder joint strain. This is important from a design viewpoint, because it suggests that since the corner 3 joints take most of the strain, making the corner 3 joints redundant or "sacrificial" is sufficient to improve package robustness. Making more than 3 balls redundant may not give more value.

Fig. 8Corner ball redundancy

0.018 0.016 0.014 0.012

-;:: 0.01 � c 0.008 'iü

t +-,. I 11 I /1 }

.-..I , � ... ... VI 0.006 ... c ""*""HFC_ 45mmJull_Array :Q 0.004 ...... HFC_ 45mm_10Ball_Depop -

0.002 ...... HFC 45mm 12Ball Rounded

0 o 5 10 15 20 25

Joint Number

Fig. 9Joint strain vs. joint number


Numerical DOE Matrix

Since the model resuIts show very close correlation for force and strain, within the variation of experimental error, further design optimization analyses runs were conducted.A series of FEM analyses were performed with different package types, sizes, die sizes, PCB thicknesses, PCB pad designs, package pad sizes, ball pitches, load spans, support spans andapplied detlections.A total up to 40 caseswere run, as shown inTable 8.

Assuming the max PCB strain is 5,000f.!e and 2, 500 f.!e, the higher and lower applied detlections can be calculated from Equation l. Thisequation is derived from classic beam

theory and ignoresany effects due to the package, or the Poisson 's ratioeffect of a plate in bending. [6]

t5 = s(Ls - LL XLs + 2LJ

where

61 (1)

ö= crosshead travel distance

10= global PCB strain

Ls= support span

LL= load span (centered within support span)

t= PCB thickness

Table8Numerical DOE Matrix

SN

IH

I L

2H

2 L

3H

3 L

4H

4 L

5H

5 L

6H

6 L

7H

7 L

8H

Paekage Type

FCBGA I pe Lid

FCBGA I pe Lid

FCBGA No Lid

FCBGA No Lid

FCBGA I pe Lid

FCBGA I pe Lid

FCBGA I pe Lid

FCBGA I pe Lid

FCBGA I pe Lid

FCBGA I pe Lid

FCBGA I pe Lid

FCBGA I pe Lid

FCBGA I pe Lid

FCBGA I pe Lid

FCBGA I pe Lid

8 L FCBGA I pe Lid

9H FCBGA I pe Lid

9 L FCBGA I pe Lid

lOH FCBGAlpe Lid

10 L FCBGAlpe Lid

IIH FCBGAlpe Lid

II L FCBGAlpe Lid

12H FCBGAlpe Lid

12 L FCBGAlpe Lid

13H Wirebond

13 L Wirebond

14H Wirebond

14 L

15H

15 L

16H

16 L

17H

17 L

18H

18 L

19H

19 L

20H

20 L

Wirebond

Wirebond

Wirebond

Wirebond

Wirebond

Wirebond

Wirebond

Wirebond

Wirebond

Wirebond

Wirebond

Wirebond

Wirebond

Paekage Size

(mm)

55

55

55

55

55

55

55

55

55

55

55

55

55

55

45

45

45

45

45

45

35

35

25

25

35

35

25

25

25

25

25

25

25

25

25

25

25

25

25

25

PCB

Thiekness

(mils)

125

125

125

125

125

125

125

125

125

125

125

125

125

125

125

125

93

93

62

62

125

125

125

125

125

125

125

125

125

125

93

93

62

62

62

62

62

62

62

62

PCB Pad Design

NSMD

NSMD

NSMD

NSMD

NSMD

NSMD

NSMD

NSMD

SMD

SMD

SMD

SMD

NSMD

NSMD

NSMD

NSMD

NSMD

NSMD

NSMD

NSMD

NSMD

NSMD

NSMD

NSMD

NSMD

NSMD

NSMD

NSMD

NSMD

NSMD

NSMD

NSMD

NSMD

NSMD

NSMD

NSMD

SMD

SMD

SMD

SMD

PCB Pad Size (mils)

20

20

20

20

16

16

20

20

22 (20 mil SRO)

22 (20 mil SRO)

24 (20 mil SRO)

24 (20 mil SRO)

16

16

20

20

20

20

20

20

20

20

20

20

20

20

20

20

16

16

20

20

20

20

12

12

12

12

9

9

Pkg Pad Size (mils)

20

20

20

20

20

20

16

16

20

20

20

20

16

16

20

20

20

20

20

20

20

20

20

20

20

20

20

20

16

16

20

20

20

20

12

12

12

12

12

12

2012 International Conference on Electronic Packaging Technology & High Density Packaging

Ball

Piteh

(mm)

I

0.8

0.8

I

0.8

0.8

I

0.5

0.5

0.5

0.5

0.5

0.5

Die Size (mm)

20

20

20

20

20

20

20

20

20

20

20

20

20

20

20

20

20

20

20

20

10

10

7

7

10

10

10

10

10

10

10

10

10

10

10

10

10

10

10

10

Ball Size (mm)

0.6

0.6

0.6

0.6

0.6

0.6

0.6

0.6

0.6

0.6

0.6

0.6

0.45

0.45

0.6

0.6

0.6

0.6

0.6

0.6

0.6

0.6

0.6

0.6

0.6

0.6

0.6

0.6

0.45

0.45

0.6

0.6

0.6

0.6

0.4

0.4

0.4

0.4

0.4

0.4

710

DOE Results

The 40 ben ding analyses were run in batch mode. Critical design variables such as joint top strain, PCB strain

.1 and

totaldetlection force were extracted and analyzed m the Statistical Analysis software JMP , as shown below.

..

.

,

,

..

1 --

, , " " " "

1 � Jn t» " "

I J -I-l- 1 I - - . -

-, , , .. , , , , ,

" " " " " " " " " " " " " " " ,.

, � , � i " " I�" '"

. , .. Ft:eGA tpt�1II

-1-1 1--

, .. , .. " " " " " .. .. ..

� i '" " "

r=.

-

-

.. , " " . "

� "

" -

-1-1-.. , , " " " " " ..

� '" '"

"

..."'al'.:tdSl:'-'1 �".ss.:. __ ) .-e. ... ,.,o..g. PCElllIO...,.irnbl �SI.. ... tmrn P�;.tn«

Fig. lOJoint top /PCB strain 1 for different cases

As shown in Fig. 10, a 35 rum Wirebond BGA produces a higher R-value than a 55 mm FCBGA on the same PCB.With the pad size skewed, the R-value of a 55 rum Package can be made higher.For the same package size, the thicker the PCB, the higher the R-value.The lid makes littIe difference to the�value.This is due to the typically low modulus of the hd adhesive used on FCBGA packages. Smaller pitch increases the R-value with all other factors kept constant.SMD PCB pads reduce the R-value with all other factors kept constant.

12S 125 12 13 12'S 25 3' '5

... ..

... "

" .. . ..,

n ., t2S t2S �en.ct.nnt(lnll ß lS hCb;tSIot.'(JI'rIlt

P .. (I.�fYtII

Fig. 11PCB strain 1/force for different cases

As shown in Fig. 11, this data indicates the relative stiffuess of the assembly.The thirmer the PCB, the higher the strain-to-force ratio obtained. For the same PCB thickness, the sm all er the pitch, the higher the PCB strain/force. For a very thick PCB, the variations in package size and construction are in signi ficant.

i } J

'" '" ... ,., ..

-- , -, , I " " " " ,. ..

I i i f , IM '" " " "

I % ! . ..

, !

1-i -

I - - -- - - - - - -I I .. I I I I I I .. I " .. I .. I I .. " .. " " '" " " " " " " " " " " " " " " " " ,. " " .. ., . .. " " " j I I ! � � I ! I I � � " '" '" '" " " '" '" .. " .. " "

�''''UI "' .. ---...

Fig. 12Joint top /force for different cases

Fig. 12 shows the ratio of the top of the solder joint to the applied force. The lower the pitch, the higher the joint top strain per unit force obtained.The thicker the PCB, the lower the joint top-strain per unit of force applied.The large body

size packages have the lowest joint top stain per unit force.Since most designs (heatsink and ICT) are force controlled, the resuIts indicate that fme pitch BGAs mounted on thin PCBs are more susceptible to mechanical strain than thick PCBAs. For boards as thick as 125 mils, regardless of package size or pitch, the risk is much lower.

Fig. 13Joint top /joint bottom strain for different cases

PCBA mechanical failures could occur via a variety of different failure modes, as shown in Fig. 13. In general, the fai I ures are concentrated either on the solder joint top interface, or the solder joint bottom interface. Comparing the strains at the solder joint top vs. bottom can give an idea of the likelihood of failures occurring at the top vs. the bottom. The resuIts in Fig. 13show the two primary failure mode regions: joint top side and joint bottom side.I� the

.rati

.o of

Joint Top/Joint Bottom strain is more than 1, fmlure IS hkely on top side.If the ratio of Joint Top/Joint Bottom strain is less than 1, failure is likely on bottom side.If the strain is below a critical threshold, the failure may not occur on either side.

The resuIts in Fig. 13 show that changing the ratio of PCB to package pad size/solder mask opening can significantly skew the strains from top side to bottom side. The resuIts also show the likelihood of PCB side failures is much more with sm all er pitch BGA packages. In addition, the resuIts show that PCB side failures are more likely to occur on thirmer PCBs with fine pitch BGA packages that on thicker PCBs.

Design Guidelines

Using the results of the numerical analysis DOE, additional statistical analysis was performed in JMP to derive design guidelines that could be used to design the optimal package and PCB combination to ensure mechanical robustness.

The main goal is to keep the solder joint strain below a certain pre-established threshold. Since we cannot experirnentally measure the solder joint strain, we need some form of relationship between solder and PCB strain. With that relationship, we can establish the threshold for maximum acceptable PCB strain:

R = JFS (2)

PFS

where R is the Joint-to-PCB strain ratio, JFS (Joint-Failure Strain) is the strain it takes for a solder joint to fail, and PFS (PCB-Failure-Strain) is the PCB strain it takes for the solder joints to fail. The R value could be different for different packages and PCBs, but the JFS value remains a constant: it is the strain it takes for any joint to fail, regardless of the


package and PCB. Consequently, equation (2) can be rearranged to give the PFS:

PFS = JFS (3)

R Based on the experimental data and corresponding FEA data, the JFS value can be estimated. Now, to determine what PCB strain will cause a failure in any package-PCB combination, we simply need to determine the value of R. R is an intrinsic measure of the stiffuess of a given package relative to a given PCB.

If we have a maximum acceptable PCB strain threshold, we can then predict whether a specific package will meet that threshold or not. A stochastic model was developed to predict the PCB and joint strain using the DOE results. The accuracy of the model as tested against the DOE data is shown in Fig.14.

. ,, ', \

. . . . . . . . . . . . . �

. .

: . . . . . . . . . . . . . . .

..

.

. :-: ..

...

..

..

..

..

..

..

: .

..

...

...

..

. .

: •• • • • i ·

•....

. : ...

Fig. 14 Predicted vs. DOE PCB strain data, and residual values

As shown in Fig. 14, the model predictions of PCB strain track very c10sely with the DOE results, and the prediction

residuals are within ± 500 f.!E. The key variables identified and used in the model are shown in Table 9 below.

Table 9Significance factors of model design variables

Souree F Ratio Prob> F

Paekage Type 8.2358 0.00 14*

Paekage Size (mm) 7.4239 0.0 105*

PCB Thiekness (mils) 10 1.7976 <.000 1 *

PCB Pad Size (mils) 22.4803 <.000 1 *

Pkg Pad Size (mils) 22.5 126 <.000 1 *

Ball Piteh (mm) 13.896 1 0.0008*

Joint Top Strain (�c) 889.7973 <.000 1 *

The model equation itself is shown in Table lObelow:

Table 10 PCB strain prediction model

Variable Deseription Category Value

A Paekage Type FCBGA I pe Lid -276. 14

FCBGA No Lid - 176.2 1

Wirebond PBGA - 1 137.23

B Paekage Size (mm)

C PCB Thiekness (mils)

D PCB Pad Size (mils)

E Pkg Pad Size (mils)

F Ball Piteh (mm)

G Joint Top Strain (�c)

PCB Strain(/J,8) = A - 22.02 X B - 28.43 X C + 184.74 X D + 323.14x E - 5062.76x F + 277445 xG

This model can be used to estimate the PCB strain to failure for a given package and PCB combination during the design phase even before sampIes are built. A few important caveats to note:

a. The model itself does not give the definition of a failure. It provides the correlation between design variables and joint strain. The typical JFS values observed are

approximately 20,000f.!E for an el ectrical open solder joint failure. This value can be used to estimate the PCB strain to failure with an appropriately selected safety margin.

b. The model is based only on the failures associated with joint top strain (such as brittIe solder joint fracture) , so it is applicable only to packages in which the ratio of joint top and bottom strain is equal to, or c10se to 1.

A separate model focused on predicting PCB strain correlated to joint bottom strain will be published in a separate publication.

Cloud Computing

Since the ben ding models are quite complex and several iterations of the analysis were needed, high performance cluster computing was used to reduce computation time without compromising accuracy.Before running the 40 bendingmodels, some benchmark studies were performed on the c1oudcompute cluster, and the resuIts are shown in Fig. 15.

The resuIts show that by using more cores, thecomputation time can be reduced by alm ost 7X. They alsoshow that the reduction in computation time is not linear;beyond 50 cores, there is no benefit for this specific analysis.This is based on the analysis running on ICE 8200 c1usterwith Intel Xeon Quad-core CPUs (up to 512 cores, 3GRAM/core). The cost per core-hour of running thesimulations was less than 50 cents.

� 6 o =-5 " E ;:: 4 -;

= 3 :S " -; 2 ... � 1

o o

PBGA680 solder joi nt model

\ r\

" I"'-

"-"'-

10 20 30 40 50 60 70 80 Number of Cores

Fig. 15Benchmark comparison of computation time vs. cores


Conclusions

A detailed, experimentally validated numerical optimizationdesignmodel has been presented in this study. The results of the model are very c10sely correlated with experimental data. Several key observations can be derived from the optimizationdesignplatform:

l. The R-value of a PBGA package is much higher than that of an FCBGA package.That is because an overmolded PBGA package is stiffer than an FCBGA package.

2. The 3 corner balls of a package account for alm ost 30% of the applied strain, so making the 3 corner balls electrically redundant can significantly improve the

mechanical robustness of the package.

3. Depopulating the 3 corner balls does not significant reduce the applied strain.

4. Making corner balls redundant in a rounded form can reduce the strain slightly.

5. For the same package size, the thicker the PCB, the higher the R-value.

6. The th inn er the PCB, the higher the strain-to-force ratio.For the same PCB thickness, the smaller the pitch, the higher the PCB strain/force. For a very thick PCB, the variations in package size and construction are relatively in signi ficant.

7. The lower the pitch, the higher the joint top strain per unit force. The thicker the PCB, the lower the joint top strain per unit force. The large body size packages have the lowest joint top stain per unit force. For boards as thick as 125 mils, regardless of package size or pitch, the risk is much lower

8. Using the ratio of joint top strain to joint bottom strain, it has been shown that fmer pitch BGA packages are more susceptible to PCB side failures.

9. An easy to use model has been presented for predicting the PCB strain to failure for a given package/PCB combination. This model can be used early in the design phase to optimize the design for mechanical robustness.

Future Work

The work presented in this study serves as anoptimizationdesign work for analyzing several package parameters. The models developed can be used to understand the impact of variables like different package types, sizes, die sizes, PCB thicknesses, PCB pad designs, package pad sizes, ball pitches, load spans, support spans andapplied detlections.A correlation between pad cratering and mechanical bending strains is currently being derived. The correlation would then be used to provide a predictive model for designing against pad cratering failures. In addition, design rules for real time detection of failures and a validation test vehicleis being developed.

Acknowledgments

The authors would like to thank the team and managementof the Component Quality and Technology Group at CiscoSystems, Inc.

References

l. Cheng, C. et al, "Fatigue Life Evaluation of Ball Grid Array Packages with Sn-Ag-Cu and Rare-Earth Addition Solder under Cyclic Bending Test", IMPACT 2008, Taipei, Oct. 2008, pp. 121-124.

2. Chang, H. et al, "Evaluation of Various Surface Finished Halogen-Free Printed Circuit Board Assembly Under Four-Point Bending Test", IEEE Transactionson Components, Packagingand Manufacturing Technology, voI. 1, No. ll(2011) , pp. 1747-1754.

3. Chang, G. et al, "The Relationship of Life Prediction Between Cyclic Bending and Thermal Cycle Testing on CSP Package", Microsystems Packaging Assembly and Circuits Technology Coriference (IMPACT), 20 10, pp. 1-4.

4. Lou, M. et al, "Study of Isothermal Bending Fatigue Test", Electranic Packaging Technology & High Density Packaging (ICEPT),2009, pp. 1246-1255.

5. Yu, 1. et al, "Modification of Four-point Bending Test Control System and Development of Laboratory Asphalt Mix Fatigue Prediction Model", Mechanic Automation and Contral Engineering (MACE),2011, pp. 5920-5923.

6. Monotonic Bend Characterizationof Board-Level Interconnects, IPC/JEDEC-9702, Association Connecting Electronics Industries, Jun. 2004.


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