Four Quadrant Voltage Sag/Swell Compensation With Interphase Quasi-Z-Source AC-AC Topology

Qin Lei Fang Z. Peng Electrical and Computer Engineering Department

Michigan State University East Lansing, USA

leiqin8512@gmail.com

Abstract- This paper proposes a new type of interphase voltage sag/swell compensator based on voltage-fed quasi-Z-source ac-ac converter to implement a four quadrant voltage injection. By PWM duty-ratio control, the converter performs as a “solid-state transformers” to provide a larger range of output ac voltage with buck-boost, reversing or maintaining phase angle, reducing in-rush and harmonic current, reducing passive component ratings, and improving reliability. The injected voltage amplitude can vary in a large range and its phase angle can vary in the whole 2π range due to the circuit features. Compared to conventional parallel series back to back dynamic compensator, the quasi-Z-source converter has smaller capacitor and inductor requirement, and also smaller switch voltage and current stress. The theory analysis can be divided into three parts: basic circuit analysis; passive component stress and switch stress comparison to conventional topology; voltage sag/swell compensation strategy. Simulation and laboratory test are also carried out on a prototype to validate the theory analysis.

I. INTRODUCTION The disturbance in power system includes voltage

sags, swells, surges, outages and harmonics that vary in frequency or voltage amplitude. The conventional back to back topology requires two-stage conversion and requires a big dc-link capacitor [1]-[3]. The direct simple ac-ac converter can provide better power factor, efficiency, low harmonic current in line, smaller size and lower cost [4]-[11]. But it has limited voltage amplitude and phase angle regulation range. This paper investigates the application of voltage-fed quasi-Z-source ac-ac converter [12]-[17] in the voltage sag/swell compensation by an interphase connection to compensate the incorrect phase using the voltage output from other two phases [18]. The quasi-Z-source ac-ac converter can output either bucked or boosted, either in-phase or out-of phase output voltage [13]. Also it has common ground and continuous input current as well as reduced capacitor voltage ratings compared to Z-source [16], which is better for generating in-phase or out-of-phase

voltage. The total switching SDP and passive component stress have been investigated and compared with the traditional back to back topology. Due to its basic output voltage features, the resultant injected voltage which is sum of the output voltage from other two phases, can be in any angle with the incorrect phase voltage thus can provide a four quadrant compensation, but the conventional ac-ac topology can only provide no more than 2 / 3π phase range correction [18]. The quasi-Z-source topology can also provide reducing in-rush and harmonic current and better reliability. The simulation and experimental results have been given to validate the theory analysis.

II. PROPOSED INTERPHASE VOLTAGE SUPPORTER TOPOLOGY

Fig.1. Quasi-Z-source AC-AC converter based interphase voltage sag/swell supporter

978-1-4244-8085-2/11/$26.00 ©2011 IEEE 2013

(a) (b)

(c) (d)

Fig. 2. Single-phase Z-source ac-ac converter (a) voltage-fed with continuous input current (b) Voltage-fed with discontinuous input current (c) Current-fed with continuous input current (d) Current-fed with discontinuous input current

(a) (b)

Fig. 3. Equivalent circuits (a) Equivalent circuit state I (b) Equivalent circuit state II

TABLE I. EQUATIONS OF VOLTAGE-FED QUASI-Z-SOURCE AC-AC CONVERTER

Vorms/Vinrms Vc1/Vin Vc2/Vin Io/Iin IL1/Iin IL2/Iin Vsw1/Vin Vsw2/Vin Isw1/Iin Isw2/Iin 1 D

1 2D−

− 1 D

1 2D−

− D

1 2D− 1 2D

1 D−−

1 1 11 2D−

11 2D−

11 D−

11 D−

The schematic diagram of the proposed Quasi-Z-source AC-AC converter voltage sag supporter for phase a is shown in Fig. 1. The desired compensated voltage are generated

from phase b and phase c by individual ac chopper and connected in series with the line to compensate the sag in phase a. Similar topologies are applied to phase b, c.

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0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1-6-5-4-3-2-10123

456

D

Vor

ms/

Vin

rms

1 2 3 4 5 6-0.8

-0.6

-0.4

-0.2

0

0.2

0.4

0.6

0.8

1

1 2 3 4 5 60

0.5

1

1.5

2

Fig. 4. Voltage gain vs D Fig..5. Voltage stress/ Equivalent output voltage vs Voltage gain

III. CIRCUIT ANALYSIS OF VOLTAGE-FED QUASI-Z-SOURCE AC-AC CONVERTER

Four quasi-Z-source AC-AC topologies are shown in Fig. 2.The circuit diagrams of single phase voltage-fed quasi-Z-source AC-AC converter with continuous input current is shown in Fig. 2 (a). It is consists of a quasi-Z impedance network and two bidirectional switches S1, S2 which are implemented by a diode bridge and one IGBT. The use of fewer switches than the traditional bidirectional switch can reduce cost and improve reliability of the system. In the impedance network, the capacitor value is much smaller than in the quasi-Z-source inverter case. This ac-ac converter can

operate with PWM duty-ratio control in exactly the same way as for quasi-Z-source dc-dc converters [19]. The two switches are controlled to be turned on and off in complementary with each other, and the output voltage is a simple function of the duty cycle selected. There are two equivalent operation states shown in Fig. 3 (a) and (b), and the duty ratio for state II is defined as D. In this circuit, any deadtime or overlap between two switching signals will cause either huge voltage spike or huge current spike on the switch. A snubber circuit which is composed of one capacitor, one diode and one resistor has been paralleled with one of the switches to avoid the minor deadtime or overlap caused by the switch non-ideal turned on and off process.

Applying the volt-seconds balance on two inductors L1 and L2 [13], the voltage transfer gain can be derived in Table I. Moreover, for further analysis, the capacitor voltage stress, inductor current stress and switch stress equations are also derived by using the equivalent circuit mode. Fig.4 shows the voltage gain versus the duty cycle ratio. Fig.5 shows the capacitor voltage stress over equivalent output voltage (which is equal to voltage gain times the input voltage) with respect to different voltage gain, and also the switch voltage stress over equivalent output voltage with respect to the voltage gain. These plots represent the per unit value of the switch stress and passive component stress of this circuit.

IV. COMPARISON WITH CONVENTIONAL BACK TO BACK CONVERTER FOR SAG/SWELL COMPENSATION

A. Capacitor voltage stress comparison with conventional back to back topology

To better illustrate that the quasi-Z-source ac-ac topology have smaller size and lower cost, a conventional back to back topology shown in Fig. 6 has been taken into comparison in terms of passive component stress and switch stress. The ratio of the sum of two capacitor voltage over the

Voltage gain in quasi-Z-source topology is 1/(1-D), which is smaller than 2 when the gain is positive. For conventional back to back topology, the ratio becomes 2/M2. It is bigger than 2. Thus the former topology has lower capacitor voltage stress and need a smaller capacitor.

B. Total switching device power comparison with conventional back to back topology

The SDP of switching device is expressed as the product of voltage stress and current stress. The total SDP of a circuit is defined as aggregate of SDP of all switching devices used in the circuit. For back to back topology in Fig.6, assume the modulation index for SPWM rectifier is M1 and for SPWM inverter is M2. Thus the DC link voltage is 2Vin_peak/M1 and the output ac voltage peak value is Vin_peakM2/M1. The voltage boost ratio is 2 1M / M . The voltage stresses for all four switches are the same, equal to dc link voltage 2Vin_peak/M1. The current stress for S1 and S2 is input current and for S3 and S4 is output current. So total peak SDP of this converter is:

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Fig. 6. Single-phase back to back topology Fig. 7. Comparison of total SDP for quasi-Z and back to back

θ

aVΔ

aVΔ

(a) (b) (c)

Fig. 8. Phasor diagram for the operation of the interphase ac-ac converter for voltage injection (a) For single phase sag/swell compensation (b) for phase-

shifted voltage injection (c) For symmetrical voltage sag compensation.

in opeak _ b2b in o

1 2

o 1 2

V VSDP 2( 2 )I 2( 2 )IM M

4P (1 / M 1 / M )

= +

= +

(1)

For voltage-fed quasi-Z-source AC-AC converter, the total peak SDP is

peak_QZ in in o1 1 2SDP 2* V I P

1 2D 1 D (1 D )(1 2D )= =

− − − − (2)

Fig.7 shows the ratio of total switching device stress over total power in terms of the voltage gain at power factor equal to 1. As we can see, when the voltage gain is bigger than 0.2, which is also the common case, the quasi-Z-source topology has much lower total switch device stress than the conventional back to back topology.

C. Passive component requirement comparison For voltage-fed quasi-Z-source AC-AC converter, the

inductance value selection for L1 and L2 is determined by the current ripple requirement, input voltage, switching period and duty cycle applied. In state I, D

L1 in C1 in1 2Dv v v v−−= − =

and in state II, 1 DL1 in C 2 in1 2Dv v v v−

−= + = .For a required

current ripple IΔ , the inductance can be calculated through the volt-seconds product:

in_ peak v in_ peak sL (D(1 D)V T ) / (1 2D) I D G V TΔ= − − = ⋅ ⋅ . The L requirement for back to back topology is

1

1 1in _ peak s v in _ peak s2M I 2V T G V TΔ = ⋅ . In the positive gain region,

quasi-Z-source topology has the duty ratio smaller than 0.5, so the inductance requirement is much smaller than back to back topology. The requirement for capacitor value of quasi-Z-source topology can be analyzed in the following: In state I,

DC1 in out in1 Di i i i−= − = ; and in state II,

C1 L1 ini i i= − = − .The am-seconds in the positive cycle is i t D i Tin sΔ⋅ = ⋅ , which maintains the same in negative cycle. So the requirement for the capacitor is

inC D I T / VΔ= ⋅ ⋅ . The capacitance is much smaller than the capacitance requirement for rectifier [20] in back to back converter. In conclusion, the quasi-Z-source AC-AC converter can have much smaller passive component requirement than the conventional back to back topology with the same voltage gain.

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V. VOLTAGE SAG AND SWELL COMPENSATION ALGORITHM

The compensated voltage for the incorrect phase is the resultant sum of the output of ac-ac converter from other two phases. The phase angle of the desired injected voltage decides the operation region of the quasi-Z-source AC-AC converter. As shown in Fig.8 (a), if the desired injected voltage is in phase with phase a, so the both phase b and phase c converters operate in negative gain region. If the angle is between 2400

and 3000 as shown in Fig.8(b), phase b converter works in negative gain region and phase c works in positive gain region. Similarly, if the angle is between 1200

and 2400, both gains are positive; if the angle is between 600

and 1200, phase c gain is negative and phase b is positive; if the angle is between -600 and 600, both gains are negative. To generate the desired injected voltage, the following algorithm is applied (assume it is the case of Fig.8(b)):

a a4 5b c3 32 2

b c3 3

V VG sin( ), G sin( )

V sin V sinπ π

π π

Δ Δθ θ

−= − = −

⋅ ⋅ (3)

So the duty cycle can be calculated from the voltage gain and be added as the feed-forward in the rms voltage feedback closed-loop control of this converter. In case of symmetrical voltage sag or swell, more than 50% of sag/swell can be compensated by the proposed voltage supporter, as shown in Fig.8(c). This converter can output bucked/boosted, in-phase or out-of-phase voltage, so the injected voltage can be in any quadrant of the x-y plane, not like the traditional ac-ac converter, which can only inject a voltage within 060± with respect to the pre-sag voltage. However, the proposed topology still has the following disadvantages over the conventional back to back topology: the voltage harmonics cannot be compensated, and the required power is drawn from the incorrect phase in case of symmetric sag compensation.

VI. SIMULATION AND EXPERIMENTAL RESULTS

(a)

Va_ after compensation

Injected Voltage

Va_before compensated

Vbo and Vco

Vb & Vc

(b)

Fig. 9. Simulation Results. (a) AC chopper waveforms with duty cycle equal to 0.3 and 0.7 (b) Compensation of 60% voltage sag depth using the proposed topology.

Simulation study is conducted using Saber Sketch, and its parameters are as follows: Vin=170V peak, 60Hz, switching frequency=10kHz, load R=20 Ω , C1=C2=10uF, L1=L2=1mH, filter L3=1mH, C3=10uF. Fig. 9 (a) shows the output voltage before filter and after filter, and also the input current at duty cycle equal to 0.3 and 0.7 respectively. The voltage amplitude gain and phase angle are identical to Fig.4. Fig. 9 (b) shows the voltage compensation at symmetric voltage sag of 60%. It shows the pre-sag and post-sag of phase a, b, c voltage, the output voltage of phase b and phase c chopper, the injected voltage and the phase a voltage after compensation. It is observed that this voltage supporter can maintain the load voltage at 1 p.u. It has a half cycle regulation time because the converter is in rms voltage control.

A single phase quasi-Z-source AC-AC converter performance has also been verified through experiments. An 600V/200A reverse-blocking IGBT and diodes bridge based prototype has been built in the lab and the results are shown in Fig. 10. Experiments are conducted for a reduced scale of 50V input. The chosen ac chopper parameters are the same as the simulation. The waveforms of input and output voltage at different duty cycle are shown in Fig.10 (a)-(f). And the output voltage and input current are shown in (g)-(h). Fig. 11 shows the calculated and measured voltage gain curves at a resistive load R=20 Ω . They match each other at a low voltage gain. When the voltage gain becomes high like 2 or 3, the measured voltage gain is smaller than the

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Fig. 10 Experimental results: (a)-(f) input voltage (red, above) and output voltage (yellow,below)

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0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1-4

-3

-2

-1

0

1

2

3

4

D

Vol

tage

Tra

nsfe

r R

atio

G

vovin

Fig. 11. Calculated and measured output

calculated one. The reason is the power loss caused by the switch voltage drop and resistor in the inductor becomes more dominant when the power goes high. But the calculation ignores these factors.

VII. CONCLUSIONS A new interphase quasi-Z-source AC-AC voltage compensator for microgrid has been proposed in this paper. The voltage-fed quasi-Z-source ac-ac converter can provide a larger range of output ac voltage with buck-boost, reversing or maintaining phase angle. It is suitable to be applied in the voltage sag/swell compensator because the amplitude of the injected voltage can be varied in a large range and the phase angle can rotate in the whole x-y plane. Thus it is able to compensate more than 100% for single-phase sag and more than 50% than three phase sag. In single-phase sag, the interphase topology makes the energy taken from healthy phases, without any burden on faulty phase. A prototype of a single phase voltage-fed quasi-Z-source converter has been built and operated to verify the circuit features.

REFERENCES

[1] C. Liu, B. Wu, N. R. Zargari, D. Xu, and J. Wang, ―A novel three-

phase three-leg AC/AC converter using nine IGBTs,‖ IEEE Trans. Power Electron., vol. 24, no. 5, pp. 1151-1160, May 2009.

[2] T. Wijekoon, C. Klumpner, P. Zanchetta, and P. W. Wheeler, ―Implementation of a hybrid ac–ac direct power converter with unity voltage transfer,‖ IEEE Trans. Power Electron., vol. 23, no. 4, pp. 1918-1926, July 2008.

[3] R. Lai, F. Wang, R. Burgos, Y. Pei, D. Boroyevich, B. Wang, T. A. Lipo, V. D. Immanuel, and K. J. Karimi, ―A systematic topology evaluation methodology for high-density three-phase PWM ac-ac converters,‖ IEEE Trans.Power Electron., vol. 23, no. 6, pp. 2665-2680, Nov. 2008.

[4] M. Kazerani, “A direct AC/AC converter based on current-source converter modules,” IEEE Trans. Power Electron., vol. 18, no. 5, pp. 1168–1175, Sep. 2003

[5] O. C. Montero-Hernandez and P. N. Enjeti, “Application of a boost ac–ac converter to compensate for voltage sags in electric power distribution systems,” in Proc. Power Electron. Spec. Conf., Galway, Ireland, Jun. 2000, vol. 1, pp. 470–475.

[6] J.W. Kolar, F. Schafmeister, S. D. Round, and H. Ertl, “Novel three-phase ac–ac sparse matrix converters,” IEEE Trans. Power Electron., vol. 22,

[7] L. G. de Vicuna, M. Castilla, J. Miret, J. Matas, and J. M. Guerrero, ―Sliding mode control for a single-phase ac/ac quantum resonant converter,‖ IEEE Trans. Ind. Electron., vol. 56, no. 9, pp. 3496-3504, 2009.

[8] N. A. Ahmed, K. Amei, and M. Sakui, ―A new configuration of single-phase symmetrical PWM ac chopper voltage controller,‖ IEEE Trans. Ind. Electron., vol. 46, no. 5, pp. 942-952, 1999.

[9] D. H. Jang, and G. H. Choe, ―Step-up/down ac voltage regulator using transformer with tap changer and PWM ac chopper,‖ IEEE Trans. Ind. Electron., vol. 45, no. 6, pp. 905-911, Dec. 1998.

[10] D. Chen, and J. Liu ―The uni-polarity phase-shifted controlled voltage mode AC-AC converters with highfrequency AC link‖ IEEE Trans. Power Electron., vol. 21, no. 4, pp. 899-905, July 2006.

[11] F. L. Luo, and H. Ye, ―Research on dc-modulated power factor correction ac/ac converters,‖ in Proc. IEEE IECON’07, 2007, pp. 1478-1483.

[12] F. Z. Peng, “Z-Source Inverter,” IEEE Transactions on Industry Applications, vol. 39, No. 2, pp. 504-510, March/April 2003.

[13] X. P. Fang, Z. M. Qian, and F. Z. Peng, "Single-phase Z-source PWM ac-ac converters," IEEE Power Electron.Letters, vol.3, no. 4, pp. 121-124, 2005.

[14] Y. Tang, S. Xie, and C. Zhang, ―Z-source ac-ac converters solving commutation problem,‖ IEEE Trans. Power Electron., vol. 22, no. 6, pp. 2146-2154, 2007.

[15] M. K. Nguyen, Y. G. Jung, and Y. C. Lim, ―Voltage swell/sag compensation with single-phase Z-source AC/AC converter,‖ in Proc. EPE’09, 2009, pp. P.1-P.8.

[16] Anderson, J.; Peng, F.Z.; , "Four quasi-Z-Source inverters," Power Electronics Specialists Conference, 2008. PESC 2008, IEEE , vol., no., pp.2743-2749, 15-19 June 2008

[17] Nguyen, M.-K.; Jung, Y.-G.; Lim, Y.-C.; , "Single-Phase AC-AC Converter Based on Quasi-Z-Source Topology," Power Electronics, IEEE Transactions on , vol.PP, no.99, pp.1-1, 0

[18] Subramanian, S.; Mishra, M.K.; , "Interphase AC–AC Topology for Voltage Sag Supporter," Power Electronics, IEEE Transactions on , vol.25, no.2, pp.514-518, Feb. 2010

[19] Xupeng Fang; , "A novel Z-source dc-dc converter," Industrial Technology, 2008. ICIT 2008. IEEE International Conference on , vol., no., pp.1-4, 21-24 April 2008

[20] Xi Lu; Fang Zheng Peng; , "Minimizing DC capacitor current ripple and DC capacitance requirement of the HEV converter/inverter systems," Energy Conversion Congress and Exposition, 2009. ECCE 2009. IEEE , vol., no., pp.1191-1198, 20 -24 Sept. 2009

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