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Modeling and Controlling of IPFC Based Current-Source Converter Ali Ajami Electrical Engineering Department Azarbaijan University of Tarbiat Moallem Tabriz, Iran [email protected] Abdel-rahim kami Electrical Engineering Department Azarbaijan University of Tarbiat Moallem Tabriz, Iran [email protected] Abstract— A new concept of the FACTS controller is Interline Power Flow Controller (IPFC) for series compensation with the unique capability of controlling power flow among multi-lines within the same corridor of the transmission line. The IPFC employs two or more Voltage Source Converters (VSC) with a common dc-link. Each VSC can provide series compensation for the selected line of the transmission system (master or slave line) and is capable of exchanging reactive power with its own transmission system. In this paper, a current-source converter topology based IPFC is proposed. In this structure, the dc-side current is regulated to a value larger than the peak value of the maximum line current. The injected voltage is controlled according to the desired reactive power compensation and management active power flow for master line. The decoupled state-feedback control for the injected voltage with a separated dc current control is applied to the proposed system. The proposed IPFC has been simulated using the Matlab/Simulink program. Keywords- IPFC, CSC, linear model, decoupled state- feedback control I. INTRODUCTION Today the FACTS (Flexible AC Transmission System) are the known devices as a satisfied solution the problems of power systems such as power flow limits, transient and dynamic stability. The family of compensators and power flow controllers based on VSC are the Static Synchronous (shunt) Compensator (STATCOM) [1], the Static Synchronous Series Compensator (SSSC) [2], the Unified Power Flow Controller (UPFC) [3] and the Interline Power Flow Controller (IPFC) [4]. The FACTS controllers can be realized by either a voltage-source converter (VSC) or a current-source converter (CSC). But the choice of VSC over CSC because of the advantage of this topology respect to other, such as simplicity of control and higher efficiency as well as for the choice of CSC topology over VSC, there is the advantages such as more complicated control, lower efficiency. The interline power flow controller (IPFC) proposed by Gyugyi et al in 1998 [5], is used as a powerful and newest tool for the cost effective utilization of multiple transmission lines by facilitating the independent control both the real and reactive power flow in own power system [6]. This device in the papers is modeled by using VSC topology so far and researchers less proceeds at modeling IPFC based on CSC topology. In this paper, IPFC based on the current-source converter topology is proposed. For simplicity, we analyze the IPFC with only two CSC, in which one CSC is called Master CSC, while the other CSC is called Slave CSC, which provides appropriate power to the Master CSC so that it can only regulate one variable. For the modeling, first a linear dynamic model of IPFC is introduced, which is independent of the operating point. Then, the decoupled state feedback control technique with a reduced-order state estimator is formulated and applied to the IPFC. Finally, the performances of the IPFC during the steady-state and in response to step changes in the reference values of the system voltage are evaluated using the simulation results from Matlab/Simulink software. II. MODELING AND CONTROL OF CSC-BASED IPFC The schematic diagram of a CSC-based IPFC is shown in fig.1. It is connected in series with the transmission lines through three single transformers. The transmission lines are modeled with R-L circuit in both side, represented as R L1 -L L1 and R L2 -L L2 . The primary side of each transformer is connected in series with the transmission line. The secondary sides of transformers are connected as Y form. The main functions of IPFC control system are dc-side current regulating and introduce proper control signals in order to exchange the required active and reactive powers with AC power system. In Fig. 1, transformers are modeled as a combination of an ideal transformer and a series R 1 -L 1 , R 2 -L 2 impedance. The turn ratio of the transformers is n:1. The injected voltage to Master line is called V inja1 , V injb1 , and V injc1 and the injected voltage to Slave line is called V inja2 , V injb2 , and V injc2 respectively, for the three phases. In Fig. 1, only V inja1 , V inja2 is shown. The series CSC injects its output voltage in the transmission line via a series coupling transformer. In this paper, we use injected voltage source Model of IPFC (V inj1 , V inj2 ) for fundamental frequency studies in which by regulating the amplitude and angle of its output voltage it can change both the active and reactive power in the line. In Fig.1 C, L dC and R dc are the filter capacitor, the smoothing inductor and the resistor represents the converter losses respectively. [i 1 ]=[i a1 i b1 i c1 ] T , [i 2 ]=[i a2 i b2 i c2 ] T denotes the currents on the secondary side of Master and Slave lines, [v 1 ]=[v a1 v b1 v c1 ] T , [v 2 ]=[v a2 v b2 v c2 ] T denotes the voltages across the filtering capacitors for CSC of Master and Slave 2009 Second International Conference on Computer and Electrical Engineering 978-0-7695-3925-6/09 $26.00 © 2009 IEEE DOI 10.1109/ICCEE.2009.178 353 2009 Second International Conference on Computer and Electrical Engineering 978-0-7695-3925-6/09 $26.00 © 2009 IEEE DOI 10.1109/ICCEE.2009.178 353

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Modeling and Controlling of IPFC Based Current-Source Converter

Ali Ajami

Electrical Engineering Department

Azarbaijan University of Tarbiat Moallem

Tabriz, Iran

[email protected]

Abdel-rahim kami

Electrical Engineering Department

Azarbaijan University of Tarbiat Moallem

Tabriz, Iran

[email protected]

Abstract— A new concept of the FACTS controller is Interline Power Flow Controller (IPFC) for series compensation with the unique capability of controlling power flow among multi-lines within the same corridor of the transmission line. The IPFC employs two or more Voltage Source Converters (VSC) with a common dc-link. Each VSC can provide series compensation for the selected line of the transmission system (master or slave line) and is capable of exchanging reactive power with its own transmission system. In this paper, a current-source converter topology based IPFC is proposed. In this structure, the dc-side current is regulated to a value larger than the peak value of the maximum line current. The injected voltage is controlled according to the desired reactive power compensation and management active power flow for master line. The decoupled state-feedback control for the injected voltage with a separated dc current control is applied to the proposed system. The proposed IPFC has been simulated using the Matlab/Simulink program.

Keywords- IPFC, CSC, linear model, decoupled state-

feedback control

I. INTRODUCTION

Today the FACTS (Flexible AC Transmission System) are the known devices as a satisfied solution the problems of power systems such as power flow limits, transient and dynamic stability. The family of compensators and power flow controllers based on VSC are the Static Synchronous (shunt) Compensator (STATCOM) [1], the Static Synchronous Series Compensator (SSSC) [2], the Unified Power Flow Controller (UPFC) [3] and the Interline Power Flow Controller (IPFC) [4]. The FACTS controllers can be realized by either a voltage-source converter (VSC) or a current-source converter (CSC). But the choice of VSC over CSC because of the advantage of this topology respect to other, such as simplicity of control and higher efficiency as well as for the choice of CSC topology over VSC, there is the advantages such as more complicated control, lower efficiency.

The interline power flow controller (IPFC) proposed by Gyugyi et al in 1998 [5], is used as a powerful and newest tool for the cost effective utilization of multiple transmission lines by facilitating the independent control both the real and reactive power flow in own power system [6]. This device in the papers is modeled by using VSC topology so far and researchers less proceeds at modeling IPFC based on CSC topology.

In this paper, IPFC based on the current-source converter topology is proposed. For simplicity, we analyze the IPFC with only two CSC, in which one CSC is called Master CSC, while the other CSC is called Slave CSC, which provides appropriate power to the Master CSC so that it can only regulate one variable. For the modeling, first a linear dynamic model of IPFC is introduced, which is independent of the operating point. Then, the decoupled state feedback control technique with a reduced-order state estimator is formulated and applied to the IPFC. Finally, the performances of the IPFC during the steady-state and in response to step changes in the reference values of the system voltage are evaluated using the simulation results from Matlab/Simulink software.

II. MODELING AND CONTROL OF CSC-BASED

IPFC

The schematic diagram of a CSC-based IPFC is shown in fig.1. It is connected in series with the transmission lines through three single transformers. The transmission lines are modeled with R-L circuit in both side, represented as RL1-LL1

and RL2-LL2. The primary side of each transformer is connected in

series with the transmission line. The secondary sides of transformers are connected as Y form. The main functions of IPFC control system are dc-side current regulating and introduce proper control signals in order to exchange the required active and reactive powers with AC power system.

In Fig. 1, transformers are modeled as a combination of an ideal transformer and a series R1-L1, R2-L2 impedance. The turn ratio of the transformers is n:1. The injected voltage to Master line is called Vinja1, Vinjb1, and Vinjc1 and the injected voltage to Slave line is called Vinja2, Vinjb2, and Vinjc2 respectively, for the three phases. In Fig. 1, only Vinja1, Vinja2 is shown. The series CSC injects its output voltage in the transmission line via a series coupling transformer. In this paper, we use injected voltage source Model of IPFC (Vinj1, Vinj2) for fundamental frequency studies in which by regulating the amplitude and angle of its output voltage it can change both the active and reactive power in the line. In Fig.1 C, LdC and Rdc are the filter capacitor, the smoothing inductor and the resistor represents the converter losses respectively. [i1]=[ia1 ib1 ic1]

T , [i2]=[ia2 ib2 ic2]

T denotes the

currents on the secondary side of Master and Slave lines, [v1]=[va1 vb1 vc1]

T , [v2]=[va2 vb2 vc2]

T denotes the voltages

across the filtering capacitors for CSC of Master and Slave

2009 Second International Conference on Computer and Electrical Engineering

978-0-7695-3925-6/09 $26.00 © 2009 IEEE

DOI 10.1109/ICCEE.2009.178

353

2009 Second International Conference on Computer and Electrical Engineering

978-0-7695-3925-6/09 $26.00 © 2009 IEEE

DOI 10.1109/ICCEE.2009.178

353

lines, and [ii1]=[iia1 iib1 iic1]T , [ii2]=[iia2 iib2 iic2]

T denotes the

CSC terminal current of Master and Slave lines respectively. After applying Park transformation, the above variables become [I1]=[Id1 Iq1]

T , [I2]=[Id2 Iq2]

T , [V1]=[Vd1 Vq1]

T ,

[V2]=[Vd2 Vq2]T.

Fig. 1. CSC-based IPFC

The CSC can be controlled by the tri-level SPWM

technique [7] in which case it behaves as a 3-phase linear power amplifier. The CSC under tri-level SPWM control can be modeled as:

111 dcaia Imi =

(1)

111 dcbib Imi =

(2)

111 dccic Imi =

(3)

222 dcaia Imi =

(4)

222 dcbib Imi =

(5)

222 dccic Imi =

(6)

The power balance equation for the IPFC considered is:

dcRlosssese PPPP +=+ 21

(7)

Where Pse1 and Pse2 are 3-phase instantaneous AC power going into series converter 1 (Master line) and series converter 2 (Slave line) respectively, while PRloss represents

losses in converter circuits and Pdc is the DC power at DC Inductor. By neglecting transformer losses and assuming fundamental frequency balanced conditions, 3-phase instantaneous powers, for the series converter 1 and 2, respectively, are given as:

)cos(VIP injacase 1111 3 δ=

(8)

)cos(VIP injacase 2222 3 δ=

(9)

In equations (8),(9) , Iaca1, Iaca2 are RMS values of transmission line currents; Vinj1 , Vinj2 are RMS values of voltages across the primary side of series transformers; while

angles δ1 and δ2 represent phase shift between line currents and series inserted voltages.

The DC current equation can be obtained by substituting Pse1 and Pse2 by equation (7), (8) and (9):

)cos(VI)cos(VI

IRIdt

dLI

injacinjac

dcdcdcdcdc

222111

2

33 δ+δ

=+

(10)

Where ma1, mb1, mc1 and ma2, mb2, mc2 are the modulation indexes of the 3 phases, normalized to the peak of the triangular carrier signal. The modulation signals can also be transformed into d-q frame. Thus, (1) to (6) can be re-written as:

111 dcdid IMI =

(11)

111 dcqiq IMI =

(12)

222 dcdid IMI =

(13)

222 dcqiq IMI =

(14)

Consider the line current of phase-a in Master line as the reference phasor for the d-q transformation for variables of Master line and the line current of phase-a in Slave line as the reference phasor for the d-q transformation for variables of Slave line, the dynamic equations from the converter to the secondary side of the transformer are:

11

1

11

1

1

11dcdqdd IM

cVI

cV

dt

d−ω+=

(15)

11

1

11

1dcqdq IM

cVV

dt

d−ω−=

(16)

22

2

22

2

2

11dcdqdd

IMc

VIc

Vdt

d−ω+=

(17)

22

2

22

1dcqdq IM

cVV

dt

d−ω−=

(18)

The input variable, are Md1, Mq1 , Md2 and Mq2 and the output variables are IdC and Vd1 ,Vq1 and Vd2 ,Vq2 that given by equation (10), (15) to (18) which are chosen based on the control objectives of the IPFC. The above system is nonlinear. A common method to deal with the nonlinearity is to linearization the equations around an operating point. But, in this particular case, since the nonlinearity is caused by Id. and the dynamics of Id, is slower than those of vd and Vq, it is possible to divide the system into an inner control loop and an outer control loop, where the two loops can be deal with separately.

The inner loop is the linear part of the system. The model is:

1

1

11

1

1

11idqdd I

cVI

cV

dt

d−ω+=

(19)

1

1

11

1iqdq I

cVV

dt

d−ω−=

(20)

2

2

22

2

2

11idqdd I

cVI

cV

dt

d−ω+=

(21)

2

2

22

1iqdq I

cVV

dt

d−ω−=

(22)

In this system, Iid1, Iiq1, Iid2 and Iiq2 are the inputs, Vd1, Vq1, Vd2 and Vq2 are the state variables, as well as the

354354

outputs, (w, C1 and C2 are constant values, and Id1, Id2 is the line current). From the control view, Id1, Id2 can be considered as a ‘measurable disturbance input’, since it is neither a state variable, nor an input or output. The dynamic model in the matrix form is:

FeBUAXX ++=& (23)

CXY = (24)

Where,

[ ]Tqdqd VVVVX 2211=

;

[ ]Tiqidiqid IIIIU 2211=;

[ ]Tqd IIe 11=

;

[ ]Tqdqd VVVVY 2211= ;

ω−

ω

ω−

ω

=

000

000

000

000

A

;

=

2

2

1

1

1000

01

00

001

0

0001

c

c

c

c

B

;

=

00

10

00

01

2

1

c

c

F

;

=

1000

0100

0010

0001

C

For a linear system represented by (23) and (24), it is

easy to design a state feedback controller [4] so that the output variables follow the reference input variables and are not influenced by the disturbance input. The controller can be in the form of

MeTYKXU ref ++−=

(25)

Where

[ ]Trefqrefdrefqrefdref VVVVY 2211= is the reference

input;

K is a 22× constant state feedback matrix;

T is a 22× constant diagonal gain matrix; and

M is a 12× constant vector. The closed-loop input-output relationship is

)e)FBM(BTY()BKASI(CY ref +++−= −1

(26)

In this particular case, it is possible to find a K, such that the matrix C(SI-A+BK)

-lB be a diagonal matrix (implying a

decoupled system) and the poles can be placed at the desired locations. The procedure of finding K is straightforward.

Suppose

=

44434241

34333231

24232221

14131211

KKKK

KKKK

KKKK

KKKK

K

(27)

Calculate the closed form of C(sI-A+BK)

-lB. The result

is a 44 × matrix. Choose the entries of K to make the matrix C(SI-A+BK)

-lB diagonal and place the poles at the desired

locations. In this case, one can choose

−ω

ω−−

−ω

ω−−

=

222

222

111

111

00

00

00

00

cPc

ccP

cPc

ccP

K

(28)

Where, P1, P2 is a positive value and the point (-P1, 0),

(-P2, 0) is the location of Forth poles of the closed-loop system.

After K is designed, T can be chosen to make the closed-loop gain equal to unity which means that in the steady state,

the relationship refYY = holds.

In this case, the matrix T is

= 0

000

000

000

000

22

22

11

11

cP

cP

cP

cP

T

(29)

The matrix M should be designed in such a way that the

output Y is influenced by the disturbance e as slightly as possible. The ideal case is that C(SI-A+BK)

-1 (BM+F) is 0.

The result in this case is

=

00

10

00

01

M

(30)

The final closed-loop transfer function is:

+

+

+

+

=

refq

refd

refq

refd

q

d

q

d

V

V

V

V

Ps

P

Ps

P

Ps

P

Ps

P

V

V

V

V

2

2

1

1

2

2

2

2

1

1

1

1

2

2

1

1

000

000

000

000

(31)

It is a decoupled system. The transient response time is

determined by p. The steady state error is 0.

355355

The only unsolved problem for this system is how to get the reference values. There are four reference values, Vd1ref, Vq1ref, Vd2ref and Vq2ref. These signals are adjusted to desired values by proportional-integral (PI) control loops. The active or reactive transmitted power is compared to a reference value and a PI controller is used to amplify the error signal in the Master line control loop and the control loop for absorb or inject reactive power in the slave line is like control loop of Master line while supply the required active power for the master system (See fig.2 and fig.3). The gains are selected to provide stable operation of the IPFC under steady state conditions.

Fig.2 Control block diagram of Master line IPFC.

Fig.3 Control block diagram of Slave line IPFC.

III. TEST SYSTEM AND RESULTS

The test power system (see Fig. 1) which has been

modeled with Matlab/Simulink is consists of two identical

transmission systems. The simulated power system is

composed of two voltage sources at the sending- and

receiving-ends of a transmission lines. The test system

parameters are given in the Appendix. Figures 4-8 show how the system responses to a step

change in the active power requirement for Master Line (first Pref is 0.3 pu and next 0.25 at t = 2 s and at t = 4 s become again 0.3 pu and Qref is 0.1 pu). Here, the active and reactive power requirement is represented by the reference value of Master line active and reactive transmitted power. While the Slave line control system not only absorb enough active power to compensate of CSC losses, but it must also supply the required active power for the master system. Consequently, the slave system provides a constant dc current ( Idc = 0.1 pu) for the master system and acts as an

Energy Storage System (ESS) and the reactive transmitted power in the Slave line is kept at reference value ( Qline2 = 0.05 pu ).

Fig. 5. Changes of transmitted active power of master line for Step change

at the line active power reference value.

Fig. 6. Changes of transmitted reactive power of master line for Step

change at the line active power reference value.

Fig. 4. Changes of DC current for Step change at the line active power

reference value

356356

Time (s)

Fig. 7. Changes of transmitted active power of slave line for Step

change at the line active power reference value.

Fig. 8. Changes of transmitted reactive power of slave line for Step

change at the line active power reference value.

IV. CONCLUSION

In this paper, the IPFC based on the current source

converter (CSC) topology is proposed. The dynamic model

of the system is derived and divided into a linear part and a

nonlinear part. The linear part is controlled in an inner loop

by a decoupled state-feedback controller. The nonlinear part

is controlled in an outer loop by a PI controller which

regulates the dc side current. The steady-state performances

of the IPFC are evaluated using the simulation results from

Matlab/Simulink program.

V. APPENDIX

System data is referred to a per unit system with Pbase=300 MVA and Vbase=138 kV. The value of Ldc= 1 pu, C1=C2=0.1 pu , f= 60 Hz , RL1= RL2 =14 ohm LL1= LL2=0.157 H, R1=R2=1 ohm ,L1=L2= 0.05234 H,δ1=δ2=30°.

REFERENCES

[1] [1] Pranesh Rao, M. L. Crow and Zhiping yang, “STATCOM Control for Power System Voltage Control Applications,” IEEE Transactions on Power Delivery, vol. 15, No. 4, October 2000, pp. 1311-1317.

[2] [2] L. Gyugyi, “Dynamic Compensation of AC Transmission Lines by Solid-State Synchronous Voltage Scources”, IEEE Transactions on Power Delivery, vol. 9, no. 2, April 1994,p.904-911.

[3] [3] Higorani, N.G, Gyugyi,L., Understanding FACTS Devices, IEEE Press 2000.

[4] [4] Laszlo Gyugyi, Kalyan k.Sen, Colin D. Schauder, “The Interline Power Flow Controller Concept: A New Approach to Power Flow Management in Transmission System,” IEEE Trans. Power Delivery, vol.14, no.3, pp. 1115-1123, 1999.

[5] [5] L.Gyugyi, k.k.sen, C.D.Schauder, “ The Interline power flow controller Concept: A New Approach to Power Flow Management in Transmission Systems”, IEEE/PES Summer Meeting, Paper No. PE316-PWRD-0-07-1998,San Diego, July 1998.

[6] [6] Jianhong Chen, Tjing T.Lie, D.M. Vilathgamuwa , “Design of An Interline Power Flow Controller”, 14th PSCC, Sevilla, Spain, June 24-28, 2002.

[7] X. Wang, “Advances in Pulse Width Modulation Techniques”, Ph.D. Thesis, Dept. of Electrical Engineering, McGill Univemity, March 1993.

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