Self-healing and Fault-tolerance Abilities Development in Embryonic Systems

Implemented with FPGA-based Hardware

Cs. Szász, V. Chindri Department of Electrical Engineering

Technical University of Cluj, Cluj-N, 400020, Romania e-mail: Csaba.Szasz@edr.utcluj.ro

Abstract— The cell-based structure, which makes up the majority of biological organisms offers the ability to grow with fault-tolerance abilities and self-repair. By adapting these mechanisms and capabilities from nature, scientific approaches have helped researches understand related phenomena and associated with principles to engine complex novel digital systems and improve their capability. Founded by these observations, the paper is focused on computer-aided modeling, simulation and experimental research of embryonic systems fault-tolerance and self-healing abilities, with the purpose to implement VLSI hardware structures which are able to imitate cells or artificial organism operation mode, with similar robustness properties like their biological equivalents from nature. The presented theoretical and simulation approaches were tested on a laboratory prototype embryonic system (embryonic machine), built with major purpose to implement self-healing properties of living organisms.

I. INTRODUCTION As well-known, the latest generations of VLSI (Very

Large Scale Integrated) circuit’s-based digital systems are characterized by highly computational and processing power, implemented on complex hardware architectures. Beside of its huge benefits in the control solutions implementation, unfortunately they introduce for designer engineers also a lot of difficulties booth in the fault detection and fault elimination operations [1], [2].

The solution from all these inconveniences seems to be offered by researchers from microelectronic sciences which have early discovered, that, by adopting self-healing and surviving mechanisms of biological organisms from nature, becomes possible to design complex novel digital systems provided with highly fault-tolerance and robustness properties. The basic idea is to imitate the biological organism’s cell-based structure which involve nearly perfect self-organization, self-reproduction (multiplying), and fault-tolerance properties in a well organized hierarchical mechanism. Focusing on this strategy, it is expected to implement VLSI hardware structures able to simulate biological cells or artificial organism basic functions in similar mode with their equivalents from the living world [3], [4].

All these research efforts are based on a new concept born on digital systems design: the embryonic systems.

For this reason, basic concepts from cellular embryonic theory can be used for VLSI digital systems design. Therefore terms like artificial molecule, artificial cell and artificial organism are key concepts in developing and implementing embryonic hardware systems [5], [6].

II. CELL-BASED ARTIFICIAL STRUCTURES FOR VLSI HARDWARE IMPLEMENTATION

Considering the observations made in the previous chapter, the paper presents some research efforts regarding the development of an FPGA-based artificial cell model with a generalized character, in order to reproduce with high fidelity the complex phenomena and interaction rules inside embryonic hardware systems. For this reason, an original structure for the artificial cell is proposed, as shown in figure 1. According to this model, each FPGA circuit is considered an artificial cell with 4 lattices capable of full operation in a network structure through specially defined data and control buses [7].

Fig. 1. Hardware model for an FPGA-based artificial cell

Each lattice of the artificial cell has the same number of input/output bits and configuration structure, with the same operation functions. For example, the upper-lattice of the artificial cell has the following configuration:

- UI (b0ui, b1ui, b2ui, b3ui) - the data bus (4 input bits) to receive information from the upper neighbor cell;

215978-1-4244-4113-6/09/$25.00 ©2009 IEEE978-1-4244-4113-6/09/$25.00 ©2009 IEEE

- CkuI - the input data bus synchronization clock; - UO (b0uo, b1uo, b2uo, b3uo) - the data bus (4 output bits) to send information to the upper neighbor cell; - CkuO - the output data bus synchronization clock; - AuI - signal received from the upper cell (alive=1, dead=0)/data transaction enable signal; - AuO - the cell’s internal signal (alive=1, dead=0)/data receive enable signal.

The same 12-bit configuration is used for the left, right, and down lattice of the artificial cell, and is specially designed for the full-operation of each FPGA circuit in a bi-dimensional artificial cell network.

Obviously, the proposed model is far not so complex; one artificial cell structure is suitable for convenient implementation also into one of the first generations Xilinx FPGA circuit. With the purpose to facilitate the operation algorithms for software implementation, the communication strategy between these cells is designed to work in a synchronous mode. It is well-known, that now, the clock rate of several generation FPGA circuit’s is up to 200MHz. In this case, a maximal rate of 1MHz is limited, with the purpose to avoid inherent electrical noises and perturbations in the cells via-bus communication process. Moreover, for convenient visual monitoring of the cells interoperation, it is recommended, in the first experiments, to decrease this communication clock rate nearly up to 50-100Hz.

With the purpose of facilitating the research and modeling process, the artificial cells are organized in macro-groups of cell networks, each with 9 artificial cells, as it is presented in figure 2. In the software model indicated in this figure, each cell is an autonomous FPGA array, with special functions inside the organism, defined through an instruction set (program), and called the cell’s gene. Each cell has a copy of all genes from the organism (operative genome), and depending on the cell’s position inside the organism, only one cell has a gene operative (the cell’s differentiation properties) [7].

Fig.2. Model of an artificial cell network (cluster)

In the presented model, the operative genome is designed with 5 genes (A, B, C, D, and E), and at the same time just one gene is shown active (highlighted in the figure). The cells which don’t show any operative gene are considered spare cells (4 cells from the total of 9

in a cluster indicated in figure 3). It is important to note, that the implemented genes are generically labeled in the model with A, B, C, D, and E, but they can represent a wide range of control algorithms and programs (industrial process control, electrical motors control, etc.) defined by the software initialization process [8].

Fig. 3. Model of the artificial organism

In accordance with the above mentioned strategy, in figure 3 an artificial organism model build with 4 macro-group artificial cell network (clusters) is presented. In this model, a network with up to 40x40=1600 artificial cells is possible to be simulated. All cells in the artificial organism’s structure are working according to the rules and communication abilities described in the FPGA-based model in chapter III.

III. SELF-HEALING AND FAULT-TOLERANCE PROPERTIES SIMULATION

Some aspects of communication rules regarding the fault-tolerance and self-healing phenomena in the cluster are presented in the block diagram given in figure 4.

dead cell

informed cell

Fig. 4. Fault in the artificial cell network (cell_1_1) In first example it is considered the case when a fault, in the artificial cell_1_1 (index started from left-upper

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corner), occurs. The cell marked in figure with cross-lines is assumed now a “dead” cell, and the neighboring cells are informed about this situation through the cell’s special internal signal (cell alive=logical 1, dead cell=logical 0). The information about the fault will be propagated now in the whole cluster. The propagation path follows the next rules: in the first step the neighboring cell_2_1 and cell_1_2 are informed, in the second step cell_3_1, cell_2_2, and cell_1_3, in the third step cell_3_2, cell_2_3, and at last, the cell_3_3.

informed cell

dead cell

Fig. 5. Fault in the artificial cell network (cell_2_2) In the second example, given in figure 5, the fault occurs in cell_2_2. In this case, the whole cluster, in just two steps, will be informed about the new situation: in the first step cells 2_1, 1_2, 2_3, 3_2, and in the second step artificial cells 1_1, 3_1, 3_3, and 3_1.

The above presented fault detection rule inside the cluster can be described also with the algorithm given in figure 6.

Fig. 6. Cell faults detection algorithm

The second algorithm refers to whole replacing sequence of faulted cells with available spare cells in the same cluster. For this situation, figure 7 shows an example of network fault-tolerance when the cell with

active gene A becomes out of order. In this case, the right neighbor spare cell is activated with the same gene A.

Let’s consider now, then after a period of time, this spare cell also becomes out of order. For this reason, gene A becomes active once again in the next spare cell (in this case Cell_11), and this process can be continued until the last spare cell (Cell_9). In this way, the above presented algorithm shows the main property of the cluster: it can keep always a gene active if there is any spare cell left.

Fig. 7. Fault-tolerance methodology in the FPGA-based artificial cell network

The above explained algorithm was tested and implemented through careful computer-aided simulations. In figure 8, it is given a simulation result, when after 4 successive cell faults in the network, the gene A is still active in the last spare cell left.

Fig. 8. Fault-tolerance simulation in the FPGA-based artificial cell network

The flowchart presented bellow in figure 9 describes in a more detailed way, the computation algorithm for the cell replacing methodology.

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Fig. 9. Artificial cell replacing algorithm in the network

At first, each cell memorizes in a sorted list the identification code of all faulted cells in the considered cluster (cells’ x and y coordinates). In the next step, there is searched for a spare cell in the cluster to replace the faulted cell from the current index in the given list. This operation is performed through an imaginary clockwise rotation of the cluster by 45°. If found spare cell is available, then the faulted cell is replaced now with this cell. Else, another clockwise rotation is performed once again by 90°, in order to find an available spare cell.

This searching process is repeated toward, until a spare cell is available in the cluster. After one successfully replacing operation is done, the sorted list index is incremented and the searching algorithm is repeated toward, for the next faulted cell in the list. This algorithm is executed by all the not faulted cells (either spare or functional cells) from the considered cluster. Because all the cells receive the same information about the faulted cells, the replacing results will be the same in each case. The first algorithm presented above in figure 6 is not a computational algorithm; it means more over a principle of fault detection informing process in the cluster. In comparison with this, the second algorithm computes in an original way the spare cell’s coordinates.

Another case of the fault-tolerance simulation is the example presented in figure 10, when a fault both in an active- and spare cell occurs. In this case just one active gene (the gene named E) is affected, so it is enough to become active only the neighboring spare cell 2_1

(decimal coded 9). For the spare cell fault, which anyway doesn’t show operative genome (highlighted active gene), it is not necessary to activate any other neighboring spare cell again.

Fig. 10. Fault of two artificial cells in the network This replacing process is expressed also in the time diagrams given in figure 11.

Fig. 11. Waveforms of self-healin process in the network

Fig. 12. One cluster fault in the FPGA-based artificial cell network

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The most complex situation is achieved when a fault with all the active cells in the cluster is experimented (figure 12). In this special situation, for the network self-healing, just only the 4 spare cells can be used. But as it is known, they are not enough for the whole cluster regeneration process, so for this reason all the cluster is considered faulted, and declared as a “dead” cluster, marked with wide cross-lines in figure 12.

Fig. 13. Waveforms of self-healing process in the artificial cell network

In the numerical simulation process, this extreme

situation is indicated in figure 13 with the Active_cells.alv_cluster_2_1 signal falling from logical “1” to logical “0”. Of course, the other three clusters from the whole organism are still active, and they can be used for bio-inspired hardware operations, or other simulations and experiments.

IV. IMPLEMENTATION AND EXPERIMENTAL RESULTS The above presented numerical simulation and

software implementation results were tested through careful laboratory experimentations. It is important to mention, in the hardware implementation strategy, the designed cell network is not isolated from its neighbor environment. As shown in figure 14, there is a large variety of interconnection configurations with external electrical sensors. The captured information is processed inside the cell network, and using its fault tolerance and self-healing properties, a high performance robust control is possible to be implemented for various industrial process environments.

Fig. 14. The artificial cell network interconnection with its neighbor environment

In the first step of the experiments, the FPGA-based

artificial cell model was implemented and tested on a Xilinx XC3S100E-type circuit, embedded on a Digilent’s

Basys development board [9], [10]. Figure 15 shows this laboratory development system. Basically, the whole hardware structure is divided into two main units: the External Device (shown in the upper side of the figure) built with a PIC18F4550-type microcontroller, used for excitation signals generation, and at the bottom, the Digilent’s Basys development board. This is a platform based on a Xilinx XC3S100E FPGA, including the following features: 100.000 gate XC3S100E FPGA, JTAG programming port, XCF02S Xilinx Platform Flash ROM to store FPGA configurations, large collection of I/O devices including 8 LEDs, 4-digit 7-segment display, 4 pushbuttons, 8 slide switches, PS/2 and VGA ports, user settable oscillator (25/50/100MHz), and 4 6-pin header ports for user I/O and peripheral module connection [10]. With these features, the board provides an inexpensive, robust, and easy-to-use platform, very suitable to implement various control strategies.

Fig. 15. Development system for test operations The External Device built with the PIC18F4550-type microcontroller is an interface between the computer and artificial cell based on the Xilinx XC3S100E FPGA [9], via USB. Some experimental results, which reproduce the communication strategy between the External Device and FPGA-based artificial cell, are given through the waveforms shown bellow in figure 16. Based on Xilinx ISE 9.2 tools and ISE documentation, the results were carried out using VHDL.

Fig. 16. Waveforms of the Xilinx FPGA-based artificial cell communication with the External Device

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The investigations made on the Digilent’s Basys development board shows that the FPGA-based artificial cell model proposed in figure 3 is operational and is suitable for VLSI implementation. Figure 17 shows the designed and tested artificial cell board, based on XC2S100 FPGA circuit.

Fig. 17. The laboratory-prototype FGA-based artificial cell with the implemented gene A

This is quite similar with one artificial cell from the

network given in figure 7, which express the implemented active gene A. Beside the FPGA chip, which is the central element of the cell, in the figure, on each lattice of the board, is shown the control buses, the clock IC, the reset and configuration switches, and also a display lighting the implemented gene A.

V. CONCLUSIONS In the first part of the paper, an original structure for

the FPGA-based artificial cell is proposed and software implementation results with careful simulations of the artificial cells operation in a bi-dimensional network are presented. As a result, embryonic structure is expected to be created with the same robustness abilities of biological organisms. Two algorithms were specially developed for the fault-tolerance and self-healing properties investigation through careful numerical simulations.

The presented theoretical approaches and proposed models were carefully tested and implemented on a new generation of FPGA-based development system with a generous hardware resource, and also high-level programming and upgrading possibilities.

The proposed models and artificial structures can be a support for future developments in bio-inspired hardware systems, in order to found the theoretical basis, the design models or development methods of this new science domain named the embryonic systems. Acknowledgement

Work supported from the Romanian CNMP PNCDI2-Partnership Research Grant ElBioArch, No. 12121/2008.

REFERENCES

[1] Y. Thoma, G. Tempesti, E. Sanchez, J.M. Arostegni, “An electronic tissue for bio-inspired cellular applications” Biosystems, vol. 76, no. 1-3, pp. 191-200, August-October 2004.

[2] D. Mange, A. Stauffer, E. Petraglio, G. Tempesti, “Self-replication loop with universal construction” Physica D. vol. 191, no 1-2, pp. 178-192, April 2004.

[3] D. Mange, A. Stauffer, E. Petraglio, G. Tempesti, “Artificial cell division” Biosystems, vol. 76, no 1-3, pp. 157-167, Aug.-October 2004.

[4] A. Stauffer, D. Mange, G. Tempesti, “Bio-inspired computing machine with self-repair mechanism” Springer Berlin/Heidelberg, ISSN 0302-9743, vol. 3853, 2006.

[5] A. Upequi, Y. Thoma, E. Sanchez, A. Perez-uribe, J.M. Malho, J. Manderas, “The perplexus bio-inspired reconfigurable circuit” 2nd NASA/ESA Conference on Adaptive Hardware and Systems (AHS), pp. 600-605, 2007.

[6] A. Stauffer, D. Mange, J. Rossier, “Design of self-organized bio-inspired systems”, 2nd NASA/ESA Conference on Adaptive Hardware and Systems (AHS), pp. 413-419, 2007.

[7] Cs.Szász, V. Chindri , “Artificial life and communication strategy in bio-inspired hardware systems with FPGA-based cell networks”, 11th IEEE International Conference on Intelligent Systems, 29 June – 1 July, Budapest Hungary, pp. 77-82, 2007

[8] Cs. Szász, V. Chindri , L. Czumbil “Network communication strategy in embryonic systems with FPGA-based hardware”, IEEE SMC International Conference on Distributed Human-Machine Systems, March 9-12, 2008 Athens, Greece, pp. 468-473, 2008.

[9] Xilinx Co., Spartan-3E Families User’s Guide (www.xilinx.com), 2006, 2008.

[10] Digilent Inc. Basys Development Board, Reference Manual –digilentinc.com/Data/Products/BASYS/BASYS_C_rm.pdf, 2008.

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