icarus general trigger design

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ICARUS General Trigger Design Contributions from: M.Della Pietra, A.Di Cicco, P.Di Meo, G.Fiorillo, P.Parascandolo, R.Santorelli, P.Trattino B.Baboussinov, S.Centro, F.Pietropaolo, S.Ventura Work jointly conducted by Napoli and Padova groups

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ICARUS General Trigger Design. Work jointly conducted by Napoli and Padova groups. Contributions from: M.Della Pietra, A.Di Cicco, P.Di Meo, G.Fiorillo , P.Parascandolo, R.Santorelli, P.Trattino B.Baboussinov, S.Centro, F.Pietropaolo, S.Ventura. Segmentation and Selectivity. Muon. - PowerPoint PPT Presentation

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Page 1: ICARUS General Trigger Design

ICARUS General Trigger Design

Contributions from:

M.Della Pietra, A.Di Cicco, P.Di Meo, G.Fiorillo, P.Parascandolo, R.Santorelli, P.Trattino

B.Baboussinov, S.Centro, F.Pietropaolo, S.Ventura

Work jointly conducted by Napoli and Padova groups

Page 2: ICARUS General Trigger Design

Segmentation and Selectivity

Cosmic-ray shower Muon

Low energy electrons

Page 3: ICARUS General Trigger Design

T600 pixel definition

Rack 1Rack 20

Rack 11Rack 13

T600 Half Module – 1 chamber viewed from cathode

1 pixel area: ~ 0.6 m2

Total Number of Pixels ~ 80

32 x 9 Induction II

wires

32 x 9 Collection

wires

864 mm

Page 4: ICARUS General Trigger Design

MC simulation: low energy eventsICAFLUKA, special thanks to G. Battistoni)

Page 5: ICARUS General Trigger Design

MC simulation: high energy eventsICAFLUKA, special thanks to G. Battistoni)

Page 6: ICARUS General Trigger Design

Pixel definition

Page 7: ICARUS General Trigger Design

Trigger Input

• PMTs

• DAEDALUS

• AWS (Analog wire sum)

• External (beam profile chambers, cern-spill, …)

Page 8: ICARUS General Trigger Design

Trigger system architecture 1. LTCU:

discriminates the 18 inputs, has one independent

threshold for each input, gives two trigger proposal as output;

2. TCU: performs coincidences

between LTCUs proposals, processes the fired pixels to

study and label the event topology, requests global or local trigger;

3. Trigger Supervisor: monitoring of the trigger and

the DAQ system, statistical functions.

Page 9: ICARUS General Trigger Design

LTCU v1.0 test on Geneva prototype and LTCU v2.0

Page 10: ICARUS General Trigger Design

discriminate the inputs, coming from the v791 boards;

give as output two separate trigger proposals to the next level, one for Induction II and one for Collection;

remote control of all the board’s functionalities;

discriminators check-control;trigger rate measurements for each input.

The Local Trigger Control Unit prototype targets

Page 11: ICARUS General Trigger Design

FPGAInput stage

RS232 interface

10 MHz oscillatorPower supply

18 inputsTrigger outputs

DAC

The LTCU prototype v1.0

IN

VDAC

Discriminator

Voltage follower

RC filterOUT

IN

Page 12: ICARUS General Trigger Design

The LTCU functionalities v1.8i

Mask the input channels; Read the mask status; Set the thresholds; Monitor the trigger rate for

each input; Discriminator test mode; Select one discriminator

output put on front panel.

All the board functionalities are remotely controlled via RS232 interface.

Page 13: ICARUS General Trigger Design

Trigger rate test chain

LTCU inputs = 4 signals from collection plane;

Trigger generated from only one input (no FastOR);

LTCU trigger output distributed to V816 module.

LTCU Trigger OUT

V789

LTCU

V791Ind Coll

IN IN IN IN IN IN IN IN

OUT OUT OUTOUT OUTOUT OUT OUT

IN

OUT

IN

Analog OUT

V816

trigger

PC (RS232)

Page 14: ICARUS General Trigger Design

Trigger Rate Plateau (I)Trigger rate for v791 n°1 in LTCU ch0

0

5

10

15

20

25

0 20 40 60 80 100 120 140

Threshold (mV)

Trigger rate (Hz)

Trigger rate for v791 n°2 in LTCU ch1

0

5

10

15

20

25

0 20 40 60 80 100 120 140

Threshold (mV)

Trigger rate (Hz)

Plateau zones

Page 15: ICARUS General Trigger Design

Trigger rate for v791 n°4 in ch5

0

5

10

15

20

25

30

0 20 40 60 80 100 120 140

Threshold (mV)

Trigger rate (Hz)

Trigger rate v791 n°3 in LTCU ch4

0

5

10

15

20

0 20 40 60 80 100 120 140

Threshold (mV)

Trigger rate (Hz)

Trigger Rate Plateau (II)

Plateau zones

Page 16: ICARUS General Trigger Design

Trigger efficiency test chain

LTCU inputs = 4 signals from collection plane;

One LTCU IN and Trigger OUT digitalized by a modified V791;

PMT trigger distributed to V816 module.

PMT

V789

LTCU

V791Ind Coll

IN IN IN IN IN IN IN IN

OUT OUT OUTOUT OUTOUT OUTOUT

IN

OUT

IN

Analog OUT

V816

trigger

PC (RS232)

OUT

IN

IN

Modified V791

Page 17: ICARUS General Trigger Design

Test Results (I)

Page 18: ICARUS General Trigger Design

Test Results (II)

Problems Solutions

High frequency noise on input signal

Band-pass filter

(f-3dBH = 2 MHz , f-3dB

L = 1 kHz);

Offset for negative input isn’t a stable solution

Inverter amplifier (G=1) in the input stage;

More than 20mV white noise

New pcb (with 8 layers) and EM/RF screening

Not stable DAC threshold

Stable VREF circuit

Page 19: ICARUS General Trigger Design

LTCU prototype v2.0

Power supply an filter

Input stage (for one channel)

or

IN

Band-pass filter Selectable inverter (G=1)

VTest

VTH

OUT

IN

VTH

DAC (for one channel)

VREF

VREF for DAC

Filter for low noise performance

Stable 259mV tension circuit

VREF

EM/RF Screening for input stage

Page 20: ICARUS General Trigger Design

PWR and GND distribution for LTCU v2.0

±5A, AGND (V791 preamp. stage)

+5A1, AGND1 (V791 mux stage)

VCC, DGND (V791 digital stage)

Four GND and two PWR planes

Page 21: ICARUS General Trigger Design

Conclusions

LTCU v2.0 is being produced (5 boards);Ready to be tested on detector prototypes;Analysis of test data in progress;Article in preparation.