How to design a scalable embedded product

• Robert Thompson, Director Global i.MX Ecosystem, NXP Semiconductors

• Ofer Austerlitz, VP Business Development & Sales, Variscite

• Aviad Hadad, R&D Hardware expert, Variscite

• Pierluigi Passaro, R&D Software expert, Variscite

Speakers

supporting different NXP i.MX applications processor families

2

Webinar Agenda

The System-on-Module concept for a scalable design

NXP's i.MX 8 product portfolio

Variscite pin-to-pin System-on-Module families

How to design a scalable embedded product supporting

various i.MX processors:

• Hardware aspects

• Software aspects

• Q&As

3

Webinar Agenda

The System-on-Module concept for a scalable designOfer Austerlitz, VP Business Development & Sales, Variscite

NXP's i.MX 8 product portfolio

Variscite pin-to-pin System-on-Module families

How to design a scalable embedded product supporting

various i.MX processors:

• Hardware aspects

• Software aspects

• Q&As

4

The basis for a scalable design

The System-on-Module concept

5

Processor

eMMC (on Rear side)

Wi-Fi / Bluetooth

Gigabit Lan

RAM(1200MHz DDR4)

Audio Codec

CAN-FD Bridge

Power

LVDS bridge

The VAR-SOM-MX8M-MINIbased on i.MX 8M Mini

DART-MX8M-MINI Size: 55.0 x 30.0 mm(~2.2 x 1.2 in)

A typical System-on-Module

6

Fast time to market

Reduce R&D cost

Scalable AND Upgradeable

100% yield – All the time

Production-ready software support

Tested and used by hundreds of customers

System-on-Module:Off-The-Shelf stability, Custom design flexibility

7

Webinar Agenda

The System-on-Module concept for a scalable design

NXP's i.MX 8 product portfolioRobert Thompson, Director Global i.MX Ecosystem, NXP Semiconductors

Variscite pin-to-pin System-on-Module families

How to design a scalable embedded product supporting

various i.MX processors:

• Hardware aspects

• Software aspects

• Q&As

8

M4

i.MX 7 family

i.MX 8 family

Safety Certifiable & Efficient Performance

Flexible Efficient Connectivity

Arm® v7-A

i.i.MX 8M family

i.MX 8X family

Advanced Computing, Audio/Video & Voice

Advanced Graphics, Vision & Performance

i.MX 7ULP familyUltra Low Power with Graphics

Arm® v8-A (32-bit/ 64-bit)

Arm® v7-A (32-bit)

i.MX 6QuadPlus

i.MX 6Dual

i.MX 6Solo

i.MX 6DualLite

i.MX 6SoloLite

i.MX 6SoloX

i.MX 6UltraLite

i.MX 6DualPlus

i.MX 6Quad

i.MX 6SLL

i.MX 6ULL

M4

A53A72

Pin-

to-p

in C

ompa

tible

Softw

are

Com

patib

le

M4

A9

A9

A7

M4/M7A53

A35

M4A7

i.MX 6ULZ

i.MX 8M Family of Applications Processors

9

i.MX 8 Series: Target Applications

Advanced graphics, video, image processing, vision, audio and voice

i.MX 8 Familyi.MX 8X Familyi.MX 8M Family M4A53

GPU

Advanced Graphics, Vision & Performance

Advanced Computing, Audio/Video & Voice

Safety Certifiable & Efficient Performance

M4A35

DSPGPU

10

i.MX 8 Series: Scalable Solutions

Software Compatible (including GPU Tools)

i

. i.MX 8DualX

i.MX 8QuadXPlus,8DualXPlus

Pin Compatible Pin Compatible

Pin Compatible

i.MX 8M Mini QuadLite, DualLite, SoloLite

i.MX 8M Mini Quad, Dual, Solo

Pin Compatible

i.MX 8QuadMax,8QuadPlus

i.MX 8M Quad, Dual NEW

70% Hardware and Software Reuse

i.MX 8 Familyi.MX 8X Familyi.MX 8M Family M4A53

GPU

Advanced Graphics,Vision & Performance

Advanced Computing, Audio/Video & Voice

Safety Certifiable & Efficient Performance

M4A35

DSPGPU M4

A53A72

DSPGPU

Scalable series of three Arm V8 64-bit (/32-bit) based SoC Families

i.MX 8M QuadLite

i.MX 8DualMax

11

i.MX 8M: Scalable broad market Solutions

Software Compatible (including GPU Tools)

17x17 Package Pin Compatible 14x14 Package 15x15 Package

i.MX 8M Quadi.MX 8M Dual

i.MX 8M QuadLite

i.MX 8M MiniQuad/Dual/Solo

i.MX 8M MiniQuadLite/DualLite/SoloLite

i.MX 8M NanoQuadDual/Solo

i.MX 8M PlusQuad/Dual

i.MX 8M PlusQuad/Lite

A53 M4 GPU A53 M4 GPU A53 M7 GPU A53 M7 GPU

Available NOW Available NOW Available NOW 4Q 2020

i.MX 8M Nano Familyi.MX 8M Mini Familyi.MX 8M Quad Family i.MX 8M Plus Family

Scalable series of FOUR Arm V8 64-bit (/32-bit) based SoC Families

DSPNPU

i.MX 8M NanoQuadLite/DualLite/SoloLite

i.MX 8M NanoQuadUltraLite/DualUltraLite/SoloUltraLite

4Q 2020

11x11 Package

12

Consumer & ProAudio Systems

Smart Home & Building Automation

Industrial HMI, Vision and Automation

Enterprise, Commercial &

Healthcare

v

i.MX 8M Target Applications

13

The System-on-Module concept for a scalable design

NXP's i.MX 8 product portfolio

Variscite pin-to-pin System-on-Module families

Ofer Austerlitz, VP Business Development & Sales, Variscite

How to design a scalable embedded product supporting

various i.MX processors:

• Hardware aspects

• Software aspects

• Q&As

Webinar Agenda

1414

VAR-SOM Pin2Pin Family

NXP i.MX 8M Plus4x 2GHz Cortex-A53

VAR-SOM-MX8M-PLUS VAR-SOM-MX8X

NXP i.MX 8X4x 1.2GHz Cortex-A35

Pin2Pin Compatible

VAR-SOM-6UL

NXP i.MX 6 UL/ULL/ULZ900MHz Cortex-A7

VAR-SOM-MX6

NXP i.MX 64x 1.2GHz Cortex-A9

VAR-SOM-SOLO/DUAL

NXP i.MX 62x 1GHz Cortex-A9

VAR-SOM-MX8M-NANO

NXP i.MX 8M Nano4x 1.5GHz Cortex-A53

VAR-SOM-MX8M-MINI

NXP i.MX 8M Mini4x 1.8GHz Cortex-A53

NXP i.MX 8 2x 1.8GHz Cortex-A72 + 4x 1.2GHz Cortex-A53

VAR-SOM-MX8

DART-MX8M

NXP i.MX 8M4x 1.5GHz Cortex-A53

DART-MX8M-PLUS

NXP i.MX 8M Plus 4x 2GHz Cortex-A53

Pin2Pin Compatible

DART Pin2Pin Family

DART-MX8M-MINI

NXP i.MX 8M Mini4x 1.8GHz Cortex-A53

Note: pin2pin compatibility depends on pinmux options

Variscite Pin2Pin product familiesTwo highly scalable product families based on NXP processors

15

Webinar Agenda

The System-on-Module concept for a scalable design

NXP's i.MX 8 product portfolio

Variscite pin-to-pin System-on-Module families

How to design a scalable embedded product supporting

various i.MX processors:

• Hardware aspects Aviad Hadad, R&D Hardware expert, Variscite

• Software aspects

• Q&As

161616

VAR-SOM Pin2Pin familyMain compatible features of theVAR-SOM family:

Display:- LVDS- Touch controllerNetworking: - Ethernet - Certified Dual band 802.11

ac/a/b/g/n Wi-Fi +BT v4.2 moduleAudio:- Analog Headphone, Line In- Digital microphone + Digital audio I/FMultimedia: - MIPI CSI2 CameraConnectivity:- USB 2.0/3.0- PCIe Gen 2.0- SD/MMCOS support:- Linux – Yocto, Debian

Unique features in specific modules- 4K H.265/H.264 Decode- 1080p H.265/H.264 encode/decode- HDMI/eDP/DP- USB 3.0 - Dual Gbit Ethernet- Parallel CSI- ADC- SATA- Parallel RGB- E-ink display support

VAR-SOM-MX8M-NANO

NXP i.MX 8M Nano4x 1.5GHz Cortex-A53

VAR-SOM-MX8M-MINI

NXP i.MX 8M Mini4x 1.8GHz Cortex-A53

NXP i.MX 8M Plus4x 1.8GHz Cortex-A53

VAR-SOM-MX8MP

VAR-SOM-6UL

NXP i.MX 6 UL/ULL/ULZ900MHz Cortex-A7

VAR-SOM-MX6

NXP i.MX 64x 1.2GHz Cortex-A9

VAR-SOM-SOLO/DUAL

NXP i.MX 62x 1GHz Cortex-A9

VAR-SOM-MX8X

NXP i.MX 8X4x 1.2GHz Cortex-A35

NXP i.MX 8 2x 1.8GHz Cortex-A72 + 4x 1.2GHz Cortex-A53

VAR-SOM-MX8

Symphony-Board EVK main Features:

- Display connection - MIPI-DSI,LVDS, HDMI/DP(via Extension Card)- Capacitive, Resistive touch connector- Dual Gigabit Ethernet via RJ45 connector- Mini PCIe Socket- USB3.0 OTG Type C- USB2.0 Host Type A- Headphones, Line In jack, DMIC- Micro SD card slot- MIPI CSI camera , Parallel camera (via Extension Card)- Micro SATA connector

1717

VAR-SOM Pin2Pin family – video intro

1818

DRAM

uSDHC3/8bitNAND

I2C1

PCIe x1

JTAG

I2C 2/3/4

SO-DIMM200 Pin

JTAG

3.3V

MIPI CSI2 x1

USB OTG 2

ENETRGMII

WiFi + BTSingle/Dual

BandBuffer +

Level Shift

SAI 1/2/3/5/6 PDM x4

ECSPI 1/2

GPIOs

I2C1

LVDSDUAL CHMIPI DSI

UART2

BT EN

SPDIF I/O

SAI5

I2C3

i.MX8MMINI

24MHz Crystal

MIC INHP OutLine In

Audio CODEC

VAR-SOM-MX8M-MINI Doc rev 1. 0

32.768KHz Crystal

POWER

C32K_OUT

I2C1

uSDHC1

NVCC_ENET

SW_3P3

SAI1

ECSPI 1

USB OTG 1

PWM 1/2/3

PWM 4

uSDHC2

SAI2

ECSPI 3

UART1/2/3/4

Pin2pin with additional VAR-SOM products.Please check pin-list document for details

Not Compatible

DDR4Up to 4 Gbyte

eMMCOR

NAND

4K I2C EEPROM

FET

SPDIF

1 x PWM

POWER3.3V IN

MIPI DSI/LVDS x 2

Serial Camera

USB OTG

USB HOST

Ethernet/RGMII

PCIe GEN2

Audio/ SAI5

3 x I2C

3 x PWM

uSDHC 4bit

4 x UART

Digital Audio

Up to x5 SAIUp to x8 PDM

ECSPI

2 x ECSPI

RESISTIVE TOUCH/SAI1

CAN-FD

BOOT SEL

GPIOs

PMIC

DSI-LVDS Bridge

CAN FD CNTRL

RES TOUCH CNTLR

LOGIC

Ethernet PHY AR8031

Many interface options exist especially with the pin mux

options. We selected the most commonly used interfaces

in the embedded market and decided to make them

pin2pin (blue) the others can be “partial” pin2pin or even

unique for a specific processor/SoM.

Conclusion: one needs to pay attention when designing

the custom carrier board and make sure that his own

interfaces are falling into the pin2pin options

Scalable Embedded design – SOM BD overview

191919

Scalable Embedded design – PinmuxingA glance at the VAR-SOM-MX8M-MINI datasheet SO-DIMM pinout table Pinmux table Interface Pinout table

2020

Scalable Embedded design – PinmuxingUsing the VAR-SOMs Compatibility spreadsheet: VAR-SOM-xx Pinmux tab available for each SoM in the VAR-SOM Pin2Pin family

21

Scalable Embedded design – PinmuxingUsing the VAR-SOMs Compatibility spreadsheet: “CompatibilityPinMap” tab - ALL VAR-SOM MOST COMMON FUNCTION table

2222

Scalable Embedded design – PinmuxingUsing the VAR-SOMs Compatibility spreadsheet: “CompatibilityPinMap” tab - ALL VAR-SOM MOST COMMON FUNCTION table (Cont.)

23

An Overview of the Symphony-Board schematics

23

Carrier board design– Symphony-Board introduction

24

Carrier board design– Symphony-Board introduction

• The VAR-SOM-MX8M-MINI connector symbol

The Symphony-Board Schematics Hierarchy includes the dedicated Schematic page for all SOMs.Off-page connectors naming follow index denoted on SOM page

[//CSI_D03]

[//CSI_EN]

[//CSI_D07]

[//CSI_RST_B]

VCC_5V

J1.146-HDMI_D1PJ1.153-HDMI_D2M

[//CSI_D05]

J1.148-HDMI_D1M

[//CSI_HSYNC]

J1.150-HDMI_CLKM

MX6/MX8-HDMI, MX8-DP, MX8X-CSI

J1.152-HDMI_CLKP

[//CSI_PCLK]

[//CSI_D04]

HDMI_DDC_SDA_DP_AUX_N

[//CSI_D01]

BASE_PER_3V3

J1.156-HDMI_DDCCEC

J1.155-HDMI_D0P

HSEC8-113-01-L-RA-MATING - FOR HDMI/DP ADAPTER

J1.151-HDMI_D2P

J1.79

J1.157-HDMI_D0M

HDMI_DP_SEL

HSEC8-113-01-L-DV-A-K-MATING - FOR MX8X Camera Adapter

[//CSI_D02]

GND

[//CSI_D06]

HDMI_DDC_SCL_DP_AUX_P [//CSI_VSYNC]

[//CSI_D00]

GND

J1.154-HDMI_HPDJ1.173

KEY

BOT

TOP

J13

HSEC8-113-01-L-RA-MATING

1357911

13151719212325

2468

1012

14161820222426

J1.84J1.48

GND

LVDS#A_TX2_PLVDS#A_CLK_N

LVDS#A_TX3_N

LVDS#A_CLK_P

LVDS#A_TX0_N

LVDS DISPLAY A

LVDS#A_TX3_P

PWM#A

LVDS#A_TX0_P

GND

VCC_DISP_3V3

LVDS Differential Pair, FollowLVDS routing guidelines.Differential Impedance: 100 ohms C25

10uF

VCC_DISP_5V

LVDS#A_TX1_N

J7

CH81202M10100

11

33

55

99

1111

1313

1515

1717

1919

22

44

66

88

1010

1212

1414

1616

1818

2020

77

C2710uF

LVDS#A_TX1_P

J8

HEADER 2X1

NC12

GND

LAYOUT NOTE:

GND

LVDS#A_TX2_N

2525

Start the design by adopting the EVK pinmux selection as a baseline for the common required interfaces and go along adding additional interfaces from the available pins as required.

When using SOM pins for alternate functions not demonstrated in EVK, verify pins are not used internally by SOM for other functions.Refer to the SOM datasheet Pinout tables.

Some incompatibility may exist between SOM pinouts. The EVK schematics has dealt with most common ones, follow it.

Carrier board design guidelines/recommendations – Schematics

26

26 Carrier board design guidelines/recommendations – Schematics

Follow as much as possible EVK portions related to Power, reset and boot.• Boot pins - Verify pins are not driven externally to an undesirable state• Reset - Verify handling of POR signal in your carrier board• Power -

o Ensure sufficient supply to moduleo Depending on Power supply proximity, add bulk capacitance for

SOM power supply pins o Pay attention to design of Carrier board peripherals 3.3V supply

and the carrier board power rails discharge

USB – verify connections of VBUS, ID signals

Add ESD and EMI protection devices on sensitive Interfaces

2727

Carrier board design - Layout

Placement o Verify SOM and holes’ placement using reference design fileso When placing components under SOM check Hight constraintso Try to minimize distance of High speed interfaces connectors

from SOM pinso Place bulk capacitance of SOM power supply near SOM pins

Stackupo Suggest using a minimum of 6 layer stackupo Work with your PCB manufacture to achieve a stackup which

provides all impedances with practical trace width/spacing dimensions and reference planes for high speed signals

28

28 Carrier board design - Layout

Routingo Give priority to High speed signals such as PCI, USB 3.0, LVDS

and HDMIo Make effort to route high speed buses as a group in same layero length match signals of same bus, match intra pair

(Positive/Negative) signals of differential pairso Ensure a continuous reference plane for impedance controlled

signalso Minimize crosstalk between high speed interfaceso Keep high speed/sensitive signals away from noisy lines

Powero Follow placement and routing guidelines of power supplies to

reduce noise avoid EMC issueso Use short thick connectionso Use multiple vias to connect between planes

2929

Carrier board design – useful links

Design source files are available on our FTP:ftp://customerv:Variscite1@ftp.variscite.com/VAR-SOM-MX8/Hardware/Symphony-Board/V1.3A/

Mechanical 2D/3D files of SOM/carrier boards can be found under documentation tab of SOM/carrier boards page in variscite website.SOMs:https://www.variscite.com/products/system-on-module-som/Carrier boards:https://www.variscite.com/products/single-board-computers/

31

Webinar Agenda

The System-on-Module concept for a scalable design

NXP's i.MX 8 product portfolio

Variscite pin-to-pin System-on-Module families

How to design a scalable embedded product supporting

various i.MX processors:

• Hardware aspects

• Software aspects Pierluigi Passaro, R&D Software expert, Variscite

• Q&As

3232

Scalability definitions

Android approach

Linux kernel HAL

Wrapper libraries

Application design

SW scalability

33

System vs Software scalability

System scalability• capability of a system to adapt and fit to specific problems

Software scalability• capability of a software to correctly manage an increased workload (users)

Variscite SoM scalability• capability to run the same application on the same board while using different SoMs

34

Android approach: the HAL

1 SDK 1 apk

several devices

35

Android SDK limitations

No direct access to HW busses• GPIO• I2C• SPI• UART• USB

Designed to limit user access to HW: Android SDK focus on devices functionalities• LEDs/keys (GPIO)• Audio (I2C)• Sensors (SPI)• Bluetooth (UART)• Cameras (USB)

36

HAL requirements for Linux kernel

Availability of drivers exposing standard interfaces• Audio• Power supply• Touchscreens

Device trees exposing standard interfaces

backlight: backlight {compatible = "pwm-backlight";pwms = <&pwm1 0 1000000 0>;brightness-levels = <0 1 2 3 4 5 6 7>;default-brightness-level = <8>;status = “ok";

};

37

Variscite Device tree design: resource availability

Expose the same interfaces using the same SoM pins

NXP pinmuxing SymphonyBoard J18.3/5 provide UARTs

VAR-SOM-MX8M-MINI VAR-SOM-MX8M-NANO VAR-SOM-MX8X VAR-SOM-MX8

38

Customer Device tree design: avoid using low level GPIOs

gpio-keys: allow exposing key events instead of GPIO indexes

gpio-leds: allow exposing symbolic names to set GPIO status

gpio-keys {compatible = "gpio-keys";pinctrl-names = "default";pinctrl-0 = <&pinctrl_gpio_keys>;

up {label = "Up";gpios = <&gpio4 18 GPIO_ACTIVE_LOW>;linux,code = <KEY_UP>;

};};

gpio-leds {compatible = "gpio-leds";pinctrl-names = "default";pinctrl-0 = <&pinctrl_leds>;

emmc {label = "eMMC";gpios = <&gpio4 17 GPIO_ACTIVE_HIGH>;linux,default-trigger = "mmc0";

};};

39

Customer Device tree design: avoid I2C / SPI raw access

Use dedicated kernel drivers for devices connected to the busses -This will provide standard interfaces regardless of the used bus

&i2c2 {clock-frequency = <100000>;pinctrl-names = "default";pinctrl-0 = <&pinctrl_i2c2>;status = "okay";

/* DS1337 RTC module */rtc@0x68 {

status = "okay";compatible = "dallas,ds1337";reg = <0x68>;pinctrl-names = "default";pinctrl-0 = <&pinctrl_rtc>;interrupt-parent = <&gpio1>;interrupts = <15 IRQ_TYPE_EDGE_FALLING>;

};};

40

Device tree limitations

Missing resources (Second Ethernet port, GPU, VPU, …)

Different device naming (UARTs) SymphonyBoard J18.3/5 provide UARTs

VAR-SOM-MX8M-MINI => ttymxc2 VAR-SOM-MX8M-NANO => ttymxc2 VAR-SOM-MX8X => ttylp1 VAR-SOM-MX8 => ttylp2

41

middleware: user-space HAL

Design dedicated libraries• probing HW capabilities• providing SoC/SoM specific capabilities

Design dedicated configuration files• providing resource specific data

(like UART names)

42

Application design

No HW dependencies

Develop and test the application on a specific SoM (or even on a Linux PC)

Not just HW scalability (one board / several SoMs)

Not just SW scalability (one applications / several SoMs)

Simultaneous HW/SW scalability (one board, one application / several SoMs)

43

Beyond HW/SW scalability

Docker containers• Devices virtualization• Resource (processes) virtualizations

44

Email | sales@variscite.com

Website | www.variscite.com

Variscite wiki | www.variwiki.com

Customer Portal | Variscite Portal

Contact Information

4545

Questions?

THANK YOU!