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High Speed Fully Integrated On-Chip DC/DC Power Converter

By

Prabal Upadhyayaupad4516@uidaho.edu

Sponsor:

National Aeronautics and Space Administration (NASA)

Advisor

Dr. Herbert Hess

Microelectronics Research and Communications Institute (MRCI)

University of Idaho

February 8, 2007

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OutlineOutline

Overview

Design of the High Speed DC/DC Power Converter

Simulation Results

Layout

Measured Results

Planned Future Work

Conclusion

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Overview

Last 15 years has

seen a significant

reduction in size of

portable electronics

devices

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Overview

Portable system is a

collection of various sub-

systems

Sub-systems may demand

multiple input voltages and

variable currents

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Overview

Main power supply 3.3 Volts

RFTranceiver

AnalogSection

Digital Section

1.2 V 15 mA 1.5 V 10 mA

3.3 V 50 mADC/DC Power Converter

DC/DC Power Converter

On-chip fully integrated DC/DC power converters that provides point of use power conversion can be a possible solution

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Overview

All switch-mode power converters use inductor

In the past, most DC/DC power converter were operated

at low frequency and with discrete off chip inductor

Quality factor (Q) of an inductor is the function of

frequency

higher Q can be achieved at high frequency

RLQ

f

Q

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Overview

Benefits with high frequency switching

Integrated solution for the power converter

Reduced passive size

Higher Q inductor available

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Overview

Challenges with high frequency design

Parasitic capacitance

Power dissipation

Noise

Attenuation

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Design of the High Speed DC/DC Power Converter

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Sub-Components

Sub-components used in the power converter are

• A Buck Converter

• Two Comparators

• A Voltage Control Oscillator (VCO)

• A Charge Pump

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Block Diagram

VDD

VCO

Ipump

Ipump

COMPARATOR

-

+

COMPARATOR

-

+

LoadVDD

Vref

Con

trol

V

olta

ge

ChargePump

BuckConverter

Vout

1.5V

<1.5V01

V

t

3.3V

0V

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Buck Converter

VDD=3.3V

Load

NMOSW=300um l=350nm

L=3.71 nH

C=180pF

3.3V

Vout = D*VDD

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Comparator

Amplification stage

Decision making Stage

Buffer stage

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Ring VCO

VDD VDDVDDVDD

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Charge Pump – Cadence View

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Simulation Results

Cadence Spectre

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Simulation Results

Output Voltage waveform has two kinds of output ripples

•High frequency ripple due to switching at 1 GHz

•Low frequency ripple due to control loop at 26 MHz

Output Voltage = 1.5 V

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Simulation Results

•High frequency ripple is 19 mV

•Low frequency ripple is 65mV

Output waveform

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Simulation Results

Vout with variable load

• Vout changes with a change in the loading condition, but it takes less than 48 ns for the control loop to restore the output to the required voltage level

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Simulation Results

•Comparator produces logic 1 and 0 depending upon the output of the buck converter

Comparator Out

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Simulation Results

• Logic 1 or 0 from the comparator controls the operation of charge pump.

•Logic 1 charges the capacitor

•Logic 0 discharges the capacitor

Charge Pump Out

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Simulation Results

VCO Out

•VCO produces a near triangular wave of 1.02 GHz

CL

Rp

Rn

VDD

RCt

eVDDV

*

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Simulation Results

PWM

•Duty-cycle of the PULSE driving the buck converter switch is altered based upon the near DC charge pump output voltage

•Basic operation is to shift the DC level of the VCO signal to change the Duty-cycle of the PULSE

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Simulation Results

Iout

• Buck converter can supply upto 20mA of peak current.

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Simulation Results

Vo=1.1 V

Vo=1.5 V

Vo=1.4 V

Vo=1.3 V

Vo=1.8 V

• Power converter has output range of 1.0 V to 1.8 V, but limited to loading conditions

•Peak current of 20mA can be drawn only in the range of 1.0 V to 1.8 V

•Output voltage range is limited by duty-cycle and comparator

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Simulation Results

PULSE with variable duty cycles

• Control loop created different duty cycles to adjust converter output

Vo=1.1 V

Vo=1.5 V

Vo=1.3 V

Vo=1.8 V

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Power Converter Layout

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Layout NMOS Closeloop – Cadence View

CAPACITORBANK

INDUCTOR

CONTROL CIRCUIT

• Size 1180u x 900u Picture of a Fabricated Chip - NMOS

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Layout PMOS Closeloop– Cadence View • Size 1180u x 900u Picture of a Fabricated Chip - PMOS

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Measured Results – Preliminary

Output voltage Max Current drawn

1.0 V 20 mA

1.2 V 20 mA

1.5V 20 mA

1.8 V 20 mA

2.0 V 19 mA

2.2 V 17 mA

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Planned Future Work

Increase the switching frequency to achieve

higher Q for inductor

smaller passives

Increase efficiency

Eliminate low frequency ripple

Use the concept over to manufacture power converters

in the industrial basis

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Planned Future Work – Control Ripple

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Conclusion

Fully integrated DC/DC converter realized in silicon

The converter takes 3.3V supply and can successfully

realize voltage from 1.0 V to 1.8 V while supplying up to

20 mA of current

Diameter of the power converter is 1180u x 900u

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Thank You!Thank You!

AcknowledgementsI would like to express my deep gratitude to

Mr. Parag Upadhyaya, Washington State University

Dr. Deukhyoun Heo, Washington State University

And MRCI team

For technical discussion and support

AcknowledgementsI would like to express my deep gratitude to

Mr. Parag Upadhyaya, Washington State University

Dr. Deukhyoun Heo, Washington State University

And MRCI team

For technical discussion and support

University of IdahoUniversity of Idaho

February 8, 2007February 8, 2007

High Speed Fully Integrated On-Chip DC/DC Power Converter