1

High precision, low ripple 3kV capacitor chargerS. Blume, D. Gerber and J. Biela

Laboratory for High Power Electronic Systems, ETH Zurich, Email: blume@hpe.ee.ethz.ch

Abstract—In this paper, a high precision, low ripple 3 kVcapacitor charging system is investigated, which is designed forthe Compact Linear Collider (CLIC). The 240 kW chargingsystem consists of six capacitor charging units operated inboundary conduction mode (BCM). In order to obtain a lowcurrent ripple, the charging currents of the units are interleaved.Measurements of the interleaved capacitor charging are provided,which show the stable operation of the interleaving controller.To achieve a high pulse to pulse repeatability of the pulsemodulator system, a high charging accuracy of the capacitorbank is mandatory. Thus, a precision analysis of the capacitorcharging system is also performed in this paper. With thisanalysis, the standard deviation of the capacitor bank’s voltageis derived for the entire CLIC load operating range, resulting inσV out ≤23.2 mV, which is below 10 ppm.

Keywords— capacitor charging; precision analysis;medium voltage; boundary conduction mode

I. INTRODUCTION

For linear colliders, as for example the Compact LinearCollider (CLIC) or the Swiss Free Electron Laser (Swiss-FEL) [1, 2], typically a high pulse to pulse repeatability(PPR) of the pulse modulator system is essential. The PPRrequires that consecutive pulses have almost identical flat-topshapes. One possibility to obtain a high PPR is to preciselycharge the main energy storage of the pulse modulator system,which is in most cases the capacitor bank, prior to the pulseapplying a high precision capacitor charging system.In this paper such a precise charging system is investigatedwith the focus on the repeatability. The general investigationis performed using the example of the CLIC modulator system,which is depicted in Fig. 1.

The pulse modulator system can be divided into a mediumvoltage charging system, a droop compensation system anda pulse transformer. In the following, the focus is on themedium voltage charging system, which is supplied from the400 V AC-grid and uses a two stage approach for providingthe desired highly accurate charging voltage level with acharging power of 240 kW. The first stage is an active rectifierwith a nominal output voltage level of 750 V, followed bya medium voltage capacitor charging system, which booststhe voltage up to the required primary pulse voltage level(2.5-3 kV). To provide the required charging power with alow current ripple, the capacitor charging system consists ofsix interleaved capacitor charging units, which are operatedin boundary conduction mode (BCM).

Is was shown in [3], that the charging accuracy of themain capacitor voltage has the highest influence on the pulserepeatability of the modulator system. Therefore, besidesthe interleaved charging operation, also the precision of

Table I: Selected specifications of the CLIC modulator systemand the capacitor charging system.

Pulse voltage range 150 ... 180 kVPrimary pulse voltage range 2.5 ... 3 kVPulse current 193 ... 161 ARequired power pulse power 29 MWRise + settling time 8 µsFlat-top length 140 µsRepetition frequency 50 HzPulse to pulse repeatability ≤ 100 ppmInput voltage of charging system 600-800 VOutput voltage of charging system 2.5-3 kVNumber of charging units 6Total charging power 240 kWPeak current of single unit 140 ASnubber capacitance value 7 nFLoad capacitance value 6 mFSwitching frequency :

At nominal power 70 kHzAt zero active power ≈ 240 kHz

the capacitor charging system is analyzed in this paper. Acharging precision analysis has already been conducted in [4]for the BCM mode, where the charging process is dividedin single charging steps (Fig. 2 a) and b)). This analysis,however, was based on the assumption, that the controlleralways detects correctly, that the system has reached themodus, in which only a final charging voltage step is requiredto reach the desired voltage set point. Therefore, only thisfinal charging voltage step was considered for determining thecharging precision. Due to the large capacitor bank resultingfrom the CLIC specifications, a single charging voltage stepamounts to only 14 ppm of the desired charging voltage level.

AC

DC 40

0V G

rid

Medium voltage charging system

Cmain

Pulse transformer

DC

DC

750V

Vprim=2.5-3kV

Isec

Iprim

6 interleaved charging units

Pulse unit

DC

DC

DC

DC

DC

DC

DC

DC

Droop compensation system

Vout

A

B

A

B

KlystronLoad Capacitor

charging system

Fig. 1: Overview of modulator system, which consists ofa medium voltage charging system, a droop compensationsystem and a pulse transformer.

2

Calculation errors, which occur in the charging controllerdue to noise on the corresponding voltage measurements,can result in a transition to the final charging modus severalcharging voltage steps before the desired set point voltage canbe reached. Thus, the precision analysis of [4] is extendedin this paper to consider an arbitrary number of chargingvoltage steps, thereby allowing to consider various loads anddifferent amounts of charge transmitted per cycle.

In the following section, the operation principle of a singlecharging unit is briefly described. A comparison of differentcapacitor charging principles can be found in [5] and, there-fore, is not repeated in this paper. Thereafter, in section III, thecontrol scheme of the capacitor charging system is outlined.Additionally, in section IV, measurements of an interleavedcapacitor charging operation are provided. Finally, in sec-tion V, the extension of the charging repeatability analysispresented in [4] to a variable number of charging voltage stepsis proposed and the charging precision for the CLIC capacitorcharging system is derived.

II. CAPACITOR CHARGING SYSTEM

The high precision capacitor charging system consists ofsix capacitor charging units operated in interleaved boundaryconduction mode (BCM). Its specifications are listed in tab. I.To realize the sixfold interleaving, a central unit controls viafiber optic cable each charging unit. The operation mode andcharging principle are based on the concept presented in [5].A schematic diagram of a single capacitor charging unit isdepicted in Fig. 2 a). The charging converter is based on astandard boost topology with series connected MOSFETsincluding additional snubber capacitors. The charging unitsoperate in BCM, which offers a zero voltage switching (ZVS)operation [6]. By the snubber capacitors the converter’s ZVS

VBC,in

CD,1

...

D1

CD,n

Dn

...

VBC,out

T1 T2 T3 T4 T5

t

Cur

rent

IL

t

VBC,outvCs,totvCd,tot

vCs,tot

vCd,tot

LIL

ZVSoff

ZVSon

Volta

ge

S1 CS,1 RS,1

Sn CS,n RS,nImax

Vload }ΔVload

t

Imin

a) b)

charging voltage step

Fig. 2: a) Schematic diagram of a single capacitor chargingunit with snubber capacitors for operation in boundary con-duction mode (BCM). b) The five different time intervals ofBCM: The time dependent inductor current iL is displayedin the upper graph, whereas the snubber capacitor voltageof the series connected MOSFETs VCs,tot and of the seriesconnected diodes VCd,tot are depicted in the lower graph.

IsetCharging controller

Vout,meas

Vin,meas

Iset,slave1

Iset,slaveN

Iset,master

...

Vin,meas

Zero crossing signal

N

N

Vout,meas

IsetN

Externalmeasurement

Communicationinterface

N Zero crossing signal

IInterleavingcontroller

IIIII

N

Fig. 3: Control structure of central capacitor charging controlunit.

operating range is increased [7].

The operation of the single charging unit can be split in fiveintervals, which are depicted in Fig. 2 b). In the first intervalT1, the MOSFET switches are turned on and the current in theinductor L increases with the slope di/dt = VBC,inL . When theinductor current reaches the desired peak value Imax, switchesS1 − Sn are turned off in a ZVS (zero voltage switching)transition. In time interval T2, a resonant transition occursbetween the inductor and the snubber capacitors of the system.Once the resonant transition is completed, interval T3 startsand the inductor current decreases with the slope di/dt =Vout−Vin

L . When the inductor current IL becomes negative,another resonant transition occurs (T4). Once CS,1−CS,n areentirely discharged, the negative current continues to flow viathe body diodes of the MOSFETs. In interval T5, switchesS1 − Sn are turned on and start to conduct again. As long asthe current IL is negative when switches S1 − Sn are turnedon, the ZVS condition is met.A minimum peak current is required, for enabling the con-verter to operate with ZVS condition. The minimum peakvalue Imin is obtained by [7]:

Imin ≥√Ceq · Vout (Vout − 2 · Vin)

L, (1)

where Ceq is the equivalent capacitance value during theresonant transition, which is mainly determined by the snubbercapacitors with a much higher capacitance value than thenon linear output capacitors of the MOSFETs. For the CLICparameters, IL,min = 22.9 A results.In the next section, the control of the medium voltage chargingsystem is presented.

III. CONTROL SCHEME OF MEDIUM VOLTAGE CHARGINGSYSTEM

The medium voltage charging system features a centralcharging control unit (Fig. 3), which consists of three differentparts: the charging controller, the interleaving controller andthe communication interface.In the following, the charging and the interleaving controllerare described in more detail.

A. Charging controller (I)

The state machine of the charging controller, depicted inFig. 4, consists of five states. At the beginning of the recharg-ing phase, the charging controller is in the idle state. Once a

3

Idle

Interleaved

Non-interleaved

Charge retention

Fault

Ireq

4

Fig. 8: Capacitor charging module. On the left hand sidethe inductor is situated cooled by three AC-Coolers. Thesemiconductors are water cooled with feed-throughs below theoptical fibers of the communication link.

model with a delay element Gtd = 1z . The extended modelis depicted in Fig. 6, where Gd is the disturbance and Gpis the plant transfer function. The interleaving controller Gchas a PI structure. The corresponding transfer function leadsto a stable parameter space of the control variables Ki,n andKp,n. The resulting settling time of the interleaving controller,considering the delay of one switching cycle, is depicted inFig. 7 for all stable combinations of Ki,n and Kp,n. Witha settling time of 12 switching cycles, Ki,n = 0.065 andKp,n = 0.3655 result.

IV. CONVERTER PROTOTYPE

With the test setup only limited charging power is available.Therefore, the charging power of each module was reducedby adapting the set point current to Ipeak = 50 A, in order tomeasure the six fold interleaved capacitor charging process.The resulting charging profile for a 3 mF capacitor bank isdepicted in Fig. 9 together with the average charging currentand average charging power. The charging process with a mean

Time (ms)0 10 20 30 40 50 60 70

2400

2600

2800

3000

0

50

100

150

VchargechargeI

Pcharge

Cha

rgin

g vo

ltage

(V)

Cha

rgin

g po

wer

(kW

) / C

harg

ing

curr

ent (

A)

Fig. 9: Interleaved charging process of a 3 mF capacitor bank,which is charged from 2.5 kV to 3 kV. Six charging unitsoperate with 14 kW each, which results in a recharging timeof trech = 65 ms.

Time (ms)0 0.005 0.01 0.015 0.02 0.025 0.03 0.035 0.04 0.045 0.05

Cha

rgin

g cu

rren

t (A

)

-30

-20

-10

0

10

20

30

40

50

60

70

80

iB1 iB2 iB3 iB4 iB5 iB6

Imin

Fig. 10: Charging module currents during six-fold interleavedcapacitor charging operation of Fig. 9. The differences in peakcurrent result from varying measurement probes.

charging power of 84 kW requires 65 ms. With a maximalcharging power of 240 kW the recharging process for the29 MW−140µs− pulse requires for a 6 mF capacitor bank thecharging time of trech = 17.145 ms, while the repetition rateof CLIC demands a recharging interval of twhd = 20 ms. Theachievable recharging time with maximal power trech enablesto deactivate the charging system during the pulse intervaland allows several single charging cycles with a subsequentwaiting interval (see section III-A), which could be applied toincrease the voltage precision further.The corresponding interleaved currents of the charging unitsare displayed in Fig. 10. It can be observed, that all six modulecurrents are shifted with the desired phase shift angles of 60 ◦

and that the resonant transitions with Imin occur (see (1)).

V. PRECISION ANALYSIS OF CAPACITOR CHARGINGSYSTEM

A demanding design parameter of the CLIC pulsemodulator system is the pulse to pulse repeatability, whichrequires to limit deviations in the pulse-to-pulse flat topbelow 100 ppm. As shown in [3], the repeatability of themain capacitor bank’s voltage has the highest influence onthe system repeatability. Therefore, in this section, a precisionanalysis of the capacitor charging system is conducted.

A charging precision analysis for a boost converter oper-ating in BCM has been conducted in [4]. It was found thatthe standard deviation of the charging voltage is influencedby the noise of the input and output voltage measurement,by the current measurement noise and by switching jittersof the MOSFETs. This analysis, however, was based on theassumption, that the controller always detects correctly, thatonly a single charging voltage step is required to reach thedesired output voltage level. Therefore, the previous precisionanalysis was limited to this last charging step.The charging voltage step ∆Vload on the load capacitor persingle charging cycle can be described by [4]

5

Value quantization

Last charging cycle

Vout,q Vin,q

IreqImax

Charge with Imax

Add noise and jitter

Iset

Iset,real

Derive charging voltage step

Value quantization

Initial voltage values

Add noise

Calc required current Ireq

Do not charge further

Charge with Ireq

Add noise and jitter

Iset

Iset,real

Derive charging voltage step

Vout+ΔVout

Vout+ΔVout

Final charging voltage distribution

Vout

Vout Vin

Vout,meas Vin,meas Vout,meas Vin,meas

Vout,q Vin,q

IreqImax

Initial population

Fig. 11: Extended charging voltage repeatability analysis. Theinitial population of input and output voltage has a size ofNinit = 600000. The charging controller calculates whetheror not it can reach the set point voltage in a last charging cycle.If that is the case, the voltage values are stored; otherwiseanother charging cycle is simulated. Finally, a last chargingcycle is simulated with all stored voltages values, which leadsto the final output voltage distribution.

∆Vload =Vin−Vout+

√L2

C2load

(I2p−I2min

)+(Vout−Vin)2 (2)

Ip is the set module current and Cload the capacitor bank atthe converter’s output. Imin is obtained according to (1).With the parameters of tab. I, ∆Vload = 42.4 mV results,which corresponds to 14 ppm in relation to the desiredmaximum charging voltage level of 3 kV. Due to measurementnoise, calculation errors occur in the charging controller,which might lead to a transition into the final charging modeseveral charging steps before the desired set point voltageis reached. This will especially be the case, if the chargingvoltage step ∆Vload per cycle is small.Therefore, the precision analysis in [4] is extended to consideran arbitrary number of charging voltage steps allowing toconsider various loads and transmitted charge per cycle.

The approach for the extended charging voltage repeata-bility analysis is depicted in Fig. 11. It is assumed, that therequired charging current of the capacitor charging system isbelow the first current threshold (Ireq < 6 · Imax) and thesystem operates with a single charging unit (see section III-A).The calculation begins with an initial population of inputand output voltage data points (Vin and Vout; population sizeNinit = 600000). The noise of the voltage measurements isconsidered by adding noise to the initial population, resultingin Vin,meas and Vout,meas. Then, the quantization due to the

2998 2998.4 2998.8 2999.2 2999.6 3000

Charging voltage (V)

0

5

10

15

20

25

30

35

40

45

50

Prob

abili

ty (%

)

SNRVout

= 92.5 dB

SNRVout

= 65 dB

Fig. 12: Charging voltage distribution for a high (92.5 dB)and a low (65 dB) SNR of the output voltage measurement(Vout,set = 3 kV).

digitalization is considered and with the quantized voltagevalues (Vin,q and Vout,q), the charging controller calculatesaccording to (2) whether or not the required current valueis below the maximum current threshold (Ireq < Imax). Forall cases, where this condition is met, the voltage valueswithout noise are stored in a database. For the other points,a charging cycle is simulated, where the controller value isset with Iset = Imax as comparator reference for the currentmeasurement. In this calculation step, the current measurementnoise and switching jitters are considered, which results inIset,real. In the last step of the cycle, the charging voltage stepis calculated with (2). The resulting capacitor output voltagedistribution is considered as the new initial population for thenext charging cycle. This procedure is repeated until 99.9 %of the first initial population is added to the database, i.e. hasreached the final charging cycle.Then, the last charging cycle is simulated for all voltagevalues from the database equal to the previously describedcharging cycles. In this last cycle Iset ≤ Imax applies. Withthe calculation of the last charging voltage step, the final outputvoltage distribution is analyzed and its standard deviationσV out is derived.

202020

303030

404040

505050

606060

707070

60 65 70 75 80 85 90Input Voltage SNR (V)

80

82

84

86

88

90

92

94

96

98

100

Out

put V

olta

ge S

NR

(V)

σV

out

(mV)

Fig. 13: Standard deviation of the charging voltage as afunction of the input and output voltage SNR.

6

21.8

22

22

22

22.2

22.2

22.2

22.4

22.4

22.4

22.6

22.6

22.8

22.8 23

600 620 640 660 680 700 720 740 760 780 800

Input Voltage (V)

2500

2550

2600

2650

2700

2750

2800

2850

2900

2950

3000O

utpu

t Vol

tage

(V)

σV

out

(mV)

Fig. 14: Standard deviation of the charging voltage as afunction of the operating voltage range of CLIC

There are two different cases investigated in the following,which are:

1) A high SNR of the output voltage measurement (92.5 dB)

2) A low SNR of the output voltage measurement (65 dB).

A charging voltage distribution for the final charging cycle isdepicted in Fig. 12 for these two cases. It can be observed, thatwith a low SNR the standard deviation of the charging voltageincreases drastically. In the low SNR case, the controllerdetects in many cases the final charging cycle too early, whichis why the final charging voltage has a lower mean value incomparison to the high SNR case. Also, the charging voltagestep of a single charging cycle is visible in the charging voltagedistribution.

In Fig. 13 the dependency of the charging voltage’sstandard deviation on the SNR of input and output voltagemeasurement is depicted. It can be observed, that theSNR of the input voltage measurement does not affect thecharging precision, whereas the SNR of the output voltagemeasurement has a strong influence in the investigated range.The investigated range of the output voltage measurement isSNR=80-100 dB, since for a precise charging a SNR ≥ 80 dBis required.

In order to predict the charging precision of the investigatedcapacitor charging system, the quantized signal to noise ratioof the transmitted input measurement, and the external output

Table II: Measured signal to noise ratio (SNR) of convertermeasurements.

valueMeasured input voltage SNR 68 dB

Measured output voltage SNR 82 dBMeasured output voltage SNR

with digital FIR filter 92.5 dBCurrent measurement SNR (assumed) 60 dB

σjitter (assumed) 5 ns

measurement were recorded. In order to improve the SNR ofthe output voltage measurement, a digital finite response (FIR)filter was implemented (see section III-A). For switching jittersand current measurement, worst case values are assumed. Allconsidered values for the analysis are summarized in tab. II.For the capacitor charging system an operation range, listedin tab. I, is defined. The resulting σVout for this operatingrange with parameters of tab. II is depicted in Fig. 14. Itcan be observed, that the standard deviation is lowest for thehighest output voltage in combination with the lowest inputvoltage level. That is the case, since the transmitted charge percharging cycle decreases, the higher the difference betweeninput and output voltage is. The highest standard deviationof the charging voltage results to σVout = 23.2 mV, whichis lower than 10 ppm in relation to the corresponding outputvoltage level.

VI. CONCLUSION

In this paper, a high precision capacitor charging systemis investigated, with specifications of the Compact LinearCollider (CLIC). The 240 kW charging system consists of sixcharging units, which are operated with interleaved modulecurrents for reducing the input current ripple. The interleavedcharging process, has been validated with a prototype system,where all converter currents showed the desired phase shiftof 60 ◦. Additionally, an analysis of the charging accuracy ispresented, which considers measurement noise, quantizationeffects and jitter as well as an arbitrary number of charg-ing cycles and variable charging voltage steps. From thisanalysis results, that with the prototype system and CLICspecifications, a standard deviation of the charging voltageσVout = 23.2 mV can be obtained, which is below 10 ppmin relation to the corresponding charging voltage level.

REFERENCES[1] M. Aicheler, P. Burrows, M. Draper, T. Garvey, P. Lebrun,

K. Peach, N. Phinney, H. Schmickler, S. D., and N. Toge, “AMulti-TeV linear collider based on CLIC technology: CLICConceptual Design Report,” CERN, Tech. Rep., 2012. [Online].Available: http://clic-study.web.cern.ch/content/clic-nutshell

[2] (2006) SwissFEL. https://www.psi.ch/swissfel/.[3] S. Blume, A. Jehle, Y. Schmid, and J. Biela, “Control of an active

bouncer for an ultra precise 140 us-solid state modulator system,”in 17th European Conf. on Power Electronics and Applications(EPE), Sept 2015.

[4] D. Gerber and J. Biela, “Charging precision analysis of a 40-kW 3-kV soft-switching boost converter for ultraprecise capacitorcharging,” IEEE Trans. Plasma Sci., vol. 42, no. 5, pp. 1274–1284, May 2014.

[5] D. Gerber, “Ultra-precise short-pulse modulator for a 50MW RFoutput klystron for free electron lasers,” Ph.D. dissertation No.23190, ETH Zürich, 2016.

[6] D. Gerber and J. Biela, “Interleaving of a soft-switching boostconverter operated in boundary conduction mode,” IEEE Trans.Plasma Sci., vol. 43, no. 10, pp. 3374–3380, October 2015.

[7] ——, “Charging precision analysis of a 40kW, 3kV soft-switching boost converter for ultra precise capacitor charging,”in IEEE Int. Conf. on Plasma Sci. (ICOPS), June 2013.

http://clic-study.web.cern.ch/content/clic-nutshell

IntroductionCapacitor charging systemControl scheme of medium voltage charging systemCharging controller (I)Interleaving controller (II)

Converter prototypePrecision analysis of capacitor charging systemConclusion