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1 / 24 2019-01-23 | Document No.: AN130 www.osram-os.com Application Note High-power OSCONIQ ® P — Details on properties, handling and processing Abstract The OSCONIQ ® P family is a new high-power LED with a lead-frame-based package design. It offers an alternative to ceramic-based packages, by providing superior corrosion robustness and long life-time performance as well as low thermal resistance and excellent second level board reliability. The OSCONIQ ® P is specifically designed to deliver high luminous flux and efficacy from a single optical source, enabling a compact luminaire design for a wide range of outdoor and industrial lighting, as well as a nice fit for portable applications. This application note presents a fundamental overview of the LED design and its characteristics. In addition, appropriate assembly, handling, compatible optics accessories and thermal management are recommended to enable an optimized application design. Valid for: OSCONIQ ® P 3030 OSCONIQ ® P 3737 (2W) OSCONIQ ® P 3737 (3W) OSCONIQ ® P 7070 Authors: Yeoh Siew Lee Gwynett / Ng Kok Eng Application Note No. AN130

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Page 1: High-power OSCONIQ P — Details on properties, handling and … · 2019-01-23 | Document No.: AN130 1 / 24 Application Note High-power OSCONIQ® P — Details on properties, handling

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Application Note

High-power OSCONIQ® P — Details on properties, handling and processing

Abstract

The OSCONIQ® P family is a new high-power LED with a lead-frame-based packagedesign. It offers an alternative to ceramic-based packages, by providing superior corrosionrobustness and long life-time performance as well as low thermal resistance and excellentsecond level board reliability.

The OSCONIQ® P is specifically designed to deliver high luminous flux and efficacy from asingle optical source, enabling a compact luminaire design for a wide range of outdoor andindustrial lighting, as well as a nice fit for portable applications.

This application note presents a fundamental overview of the LED design and itscharacteristics. In addition, appropriate assembly, handling, compatible optics accessoriesand thermal management are recommended to enable an optimized application design.

Valid for:OSCONIQ® P 3030OSCONIQ® P 3737 (2W) OSCONIQ® P 3737 (3W) OSCONIQ® P 7070

Authors: Yeoh Siew Lee Gwynett / Ng Kok Eng

Application Note No. AN130

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Table of contents

A. Description of OSCONIQ® P ..................................................................................3

B. Features and construction ......................................................................................3

C. Design considerations ............................................................................................3

Mechanical and optical design resource ............................................................3

Electrical device pad polarity ..............................................................................3

Isolation and PCB design ...................................................................................5

Thermal management of the OSCONIQ® P .......................................................6

PCB technology and selection ...........................................................................7

Junction temperature Tj calculation .................................................................11

D. Assembly & processing ........................................................................................12

Handling precautions ........................................................................................12

Pick and place ..................................................................................................12

Storage .............................................................................................................14

Cleaning ............................................................................................................15

Processing ........................................................................................................15

SMT process .....................................................................................................16

Voids .................................................................................................................18

E. Board level reliability .............................................................................................19

F. Accessories ...........................................................................................................21

Compatible optics and partners .......................................................................21

G. Reference design .................................................................................................22

H. Application support and services .........................................................................23

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A. Description of OSCONIQ® P

The OSCONIQ® P LED is a lead-frame-based package alternative to the well-known ceramic-based high-power LEDs, providing superior corrosionrobustness and performance. The LED stands out due to low thermal resistance,superior corrosion robustness, excellent second level board reliability and a longlife-time performance, which makes it an ideal choice for general indoor andoutdoor lighting applications such as Street Lighting, Tunnel Lighting, High Bayand Low Bay Lighting.

Figure 1: OSCONIQ® P family

B. Features and construction

The OSCONIQ® P follows the Quad Flat No Lead (QFN) package design whichconsists of a lead frame and a white epoxy mold compound. A highly efficientsemiconductor chip is mounted and electrically connected on the lead frame,covered by a clear silicone lens. In addition to the mounting and the electricalconnection of the LED to the circuit board, the lead frame serves to dissipate theheat that is generated during operation.

This OSCONIQ® P design ensures low thermal resistance. As ESD protection isincluded, the LED withstands voltage up to 8 kV and is assigned according toANSI / ESDA / JEDEC JS-001 — HBM, Class 3B.

Containing no lead or other hazardous substances, the OSCONIQ® P fulfills thecurrent RoHS guidelines (European Union and China).

C. Design considerations

Mechanical and optical design resource

Optical Rayfile and package CAD models are available online.

http://www.osram-os.com/osram_os/en/applications/application-support/optical-simulation/index.jsp?fb_dir=LED%2fOSCONIQ%2fOSCONIQ+P%2f

Electrical device pad polarity

The OSCONIQ® P 7070 thermal pad is not electrically isolated and the heat sinkon the PCB side must be kept isolated. The OSCONIQ® P 7070 has three padsthat need to be soldered onto the corresponding pads on the printed circuitboard (PCB) to ensure proper thermal and electrical operation (see Figure 2).

OSCONIQ® P 7070 OSCONIQ® P 3737 (2W) and OSCONIQ® P 3737 (3W)

OSCONIQ® P 3030

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Figure 2: OSCONIQ® P 7070 solder pad design

The OSCONIQ® P 3737 (2 W and 3 W) and the OSCONIQ® P 3030 feature threepads that need to be soldered onto the corresponding pads on the PCB toensure proper thermal and electrical operation (see Figure 3 and Figure 4).Please refer to the respective data sheets for the recommended footprint designfor the solder mask and copper layout on the PCB.

The center thermal pad is cathode potential and non-isolated. It must NOT beconnected to the anode pad, as the thermal pad is on cathode potential. It isrecommended to either leave the thermal pad isolated or clamp it to the cathode.

Figure 3: OSCONIQ® P 3737 (2 W) or OSCONIQ® P 3737 (3 W) solder pad design

Figure 4: OSCONIQ® P 3030 solder pad design

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Isolation and PCB design

OSCONIQ® P 7070. The OSCONIQ® P 7070 is designed to be soldered onto ametal core PCB (MCPCB). To ensure optimal operation, the PCB should bedesigned to minimize the overall thermal resistance between the LED packageand the heat sink as shown in Figure 5.

Figure 5: PCB layout for single OSCONIQ® P 7070 LED on MCPCB

The thermal pads of single OSCONIQ® P 7070 LEDs must NOT be connected toeach other, neither in series nor parallel as shown in Figure 6. From a thermalperspective, it is not required to connect the thermal pads on the MCPCB.

Figure 6: Thermal pad design OSCONIQ® P 7070

OSCONIQ® P 3737 and OSCONIQ® P 3030. The OSCONIQ® P 3737(2 W),OSCONIQ® P 3737 (3 W) and OSCONIQ® P 3030 LEDs are designed to besoldered onto an MCPCB or a multi-layer FR4 PCB. To ensure optimal operation,the PCB should be designed to minimize the overall thermal resistance betweenthe LED package and the heat sink as shown in Figure 7 for theOSCONIQ® P 3737 and in Figure 8 for the OSCONIQ® P 3030.

From a thermal perspective it is not required to connect the thermal pads onMCPCBs. It is also recommended to use thermal interface material (TIM) inbetween the PCB and the heat sink for improved thermal dissipation.

Thermal pad must be electrically isolated

No connection to this is allowed

Thermal pad is not allowed to connect toany pad even though floating trace

Thermal pad is not allowed to connect toany power line

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Figure 7: PCB layout for OSCONIQ® P 3737 (2 W) or OSCONIQ® P 3737 (3 W)

Figure 8: PCB layout for OSCONIQ® P 3030

Thermal management of the OSCONIQ® P

The total thermal resistance between the OSCONIQ® P and the environment ishighly affected by the overall design and the material used for the PCB. MCPCBsare commonly used in industry for their low thermal resistance and provendurability.

FR4 is an alternative option. It is important to include arrays of thermal vias in thePCB design to reduce thermal resistance. Vias are usually placed around thecopper pad area to create a contact between the upper pads and the bottom. Acapped via, in contrast, can be placed directly below the thermal pad of the LED,improving the thermal performance of the PCB.

Figure 9: FR4 with capped vias (left) and open vias (right) for OSCONIQ® P 7070

LED on MCPCB LED on FR4 (2 layers)

LED on MCPCB LED on FR4 (2 layers)

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Figure 10: FR4 with capped vias (left) and open vias (right) for OSCONIQ® P 3737(2 W), OSCONIQ® P 3737 (3 W) or OSCONIQ® P 3030

PCB technology and selection

Thermal measurement must be performed as close to the LED as possible,which is the measuring point temperature Tmp as shown below (see Figure 11and 12). For this procedure, measuring the Tmp of a predetermined location onthe PCB right next to the OSCONIQ® P is done with a thermocouple.

Thermally conductive epoxy or solder is recommended to ensure a good heattransfer from the board to the thermocouple. The thermocouple must be in directcontact with the copper thermal pad, i.e. any solder mask must be removed firstbefore mounting the thermocouple onto the PCB copper pad.

The Tables 1, 2, 3 and 4 summarize the thermal resistance values Rth of theboard and also Tj to Tmp between the different PCB designs and technologies.

Figure 11: Measuring point temperature Tmp for OSCONIQ® P 7070

Anode

Tmeasuring point

Cathode

Thermal pad

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Figure 12: Measuring point temperature Tmp for OSCONIQ® P 3030, OSCONIQ® P

3737 (2 W) or OSCONIQ® P 3737 (3 W)

Table 1: Simulation result for OSCONIQ® P 7070 Rth with different dielectrics andcopper foils

PCB technology Details substrate thickness = 1 mm Cu foil Rth sb el Rth jmp el

Al-core MCPCB 38 μm dielectric (3.0 W/mK) 35 μm (1 oz)

0.8 K/W 1.4 K/W

Al-core MCPCB 75 μm dielectric (2.2 W/mK) 35 μm (1 oz)

1.4 K/W 1.9 K/W

Al-core MCPCB 100 μm dielectric (1.3 W/mK) 35 μm (1 oz)

2.3 K/W 2.5 K/W

FR41 (capped vias) vias on thermal pad 70 μm (2 oz)

3.5 K/W 2.9 K/W

FR41 (open vias) vias on thermal pad 70 μm (2 oz)

7.0 K/W 4.4 K/W

1 FR4 properties: Vias diameter: 0.5 mm, Vias pitch distance: 1 mm, the copper pad area is identical at the front and bottom

Anode

Thermal pad/Cathode

Tmeasuring point

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Figure 13: Rth network for OSCONIQ® P 7070

Table 2: Simulation result for OSCONIQ® P 3030 Rth with different dielectrics and copper foils

PCB technology Details substrate thickness = 1 mm Cu foil Rth sb el Rth jmp el

Al-core MCPCB 38 μm dielectric (3.0 W/mK) 35 μm (1 oz)

5.8 K/W 7.8 K/W

Al-core MCPCB 75 μm dielectric (2.2 W/mK) 35 μm (1 oz)

6.0 K/W 8.5 K/W

Al-core MCPCB 100 μm dielectric (1.3 W/mK) 35 μm (1 oz)

6.7 K/W 9.5 K/W

FR41 (capped vias) vias on thermal pad and electrodes

70 μm (2 oz)

5.6 K/W 9.0 K/W

FR41 (open vias) vias on thermal pad and electrodes

70 μm (2 oz)

5.8 K/W 9.5 K/W

1 FR4 properties: Vias diameter: 0.5 mm, Vias pitch distance: 1 mm, the copper pad area is identical at the front and bottom

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Table 3: Simulation result for OSCONIQ® P 3737 (2 W) Rth with different dielectrics and copper foils

PCB technology Details substrate thickness = 1 mm Cu foil Rth sb el Rth jmp el

Al-core MCPCB 38 μm dielectric (3.0 W/mK) 35 μm (1 oz)

2.1 K/W 3.0 K/W

Al-core MCPCB 75 μm dielectric (2.2 W/mK) 35 μm (1 oz)

3.6 K/W 3.6 K/W

Al-core MCPCB 100 μm dielectric (1.3 W/mK) 35 μm (1 oz)

6.0 K/W 4.2 K/W

FR41 (capped vias) vias on thermal pad and elec-trodes

70 μm (2 oz)

7.2 K/W 4.7 K/W

FR41 (open vias) vias on thermal pad and elec-trodes

70 μm (2 oz)

12.3 K/W 7.0 K/W

1 FR4 properties: Vias diameter: 0.5 mm, Vias pitch distance: 1 mm, the copper pad area is identical at the front and bottom

Table 4: Simulation result for OSCONIQ® P 3737 (3 W) Rth with different dielectrics and copper foils

PCB technology Details substrate thickness = 1 mm Cu foil Rth sb el Rth jmp el

Al-core MCPCB 38 μm dielectric (3.0 W/mK) 35 μm (1 oz)

1.6 K/W 2.8 K/W

Al-core MCPCB 75 μm dielectric (2.2 W/mK) 35 μm (1 oz)

2.9 K/W 3.3 K/W

Al-core MCPCB 100 μm dielectric (1.3 W/mK) 35 μm (1 oz)

4.9 K/W 3.4 K/W

FR41 (capped vias) vias on thermal pad 70 μm (2 oz)

4.0 K/W 3.3 K/W

FR41 (open vias) vias on thermal pad 70 μm (2 oz)

10.1 K/W

5.3 K/W

1 FR4 properties: Vias diameter: 0.5 mm, Vias pitch distance: 1 mm, the copper pad area is identical at the front and bottom

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Figure 14: Rth network for OSCONIQ® P 3030, OSCONIQ® P 3737 (2 W) and

OSCONIQ® P 3737 (3 W)

Junction temperature Tj calculation

The typical thermal resistance Rth jmp between the junction and solder point forthe OSCONIQ® P can be obtained from the Tables 1 – 4. With the information,the junction temperature Tj can be calculated according to the followingequation:

Tj = Tmp + IF • VF • Rth j mp

, where

• Tj is the junction temperature of the LED [°C],

• Ts is the solder pad temperature on the PCB [°C],

• IF is the forward current of the system [A],

• VF is the forward voltage of the system [V],

• Rth j mp is the thermal resistance of the LED from the junction to measuringpoint [K/W].

To determine the junction temperature Tj experimentally, switch on the LEDassembly at the necessary forward current, IF until it reaches a stabletemperature.

Example. The thermal resistance Rth j mp between the OSCONIQ® P 7070junction and the measuring point is approximately 2.0 K/W on an MCPCB with2.2 W/mK and 75 μm dielectric thickness. Values for different MCPCBs arestated in Table 1. The Tj can be calculated as below:

Tj = Tmp + IF • VF • 2.0 K/W

There might be situations where a small confined area is utilized to put in a tightdimension array of LEDs. The OSCONIQ® P LEDs can be arrayed with a minimalspacing of 1 mm on an MCPCB with 1.3 W/mK thermal conductivity and 100 μmthickness with no significant effect on the Tj.

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D. Assembly & processing

Handling precautions

Following general guidelines for the handling of LEDs, additional care should betaken to minimize mechanical stress on the silicone encapsulation (see alsoapplication note "Handling of silicone resin LEDs").

In general, all types of sharp objects (e.g. forceps, fingernails, etc.) should beavoided to prevent damage to the encapsulation, which can lead to thespontaneous failure of the LED. For manual handling of the component, the useof vacuum tweezers is recommended. The effective mechanical stress on theLED is minimized by means of soft rubber suction tips. (Figure 15).

Figure 15: Examples of vacuum styluses

Pick and place

As mentioned before, the use of vacuum styluses is recommended. Thesetweezers create a vacuum (e.g. by pressing the button of the tweezers) withwhich the component (e.g. the LED) can be lifted. If there is no alternative to theexceptional use of tweezers (anti-static), the LED must be picked and handledonly at the epoxy mold compound (Figure 16).

Figure 16: Manual handling of the OSCONIQ® P

When processing in automatic pick-and-place machines, care should be takenthat an appropriate pick-and-place tool is used and the process parametersconform to the mechanical characteristics of the package. A placement force of2.0 N is recommended to start and this should be minimized where possible.

For camera teaching during the machine setup, make sure to teach the camerathe later package image (Figures 17 to 19) before continuing the pick-and-placeprocess.

Pick the LED only on the plastic base

Do not touchthe siliconeresin!

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Figure 17: OSCONIQ® P 7070 package image

Figure 18: OSCONIQ® P 3737 (2 W) or OSCONIQ® P 3737 (3 W) package image

Figure 19: OSCONIQ® P 3030 package image

The recommendations for pick-and-place nozzle types for the OSCONIQ® Pfamily are shown below. Figure 20 shows the nozzles for the ASM SIPLACE HF3machine and for the JUKI pick-and-place machine, using a Ching Yi fabricatednozzle.

Figure 20: Recommended pick-and-place tools for the OSCONIQ® P 7070

Figure 21 shows the newly added recommendation of a pick-and-place nozzlefor the OSCONIQ® P 3030.

Ø 7.6

Ø 7

.05

ASM SIPLACE 3138682-01

14.

5

Ching Yi 2050 nozzle JUK-0547/15

10.5

Ø 7.6Ø 12.0

Ø 16.0

10.5

Ø 7.2

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Figure 21: Recommended pick-and-place tool for the OSCONIQ® P 3030

Figure 22 shows the recommendation of pick-and-place nozzle types for theOSCONIQ® P 3737 (2 W) and OSCONIQ® P 3737 (3 W). Similar to otherOSCONIQ® P, nozzle recommendations fit for ASM SIPLACE machines as wellas for JUKI KE-2080RL pick-and place-machines.

Figure 22: Recommended pick-and-place tool for the OSCONIQ® P 3737 (2 W) &OSCONIQ® P 3737 (3 W)

Figure 23 shows the nozzle recommended for the OSCONIQ® P 3737 (3W) Flatversion.

Figure 23: Recommended pick-and-place nozzle for the OSCONIQ® P 3737 (3W) Flat version

Storage

The OSCONIQ® P are generally supplied in tape with dry pack and should befactory-sealed when stored.

Ching Yi 2050 nozzle JUK-0510/18

3.7

Ø 1.5

5.03.7

ASM SIPLACE 3127726-01

Ø 16.0

5 7

Ø 3

.5

Ø 1.6

Ø 12.0

Ø 1.4

Ching Yi 2050 nozzle JUK-0461/15

5

2.5

Ø 3.2

Ø 2.8

Ching Yi 2050 nozzle JUK-0510/18

3.7

Ø 1.5

53.7

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The hermetic pack should only be opened for immediate mounting andprocessing, after which the remaining LEDs should be repacked according to themoisture level inducated the data sheet (q.v. JEDEC J-STD-033B.1 — MoistureSensitivity Levels).

PCBs or assemblies containing LEDs should not be stacked such that force isapplied to the LED (Figure 24), and should not be handled directly at the LED.Generally, all LED assemblies should be allowed to return to room temperatureafter soldering, before subsequent handling or the next process step.

Figure 24: Storage of LEDs

Cleaning

From today's perspective any direct mechanical or chemical cleaning of theOSCONIQ® P is forbidden.

Isopropyl alcohol (IPA) can be used if cleaning is mandatory.

Ultrasonic cleaning of the OSCONIQ® P is generally not recommended.

For dusty LEDs, simple cleaning by means of purified compressed air (e.g.central supply or spray can) is recommended.

Processing

The OSCONIQ® P are generally supplied in tape and reel format and arecompatible with existing industrial SMT processing methods.

For mounting the component, a standard reflow soldering process with forcedconvection under standard N2 atmosphere is recommended, in which a typicallead-free SnAgCu metal alloy solder is used. In order to reduce the voids, it isrecommended to use a reflow soldering oven with a vacuum chamber.

The recommended temperature profile provided by the solder pastemanufacturer can be used as a good starting point. The maximum temperaturefor the profile as specified in the data sheet should not be exceeded.

In general, it is recommended that any twisting, warping, bending and otherforms of stress to the circuit board should be avoided after soldering in order toprevent breakage of the LED housing or the solder joints.

Therefore, the circuit boards should not be separated manually and should onlybe carried out with a specially designed tool.

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SMT process

In the SMT process, the solder paste is normally applied by stencil printing. Thequality of printing has an influence on the solder quality, since effects such assolder bridges, solder spray and/or other soldering defects are largelydetermined by the design of the stencil apertures and the quality of the stencilprinting (e.g. positioning, cleanliness of the stencil, etc.).

The stencils and their apertures are thus specially laid out for the respectiveapplication. As an example, the recommended design and dimensions of thestencil apertures for the solder pad for the OSCONIQ® P are shown in Figures 25to 27.

Since the solder pad effectively creates the direct contact between the LED andthe circuit board, the design of the solder pad has an influence on the solder jointreliability, the self-centering effect and the heat dissipation.

In most cases, it is therefore advantageous to use the recommended solder padfrom the data sheet, since it is individually adapted to the properties andconditions of the LED. If the placement position is greater than 150 μm from thecenter, the components should not be reflowed as electrical shorts resultingfrom solder bridges may be produced.

Figure 25: Recommended solder pad and solder stencil for OSCONIQ® P 7070

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Figure 26: Recommended solder pad and solder stencil for OSCONIQ® P 3737 (2W) or OSCONIQ® P 3737 (3W)

Figure 27: Recommended solder pad and solder stencil for OSCONIQ® P 3030

When printing with a stencil, the amount of solder paste is determined by thethickness of the stencil. For OSCONIQ® P, a thickness of 120 μm is suitable.Figure 28 shows the solder paste profile from the 3D offline solder pasteinspection system for the OSCONIQ® P 3737 (2 W).

Figure 28: 3D image of 120 μm solder paste

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Voids

For good thermal connection and a high board level reliability, it is recommendedthat voids and bubbles should be eliminated in all solder joints. A total eliminationof voids, particularly for the larger thermal pad, is difficult. Therefore, the designof the stencil aperture is crucial for the minimization of voids.

The recommended design openings in the stencil enable the outgassing of thesolder paste during the re-flow soldering process and also serve to regulate thefinal solder thickness.

Apart from the stencil design, the reflow oven with a build-in vacuum chamberhas a significant impact on reducing the voids, particularly for theOSCONIQ® P 7070.

Therefore, typically solder paste coverage of 60 % — 80 % is tipicallyrecommended. In industry standards such as IPC-A-610 D or J-STD-001D(which only refer to surface-mount area array components such as BGA, CSP,etc.) the amount of voids (verified by the x-ray pattern) should be less than 25 %.

Figure 29: X-ray image of a solder joint of OSCONIQ® P 7070

Figure 30: X-ray image of a solder joint of OSCONIQ® P 3737 (2 W) or OSCONIQ® P3737 (3 W)

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Figure 31: X-ray image of a solder joint of OSCONIQ® P 3030

Internal studies and simulations at OSRAM Opto Semiconductors havedetermined, however, that for areas up to 35 % of the thermal pad area, thevoids only have a minor effect on the thermal resistance.

E. Board level reliability

Temperature cycling is the process of cycling through two temperatureextremes, typically at relatively high rates of change. It is an environmental stresstest used in evaluating product reliability as well as in manufacturing to catchearly-term, latent defects by inducing failure through thermal fatigue. It isparticularly relevant for outdoor luminaires as they are exposed to largetemperature variation over the year. This increases stress on the solder jointbetween the LED and the PCB. A proper product design considers this fact andreduces the risk for catastrophic failure.

Large ceramics packages such as 7070 packages on metal core PCBs havereliability issues with large temperature changes. LED and PCB materials havedifferent coefficients of thermal expansion (CTE). Most of the 8 W large ceramicsLEDs have an Aluminum Nitride Substrate (AlN). The CTE of AIN (5 ppm/K) issignificantly different from the PCBs CTE (23 ppm/K). It leads to solder jointcracks as high stress occurs during thermal cycling. For lead frame basedpackages, such as the OSCONIQ® P 7070, the difference in CTE between thelead frame and the PCB is much smaller than for 7070 ceramic LEDs. Therefore,the stress on the solder joints is much lower and no cracks are observed.

Experimental studies have been carried out to prove and assess the solder jointreliability for various brands of 7070 LED packages. LEDs were mounted onPCBs and tested until failure in accelerated thermal cycles under lab conditions.Temperature swings are larger than in field applications and cycles are shortersince the test time is limited. The results show that the OSCONIQ® P 7070 isstable for over 5500 accelerated thermal cycles (TC). No VF increase and nosolder joint cracks are found, whereas for competitor 7070 ceramic packages,VF is increased as early as 500 cycles and cracks are found in cross sections ofthe failed units.

In summary, large temperature fluctuations and frequent luminaire on/off (hot/cold) switching add stress to the solder joint between the PCB and the LEDs,which is particularly crucial for outdoor applications. The greater coefficient of

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thermal expansion (CTE) mismatch between PCB and LED materials has beenproven to lead to VF increase and severe solder joint cracks. The lifetime of largeceramic packages is significantly reduced.

Figure 32: TC - 40 °C / 110 °C for OSCONIQ® P 7070 versus competitor 7070 ceramic package

Figure 33: TC - 40 °C / 85 °C for OSCONIQ® P 7070 versus competitor 7070 ceramicpackage

Figure 34: Cross section image of a solder joint for OSCONIQ® P 7070 LED # 1 (good)versus competitor 7070 ceramic package LED # 1 (crack)

Figure 35: Cross section image of a solder joint for OSCONIQ® P 7070 LED # 2 (good)versus competitor 7070 ceramic package LED # 2 (crack)

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F. Accessories

Compatible optics and partners

Several optics partners have been identified and examples of compatible opticsare listed in LED Light For You (LLFY) and partner websites, such as Kathod,Ledil, Carclo Optics, Gaggione, BICOM, LedLink and Darkoo.

Table 5: OSCONIQ® P 7070 compatible optics

Supplier Lens family

LEDil STRADA-2X2MX

LEDil STRADA-SQ

LEDil MIRA

LEDil LUCIA

LEDil JENNY

Carclo Optics Hubbles

Carclo Optics Freeform

Carclo Optics TIR

BICOM BK LED

Khatod GAIA

Table 6: OSCONIQ® P 3737 (2 W) compatible optics

Supplier Lens family

LEDil STRADA

LEDil STRADA-IP-2X6

LEDil STRADA-T-6X1

LEDil STRADA-2X2

LEDil STRADA-SQ

LEDil STRADA-T

Carclo Optics Hubbles

Carclo Optics Freeform

Carclo Optics TIR

BICOM BK LED

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For more information and for other accessories, please refer to “LED Light ForYou” or our certified optics partners’ web pages.

https://www.ledlightforyou.com/en-index.php

G. Reference design

A street light demo has been constructed with performance below.

Figure 36: Street light demo using OSCONIQ® P 7070.

Table 7: OSCONIQ® P 3737 (2 W) compatible optics

Supplier Lens family

LEDil STRADA

LEDil STRADA-IP-2X6

LEDil STRADA-2X2

LEDil STRADA-A2

LEDil STRADA-T

Table 8: Test results for the OSCONIQ® P 7070 street light demo

LED product GW P7STA1.PM

Lumen package 15,000 lm

CCT 4,000 K

CRI 70

System efficacy 115 lm/W

Driving current 700 mA

LED quality 16 pcs

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H. Application support and services

Create the lighting of the future, faster.

Looking for the LED expertise to help you get ahead of the competition?

Then get PASS — Premium Application Support Services. With PASS, you’ll getaccess to OSRAM Opto Semiconductors’ application engineering expertise andlab services through a lean, affordable, a-la-carte program. PASS, available forcommercial businesses, is an open, collaborative design and testing processthat keeps you involved, allowing flexibility along the way.

So make it good, make it fast, and make it easy — with PASS.

https://ledlight.osram-os.com/pass/

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Don't forget: LED Light for you is your place tobe whenever you are looking for information orworldwide partners for your LED Lightingproject.

www.ledlightforyou.com

ABOUT OSRAM OPTO SEMICONDUCTORS

OSRAM, Munich, Germany is one of the two leading light manufacturers in the world. Its subsidiary, OSRAMOpto Semiconductors GmbH in Regensburg (Germany), offers its customers solutions based on semiconduc-tor technology for lighting, sensor and visualization applications. OSRAM Opto Semiconductors has produc-tion sites in Regensburg (Germany), Penang (Malaysia) and Wuxi (China). Its headquarters for North Americais in Sunnyvale (USA), and for Asia in Hong Kong. OSRAM Opto Semiconductors also has sales offices th-roughout the world. For more information go to www.osram-os.com.

DISCLAIMER

PLEASE CAREFULLY READ THE BELOW TERMS AND CONDITIONS BEFORE USING THE INFORMA-TION SHOWN HEREIN. IF YOU DO NOT AGREE WITH ANY OF THESE TERMS AND CONDITIONS, DONOT USE THE INFORMATION.

The information provided in this general information document was formulated using the utmost care; howe-ver, it is provided by OSRAM Opto Semiconductors GmbH on an “as is” basis. Thus, OSRAM Opto Semicon-ductors GmbH does not expressly or implicitly assume any warranty or liability whatsoever in relation to thisinformation, including – but not limited to – warranties for correctness, completeness, marketability, fitnessfor any specific purpose, title, or non-infringement of rights. In no event shall OSRAM Opto SemiconductorsGmbH be liable – regardless of the legal theory – for any direct, indirect, special, incidental, exemplary, con-sequential, or punitive damages arising from the use of this information. This limitation shall apply even ifOSRAM Opto Semiconductors GmbH has been advised of possible damages. As some jurisdictions do notallow the exclusion of certain warranties or limitations of liabilities, the above limitations and exclusions mightnot apply. In such cases, the liability of OSRAM Opto Semiconductors GmbH is limited to the greatest extentpermitted in law.

OSRAM Opto Semiconductors GmbH may change the provided information at any time without giving noticeto users and is not obliged to provide any maintenance or support related to the provided information. Theprovided information is based on special conditions, which means that the possibility of changes cannot beprecluded.

Any rights not expressly granted herein are reserved. Other than the right to use the information provided inthis document, no other rights are granted nor shall any obligations requiring the granting of further rights beinferred. Any and all rights and licenses regarding patents and patent applications are expressly excluded.

It is prohibited to reproduce, transfer, distribute, or store all or part of the content of this document in any formwithout the prior written permission of OSRAM Opto Semiconductors GmbH unless required to do so in ac-cordance with applicable law.

OSRAM Opto Semiconductors GmbH

Head office:

Leibnizstr. 493055 RegensburgGermanywww.osram-os.com

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