high-efficiency dual-input interleaved dc–dc converter for reversible power sources

IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 29, NO. 6, JUNE 2014 2903

High-Efficiency Dual-Input Interleaved DC–DCConverter for Reversible Power Sources

Rong-Jong Wai, Senior Member, IEEE, and Bo-Han Chen

Abstract—This study develops a high-efficiency dual-input inter-leaved dc–dc converter for reversible power sources, e.g., reversiblesolid-oxide fuel cell and rechargeable battery. The proposed con-verter can convert low-voltage reversible power sources to a high-voltage dc bus individually or simultaneously by the phase-shiftcontrol, and also can step down the high-voltage dc bus to chargethe power sources. Moreover, the reversible power sources cancharge each other. According to various situations, the operationalstates of the proposed converter can be divided into four statesincluding a single-input step-up state, a dual-input step-up state, adual-output step-down state, and a dual power source step-up/step-down state. In addition, the inductors in the proposed converter aredesigned to operate in synchronous conduction mode for achiev-ing turn-on zero-voltage-switching (ZVS) of all switches. Further-more, the effectiveness of the designed circuit topology and theZVS properties are verified by experimental results of a 5-kW-level prototype, and the goal of high-efficiency conversion can beobtained.

Index Terms—DC–DC converter, high-efficiency power conver-sion, interleaved, reversible power sources, zero-voltage switching.

I. INTRODUCTION

S INCE the Fukushima Daiichi nuclear disaster in 2011,the development of clean energy [1] without pollution has

gained greater attention than before. Fuel cell (FC) becomes amajor option of clean energy because of high efficiency, clean-ness, and high reliability. However, there are hydrogen storageand product issue in the traditional FC system. A reversiblesolid-oxide FC (RSOFC) is an energy conversion device, and iscapable of being operated in both power generation mode andelectrolysis mode [2]. The RSOFC can integrate the renewableproduction of electricity and hydrogen when power generationand steam electrolysis are coupled in an energy storage systemthat can turn intermittent solar and wind energy [3], [4] into firmpower, or can enable intermittent power to aid in the selective ar-bitrage between peak power rates and power company resourcedeployment and turndowns [5]. Due to the electric characteris-tics of clean energies, the generated power is critically affectedby the climate or has slow transient responses, and the outputvoltage is easily influenced by load variations [6]. Thus, a stor-age element is necessary to ensure proper operation of clean

Manuscript received April 26, 2013; revised June 19, 2013; accepted July26, 2013. Date of current version January 29, 2014. This work was supportedby the National Science Council of Taiwan, under Grant NSC 101-2221-E-155-043-MY3. Recommended for publication by Associate Editor F. L. Luo.

The authors are with the Department of Electrical Engineering, YuanZe University, Chung Li 32003, Taiwan (e-mail: [email protected];[email protected]).

Digital Object Identifier 10.1109/TPEL.2013.2275663

energies. Batteries or super-capacitors are usually taken as stor-age mechanisms for smoothing output power, start-up transition,and various load conditions [7], [8]. The corresponding installedcapacity of clean energies can be further reduced to save the costof system and power supply.

In recent years, hybrid energy systems composed of cleanenergy sources and rechargeable battery modules have beeninvestigated [9]–[12]. Garcia et al. [9] presented an energymanagement system of FC-battery hybrid tramway. In [9], aproton-exchange-membrane FC (PEMFC) system is taken asthe primary energy source and the Ni-MH battery supplementsthe output of the FC during tramway acceleration or wheneverelse needed and cruise and for energy recovery during braking.However, the converter used in [9] has large conduction lossbecause of hard-switching operation, and also has the problemof the reverse-recovery current inside the output diode of the FCconverter. Zhang et al. [10] investigated a bidirectional isolateddc–dc converter for hybrid systems. In [10], the FC bank as themain input power source is connected to the boost-half-bridgecircuit for limiting the input current ripple, and a super-capacitorbank as the auxiliary power source can deliver power to the loadthrough the full-bridge circuit. The simple quasi-optimal designmethod in [10] can reduce the current ac RMS current and ex-tend the zero-voltage-switching (ZVS) range. But a dc blockingcapacitor connected in series with the primary winding cannotaccept a high input current, so that this converter cannot be oper-ated at a high power demand. Nejabatkhah et al. [11] discusseda converter interfacing two unidirectional input power ports anda bidirectional port for a storage element in a unified structure.In [11], the proposed structure utilizes only four power switchesto be independently controlled by four different duty cycles.Unfortunately, these four power switches are not operated un-der the condition of ZVS, and all the diodes in the converter stillhave the reverse-recovery current problem. Wang and Li [12] in-troduced an integrated three-port bidirectional dc–dc convertervia high-frequency transformers to provide the voltage boostcapability and galvanic isolated. Although photovoltaic (PV)panels and battery interfacing with different types of ports canrealize the functions of maximum power point tracking and softswitching under the wide variation of PV voltages, it has somerestrictions on the ZVS condition of the converter in [12] to bechanged for different modes. Besides, the frameworks with twoconverters for hybrid energy systems in [9]–[12] will increasethe manufacturing cost and the size of power conversion mech-anisms. Wu et al. [13] proposed a nonisolated three-port dc–dcconverter based on a dual-input converter and a dual-output con-verter, which serves as an interface for a renewable source, astorage battery, and a load simultaneously. But the framework

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2904 IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 29, NO. 6, JUNE 2014

with two converters makes the corresponding control scheme tobe complicated. Chen et al. [14] investigated a three-port dc–dcconverter integrating photovoltaic and battery power for highstep-up applications. The coupled inductors are used to achievea high step-up voltage gain and to reduce the voltage stress ofinput-side switches. Unfortunately, the coupled inductors cannotbe applied well for a high power demand, and all the switchesare hard switching, so that its conversion efficiency is degener-ated. Zhang et al. [15] introduced a soft-switching dual-inputconverter via a transformer so that the switches were turnedON with ZVS and the diodes are turned OFF with zero-currentswitching (ZCS). However, the capacitor series connected in themain power path will limit the system power level.

In general, most of bidirectional converters for hybrid en-ergy systems are connected with rechargeable battery modules,which can supply alone for supporting the output demand dur-ing the cold start period of the power source. As a result, thereare huge input currents when the system starts up. In orderto smooth the inrushing current, the studies of power convert-ers with interleaved structure have received more attention re-cently [16]–[19]. Jung et al. [16] presented an interleaved boostconverter via a resonant circuit to achieve the soft switching,and used the interleaved structure to reduce the input currentripple. But the resonant circuit will cause the circulation cur-rent loss and increase the manufacturing cost. Lee et al. [17]proposed an interleaved buck converter with a low switchingloss and an improved step-down ratio. However, the couplingcapacitor connected in series with the circuit main path is unableto overcome the high inrushing current in high-power applica-tions. Chen et al. [18] investigated a boost converter with theproperties of ZVS and ZCS to achieve the objective of high-efficiency power conversion. Although the resonant inductorand capacitor can make the main switch to be turned ON withZVS and turned OFF with ZCS, the resonant switch is operatedwith hard switching, and there are circulating currents in the cir-cuit operation modes. Hegazy et al. [19] studied a multideviceinterleaved dc–dc converter that interfaces the fuel cell with thepower train of hybrid electric vehicles. But the operation of hardswitching and the huge reverse-recovery current within the out-put diode degrade the conversion efficiency as a traditional boostconverter. The combination of two interleaved dc–dc convertersinto a dual-input interleaved dc–dc converter can simplify thecircuit topology, improve the system performance, and reducethe manufacturing cost. Thus, multiple-input hybrid power con-version systems (PCS) have become one of interesting researchtopics for engineers and scientists. Yuanmao and Cheng [20]presented a level-shifting voltage-copier circuit to convert oneor two input voltage levels to eight voltage levels. However, itwill result in a huge loss caused by the reverse-recovery cur-rent, and a circulation current loss because of the resonant cir-cuit. Wang et al. [21] proposed isolated single primary windingmultiple-input converters. Unfortunately, the power switches inthis multiinput converter are operated via hard switching, andthe introduction of passive snubbers will increase extra powerlosses. Thus, the objective of high-efficiency power conversionis difficult to achieve by the multiinput interleaved circuit frame-works in [20] and [21].

In this study, a high-efficiency dual-input interleaved dc–dcconverter is designed for reversible power sources. By usingthe interleaved structure, the proposed topology can decreasethe current stresses of the converter switches and reduce theripples of the input current and the output voltage. Moreover,the inductors in the proposed converter are designed to operatein synchronous conduction mode (SCM) for achieving turn-on ZVS of all switches. The proposed converter can convertlow-voltage reversible power sources to a high-voltage dc busindividually or simultaneously by the phase-shift control, andalso can step down the high-voltage dc bus to charge the powersources. Moreover, the reversible power sources can charge eachother. This study is organized into five sections. Following theintroduction, the topology and operation of the proposed high-efficiency dual-input interleaved dc–dc converter are presentedin Section II. The design considerations of circuit componentsare discussed in Section III. In Section IV, experimental resultsare provided to validate the effectiveness of the proposed con-verter. Conclusions are drawn in Section V.

II. TOPOLOGY AND OPERATION OF THE DUAL-INPUT

INTERLEAVED CONVERTER

Fig. 1 shows the circuit topology of the proposed high-efficiency dual-input interleaved dc–dc converter. It containsthree parts including a primary power circuit, a secondary powercircuit, and an output circuit. The major symbol representationsare summarized as follows. V1 and I1 denote the primary inputvoltage and current, respectively. V2 and I2 exhibit the secondaryinput voltage and current, respectively. SP 1 , SP 2 , TP 1 , and TP 2express the power ON/OFF switches and their driving signalsproduced by the power management. C1 , C2 , Li, Siu , and Sid

(i = a, b, c, d) represent individual capacitors, inductors, andswitches in the primary and secondary power circuits; the cor-responding switch driving signals Tiu and Tid (i = a, b, c, d) aregenerated by the pulse width modulation (PWM). Co, Vo , andRo describe the output capacitor, the voltage across the high-voltage dc bus, and the equivalent load in the output circuit,respectively.

For the convenience of analyses, the simplified equivalentcircuit is depicted in Fig. 2, and the directional definition ofsignificant voltages and currents are labeled in this figure. Thesimplification in Fig. 2 is compliant with the following assump-tions: 1) all power switches have ideal characteristics withoutconsidering voltage drops when these devices are conducted;2) the output capacitor Co is well-designed so that the voltageripple due to switching is negligible and could be taken as a con-stant voltage source Vo ; 3) the power ON/OFF switches SP 1 andSP 2 are omitted. According to different power conditions, theoperational states of the proposed converter can be divided intofour states including a single-input step-up state with only oneinput power source, a dual-input step-up state with two inputpower sources, a dual-output step-down state with the high-voltage dc bus taken as the input power for charging two powersources, and a dual power source step-up/step-down state withtwo power sources charged each other. The detailed operationalstages are described as follows.

WAI AND CHEN: HIGH-EFFICIENCY DUAL-INPUT INTERLEAVED DC–DC CONVERTER FOR REVERSIBLE POWER SOURCES 2905

Fig. 1. System configuration of high-efficiency dual-input interleaved dc–dc converter.

Fig. 2. Equivalent circuit.

A. Single-Input Step-Up State

Depending on the power management for energy saving orfailure protection, the proposed converter can be operated at thesingle-input step-up state. By turning off one power ON/OFFswitch SP 1 or SP 2 for cutting off the connection between thepower source and the converter, the input power source V1 or V2can supply alone for supporting the output demand. The primaryinput power supply is considered for example to explain howto operate at this state. The switching period is defined as TS .d1 and d2 are the duty cycles of the switches (Sad, Sbd) and(Sbu , Sau ), respectively; dd is the duty cycle of the dead time.Note that, the inductors are designed to operate in SCM. Thecharacteristic waveforms and topological modes at the single-input step-up state are depicted in Figs. 3 and 4, respectively. Thecomplete operation modes in a switching period of the converterare discussed as follows.

Mode 1 [t0–t1]: Before t0 , the body diode of the switch Sad

has conducted for carrying the inductor current iLa . At t0 , theswitch Sad is turned ON with zero voltage switching (ZVS), andthe switch current iSad is negative. The inductor La is linearlycharged by the primary input voltage V1 .

Mode 2 [t1–t2]: At t1 , the switch Sbd is turned OFF. Then, thebody diode of the switch Sbu conducts for carrying the inductorcurrent iLb to release its stored energy into the output voltageVo . The switch current iSad becomes positive.

Mode 3 [t2–t3]: At t2 , the switch Sbu is turned ON withZVS upon the condition that the body diode of the switch Sbu

conducts. The switch current iSbu is negative, and the inductorLa is persistently charged by the primary input voltage V1 .

Mode 4 [t3–t4]: At t3 , the inductor Lb is operated in theSCM. The inductor current iLb is decreased to negative andstarts to release its stored energy. The switch current iSbu turnsnegative to positive. The inductor La is persistently charged bythe primary input voltage V1 .

Mode 5 [t4–t5]: At t4 , the switch Sbu is turned OFF, andthe body diode of the switch Sbd conducts for carrying theinductor current iLb . The inductor La is persistently charged bythe primary input voltage V1 .

Mode 6 [t5–t6]: At t5 , the switch Sbd is turned ON withZVS upon the condition that the body diode of the switch Sbd

conducts, and the inductor current iLb is still negative. Theinductor La is still persistently charged by the primary inputvoltage V1 .


Fig. 3. Characteristic waveforms at single-input step-up state.

Mode 7 [t6–t7]: At t6 , the switch Sad is turned OFF, and thebody diode of the switch Sau conducts for carrying the inductorcurrent iLa to release its stored energy into the output voltageVo . The switch current iSbd becomes positive.

Mode 8 [t7–t8]: At t7 , the switch Sau is turned ON withZVS upon the condition that the body diode of the switch Sau

conducts. The switch current iSau is negative, and the inductorLb is charged by the primary input voltage V1 .

Mode 9 [t8– t9]: At t8 , the inductor La is operated in theSCM. The inductor current iLa is decreased to negative, andstarts to release its stored energy. The switch current iSau turnsnegative to positive. The inductor Lb is persistently charged bythe primary input voltage V1 .

Mode 10 [t9–t10]: At t9 , the switch Sau is turned OFF, and thebody diode of the switch Sad conducts for carrying the inductorcurrent iLa . The inductor Lb is still persistently charged bythe primary input voltage V1 . Until the switch Sad is turnedON again, it begins the next switching cycle and repeats theoperation in mode 1.

Remark 1: By comparing with a traditional boost converter,the proposed converter replaces the output diode by the powerswitch (Sau , Sbu , Scu , or Sdu ) for achieving the objective ofsynchronous rectification. At the single-input step-up state inFig. 4, the switch Sbu is turned ON at t = t2 with ZVS (Mode3 [t2−t3]), and then it makes the inductor Lb to be operated in

the SCM (Mode 4 [t3−t4]) for promoting the power conversionefficiency. The same action also adopts in Mode 6 [t5−t6] andMode 8 [t7−t8]. The main reason for the inductor current iLb

passed through the power switch instead of its body diode is theconduction loss of the switch body diode to be generally largerthan the one of the power switch.

Remark 2: During the time period from t3 to t7 at the single-input step-up state, the switch Sbu is turned OFF, and the bodydiode of the switch Sbd conducts for carrying the inductor cur-rent iLb (Mode 5 [t4−t5]). Then, the switch Sbd turned ON withZVS not only makes sure the inductor Lb to be operated in theSCM, but also improves the power conversion efficiency. Be-cause the conduction loss of the switch body diode is generallylarger than the one of the power switch, no extra conductionlosses will be produced during the time period from t3 to t7 atthe single-input step-up state.

B. Dual-Input Step-Up State

The proposed converter is operated at the dual-input step-upstate with two input power sources. In this state, the switchingperiod is defined as TS . d1 is the duty cycle of the switches (Sad

and Sbd); d2 is the duty cycle of the switches (Sau and Sbu ); d3is the duty cycle of the switches (Scd and Sdd); d4 is the dutycycle of the switches (Scu and Sdu ); and dd is the duty cycleof the dead time. The inductors are also designed to operatein the SCM. In order to explain the operational principle at thedual-input step-up state easily, the following theoretical analysisis based on the assumption of the primary input current I1 isgreater than the secondary input current I2 . The characteristicwaveforms and topological modes at the dual power-supply stateare depicted in Figs. 5 and 6, respectively. The operation modesin this state are discussed as follows.

Mode 1 [t0–t1]: Before t0 , the switch Sad has been turnedON with ZVS. At t0 , the switch current iSad is negative. Theinductor Lb is linearly charged by the primary input voltageV1 . In the secondary power circuit, the inductor Ld releases itsstored energy to the output voltage Vo , and the inductor Lc islinearly charged by the secondary input voltage V2 .

Mode 2 [t1–t2]: In this mode, the operation of the primarypower circuit is the same as the one in mode 1. In the sec-ondary power circuit, the inductor Ld is operated in the SCM.The inductor current iLd is decreased to negative and contin-ues to release its stored energy. The secondary input source V2persistently charges the inductor Lc .

Mode 3 [t2–t3]: At t2 , the switch Sbd is turned OFF, and thebody diode of the switch Sbu conducts for carrying the inductorcurrent iLb to release its stored energy into the output voltageVo . The switch current iSad becomes positive. In the secondarypower circuit, the switch Sdu is turned OFF, and the body diodeof the switch Sdd conducts for carrying the inductor current iLd .The inductor Lc is persistently charged by the secondary inputvoltage V2 .

Mode 4 [t3–t4]: At t3 , the switch Sbu is turned ON with ZVSupon the condition that the body diode of the switch Sbu con-ducts, and the switch current iSbu is still negative. The inductorLa is charged by the primary input voltage V1 . In the secondary


Fig. 4. Topological modes at single-input step-up state.

power circuit, the switch Sdd is turned ON with ZVS uponthe condition that the body diode of the switch Sdd conducts.The inductor Lc is persistently charged by the secondary inputvoltage V2 .

Mode 5 [t4–t5]: At t4 , the inductor Lb is operated in theSCM. The inductor current iLb is decreased to negative andstarts to charge the primary input voltage V1 . The inductor La

is persistently charged by the primary input voltage V1 , and theswitch current iSbu becomes positive. In the secondary powercircuit, the inductor Lc is persistently charged by the secondaryinput voltage V2 , and the switch current iSdd is negative.

Mode 6 [t5–t6]: At t5 , the switch Sbu is turned OFF, andthe body diode of the switch Sbd conducts for carrying theinductor current iLb . The inductor La is persistently chargedby the primary input voltage V1 . In the secondary power cir-cuit, the inductor Lc is still persistently charged by the sec-ondary input voltage V2 , and the switch current iSdd becomespositive.


conducts, and the inductor current iLb is still negative. Theinductor La is persistently charged by the primary input voltage


Fig. 5. Characteristic waveforms at dual-input step-up state.

V1 . In the secondary power circuit, the switch Scd is turned OFFat t6 . The body diode of the switch Scu conducts for carrying theinductor current iLc , and the secondary input voltage V2 startsto charge the inductor Ld .

Mode 8 [t7–t8]: At t7 , the inductor La is persistently chargedby the primary input voltage V1 , and the inductor current iLb

is still negative. In the secondary power circuit, the switch Scu

is turned ON with ZVS upon the condition that the body diodeof the switch Scu conducts. The inductor Lc releases its storedenergy to the output load. In the meanwhile, the inductor Ld ispersistently charged by the secondary input voltage V2 .

Mode 9 [t8–t9]: In this mode, the operation in the primarypower circuit is the same as the one in mode 8. In the secondarypower circuit, the inductor Lc is operated in the SCM. Theinductor current iLc is decreased to negative and starts to chargethe secondary input source V2 . The inductor Ld is persistentlycharged by the secondary input voltage V2 .

Mode 10 [t9–t10]: At t9 , the switch Sad is turned OFF, and thebody diode of the switch Sau conducts for carrying the inductorcurrent iLa to release its stored energy into the output voltageVo . The inductor Lb continues to release its stored energy. In thesecondary power circuit, the inductor Lc continues to release itsstored energy, and the inductor Ld is persistently charged by thesecondary input voltage V2 .

Mode 11 [t10–t11]: In this mode, the body diode of the switchSau persistently conducts. The switch current iSbd becomespositive. In the secondary power circuit, the switch Scu is turnedoff at t10 , and the body diode of the switch Scd conducts forcarrying the inductor current iLc . The inductor Ld is persistentlycharged by the secondary input voltage V2 .

Mode 12 [t11–t12]: At t11 , the switch Sau is turned ON withZVS upon the condition that the body diode of the switch Sau

conducts. The switch current iSau is negative, and the inductorLb is linearly charged by the primary input voltage V1 . In thesecondary power circuit, the switch Scd is turned ON with ZVSupon the condition that the body diode of the switch Scd con-ducts, and the inductor Ld is linearly charged by the secondaryinput voltage V2 .

Mode 13 [t12–t13]: At t12 , the inductor Lb is linearly chargedby the primary input voltage V1 . The inductor La is operatedin the SCM. The inductor current iLa is decreased to negativeand starts to charge the primary power source V1 . The switchcurrent iSau becomes positive. In the secondary power circuit,the switch current iScd is still negative, and the inductor Ld ispersistently charged by the secondary input voltage V2 .

Mode 14 [t13–t14]: In this mode, the inductor La continuesto release its stored energy, and the inductor Lb is persistentlycharged by the primary input voltage V1 . In the secondary powercircuit, the switch Sdd is turned OFF, and the body diode of theswitch Sdu conducts for carrying the inductor current iLd torelease its stored energy into the output voltage Vo . The switchcurrent iScd is still negative.

Mode 15 [t14–t15]: At t14 , the switch Sau is turned OFF,and the body diode of the switch Sad conducts for carrying theinductor current iLa . The inductor Lb is still persistently chargedby the primary input voltage V1 . In the secondary power circuit,the switch Sdu is turned ON with ZVS upon the condition that


Fig. 6. Topological modes at dual-input step-up state.

the body diode of the switch Sdu conducts, and the switchcurrent iScd becomes positive. The secondary input voltage V2starts to charge the inductor Lc .

Remark 3: When the output power decreases, the switch dutycycle d1 decreases, and both |iLa(min) | and |iLb(min) | increaseaccording to Fig. 5. Unavoidably, the increase of the area ofnegative inductor currents will result in the reduction of powerconversion efficiency. Thus, the superior property of the induc-tors to be operated in the SCM is more suitable for the full loadin the proposed dual-input interleaved converter.

C. Dual-Output Step-Down State

In this state, the switching period is defined as TS . d1 is theduty cycle of the switches (Sau and Sbu ); d2 is the duty cycle ofthe switches (Sad and Sbd); d3 is the duty cycle of the switches

(Scu and Sdu ); d4 is the duty cycle of the switches (Scd andSdd); and dd is the duty cycle of the dead time. The inductorsare also designed to operate in the SCM. In order to explain theoperational principle in the dual-output step-down state easily,the following theoretical analysis is based on the assumptionthat the high-voltage dc bus energy is higher than the ones ofthe two input power sources. The proposed converter can chargethe primary and secondary input sources by the high-voltage dcbus. The characteristic waveforms and topological modes atthe dual-output step-down state are depicted in Figs. 7 and 8,respectively. The operation modes in this state are discussed asfollows.

Mode 1 [t0–t1]: Before t0 , the body diode of the switch Sau

conducts for carrying the inductor current iLa to release itsstored energy into the output voltage Vo . At t0 , the switch Sau

is turned ON with ZVS, and the inductor La continues to release


Fig. 7. Characteristic waveforms at dual-output step-down state.

its stored energy. In the secondary power circuit, the inductorcurrent iLd releases its stored energy to charge the secondaryinput voltage V2 , and the inductor Lc is persistently charged bythe secondary input voltage V2 .

Mode 2 [t1–t2]: At t1 , the switch current iSau is increasedto positive, and the high-voltage dc bus charges the inductor La

and the primary input source V1 . In the meanwhile, the inductorLb is persistently charged by the primary input voltage V1 . Inthe secondary power circuit, the inductor current iLd releasesits stored energy to charge the secondary input source V2 , andthe inductor Lc is persistently charged by the secondary inputvoltage V2 .

Mode 3 [t2–t3]: At t2 , the switch Sau is turned OFF, and thebody diode of the switch Sad conducts for carrying the inductorcurrent iLa to release its stored energy into the primary inputsource V1 . The inductor Lb is persistently charged by the primaryinput voltage V1 . In the secondary power circuit, the inductorcurrent iLd releases its stored energy to charge the secondaryinput source V2 , and the inductor Lc is persistently charged bythe secondary input voltage V2 .

Mode 4 [t3–t4]: At t3 , the switch Sad is turned ON withZVS upon the condition that the body diode of the switch Sad

conducts, and the inductor La continues to release its storedenergy to the primary input source V1 . In the meanwhile, theinductor Lb is persistently charged by the primary input voltageV1 . In the secondary power circuit, the switch Scd is turned OFF,and the body diode of the switch Scu conducts for carryingthe inductor current iLc to release its stored energy into theoutput voltage Vo . The inductor Ld is operated in the SCM. Theinductor current iLd is increased to positive, and the secondaryinput voltage V2 starts to charge the inductor Ld .

Mode 5 [t4–t5]: At t4 , the inductor La continues to release itsstored energy into the primary input source V1 , and the inductorLb is persistently charged by the primary input voltage V1 .In the secondary power circuit, the switch Scu is turned ONwith ZVS upon the condition that the body diode of the switchScu conducts. The inductor Ld is persistently charged by thesecondary input voltage V2 .

Mode 6 [t5–t6]: In this mode, the operation of the primarypower circuit is the same as the one in mode 5. In the secondarypower circuit, the switch current iScu is increased to positive,and the high-voltage dc bus charges the inductor Lc and the sec-ondary input source V2 . The inductor Ld is persistently chargedby the secondary input voltage V2 .

Mode 7 [t6–t7]: In this mode, the operation of the primarypower circuit is also the same as the one in mode 5. In thesecondary power circuit, the switch Scu is turned OFF at t6 ,and the body diode of the switch Scd conducts for carryingthe inductor current iLc to release its stored energy into thesecondary input source V2 . The inductor Ld is still persistentlycharged by the secondary input voltage V2 .

Mode 8 [t7–t8]: At t7 , the inductor La is operated in theSCM. The inductor current iLa is increased to positive, and theprimary input voltage V1 starts to charge the inductor La . Theswitch Sbd is turned OFF, and the body diode of the switch Sbu

conducts for carrying the inductor current iLb . In the secondarypower circuit, the switch Scd is turned ON with ZVS uponthe condition that the body diode of the switch Scd conducts,and the inductor Lc continues to release its stored energy intothe secondary input source V2 . The inductor Ld is persistentlycharged by the secondary input voltage V2 .


Fig. 8. Topological modes at dual-output step-down state.

Mode 9 [t8–t9]: At t8 , the switch Sbu is turned ON withZVS upon the condition that the body diode of the switch Sbu

conducts. The inductor La is persistently charged by the primaryinput voltage V1 . In this mode, the operation of the secondarypower circuit is the same as the one in mode 8.

Mode 10 [t9–t10]: At t9 , the switch current iSbu is increasedto positive, and the high-voltage dc bus charges the inductorLb and the primary input source V1 . The inductor La is still

persistently charged by the primary input voltage V1 . In thismode, the operation of the secondary power circuit is also thesame as the one in mode 8.

Mode 11 [t10–t11]: At t10 , the switch Sbu is turned OFF,and the body diode of the switch Sbd conducts for carrying theinductor current iLb to release its stored energy into the primaryinput source V1 . In this mode, the operation of the secondarypower circuit is also the same as the one in mode 8.


Mode 12 [t11–t12]: In this mode, the operation of the primarypower circuit is the same as the one in mode 11. In the secondarypower circuit, the switch Sdd is turned OFF at t11 , and thebody diode of the switch Sdu conducts for carrying the inductorcurrent iLd . The inductor Lc continues to release its storedenergy into the secondary input source V2 .


conducts. The inductor La is persistently charged by the primaryinput voltage V1 , and the inductor current iLb releases its storedenergy to charge the primary input source V1 . In the secondarypower circuit, the body diode of the switch Sdu persistentlyconducts. The inductor Lc is operated in the SCM. The inductorcurrent iLc is increased to positive, and the secondary inputvoltage V2 starts to charge the inductor Lc .

Mode 14 [t13–t14]: In this mode, the operation of the primarypower circuit is the same as the one in mode 13. In the secondarypower circuit, the switch Sdu is turned ON at t13 with ZVS uponthe condition that the body diode of the switch Sdu conducts,and the inductor Lc is persistently charged by the secondaryinput voltage V2 .

Mode 15 [t14–t15]: In this mode, the operation of the primarypower circuit is also the same as the one in mode 13. In thesecondary power circuit, the inductor Lc is persistently chargedby the secondary input voltage V2 . The switch current iSdu isincreased to positive, and the high-voltage dc bus charges theinductor Ld and the secondary input source V2 .

Mode 16 [t15–t16]: At t15 , the switch Sad is turned OFF,and the body diode of the switch Sau conducts for carrying theinductor current iLa . In the secondary power circuit, the inductorLc is persistently charged by the secondary input voltage V2 .The switch Sdu is turned OFF at t15 , and the body diode ofthe switch Sdd conducts for carrying the inductor current iLd torelease its stored energy into the secondary input source V2 .

Mode 17 [t16–t17]: At t16 , the body diode of the switchSau persistently conducts. The inductor Lb is operated in theSCM. The inductor current iLb is increased to positive, and theprimary input voltage V1 starts to charge the inductor Lb . In thesecondary power circuit, the switch Sdd is turned ON at t16 withZVS upon the condition that the body diode of the switch Sdd

conducts. The inductor Lc is still persistently charged by thesecondary input voltage V2 .

D. Dual Power Source Step-Up/Step-Down State

When the proposed converter is operated at the dual powersource step-up/step-down state, the primary input source V1 canstep-down its voltage to charge the secondary power circuit ifthe primary input voltage V1 is higher than the secondary inputvoltage V2 . In the other way, the secondary input source V2 canstep up its voltage to charge the primary power circuit. At thedual power source step-up/step-down state, the correspondingoperated modes are similar to the ones at the dual-input step-upstate and the dual-output step-down state. The modes 1, 14, and15 at the dual-input step-up state are the modes of the secondarypower source to step-up the voltage via the path of the inductorLd and convert the power to the high-voltage dc bus. The modes7–10 at the dual-input step-up state are the same way to convert

the power to the high-voltage dc bus via the path of the inductorLc . The modes 10–16 at the dual-output step-down state are themodes to step-down the high-voltage dc bus for charging theprimary power source V1 via the path of the inductor Lb . Themodes 2–7 at the dual-output step-down state are the modesto step-down the high-voltage dc bus for charging the primarypower source V1 via the path of the inductor La . Summingup the above, it can step up the secondary input voltage V2 tocharge the primary power source V1 . By the symmetry way, onealso can step down the primary input voltage V1 to charge thesecondary power source V2 .

E. Voltage Gain Derivation

According to the different conditions, the voltage gains ofthe proposed dual-input interleaved dc–dc converter are com-posed of a step-up voltage gain Gv1 and a step-down volt-age gain Gv2 . At the single-input step-up state, the step-upvoltage gain Gv1 can be derived by the volt-second balancemethod [25]. According to the volt-second balance method, thevoltage-second production of the inductor La in a switchingperiod should be equal to zero. Because the inductor currentiLa increases from iLa(min) to iLa(max) during the time intervalt = (t6 − t0) + (t10 − t9) = (d1 + dd)TS , the variation of theinductor current (ΔiLa = iLa(max) − iLa(min)) can be calcu-lated as

ΔiLa =V1

La(d1 + dd)TS . (1)

Moreover, the inductor current iLa decreases from iLa(max) toiLa(min) during the time interval t = (t9 − t6) = (d2 + dd)TS ,and the variation of the inductor current (−ΔiLa = iLa(min) −iLa(max)) can be represented as

−ΔiLa =V1−Vo

La(d2 +dd)TS =

V1−Vo

La[1−(d1 + dd)]TS .

(2)When the proposed converter is operated at the steady state, theinductor current variation should be equal to zero. From (1) and(2), the step-up voltage gain Gv1 can be obtained as

Gv1 =Vo

V1=

11 − (d1 + dd)

. (3)

The step-down voltage gain Gv2 also can be derived by the volt-second balance method at the dual-output step-down state. Forexample, the variation of the inductor current iLc in a switch-ing period should be equal to zero. The inductor current iLc

decreases from iLc(max) to iLc(min) during the time intervalt = (t6 − t3) = (d3 + dd)TS , and the variation of the inductorcurrent (−ΔiLc = iLc(min) − iLc(max)) can be expressed as

−ΔiLc =V2 − Vo

Lc(d3 + dd)TS . (4)

In addition, the inductor current iLc increases from iLc(min) toiLc(max) during the time interval t = (t3 − t0) + (t17 − t6) =[1 − (d3 + dd)]TS , and the variation of the inductor current(ΔiLc = iLc(max) − iLc(min)) can be represented as

ΔiLc =V2

Lc[1 − (d3 + dd)]TS . (5)


Fig. 9. Characteristic waveforms under the boundary of inductors operated insynchronous conduction mode: (a) La and (b) Lc .

When the proposed converter is operated at the steady state, theinductor current variation should be equal to zero. From (4) and(5), the step-down voltage gain Gv2 can be obtained as

Gv2 =V2

Vo= d3 + dd. (6)

III. DESIGN CONSIDERATIONS

To verify the effectiveness of the proposed dual-input in-terleaved dc–dc converter topology, the voltage range of theprimary input source is set from 42 to 63 V, and the voltage ofthe secondary power source (V2) is set at 48 V. Moreover, thedesired voltage for the high-voltage dc bus (Vo) is set at 200 V,and the maximum output power in the proposed converter is5 kW. In addition, this converter is operated with a 40-kHzswitching frequency (fS = 40 kHz). In order to make sure theproposed converter to be operated in the SCM, the values of theinductors (La, Lb, Lc , and Ld) should be specially determinedto qualify the circuit design. At the single-input step-up state,the inductor current i′La can be displayed in Fig. 9(a) when theinductor La is operated at the critical point of the SCM. Theinductor current i′La decreases to i′La(min) when the inductor La

is operated in the SCM during the time interval from td to te .

During the time interval from te to tf , the switch Sau is turnedOFF, and the body diode of the switch Sad conducts to carrythe inductor current i′La . The inductor current increases fromi′La(min) . The time interval from te to tf is defined as the deadtime to avoid both the two switches (Sad and Sau ) conductingat the same time, and make sure the inductor current has enoughtime to conduct the body diode of the switch Sad . At the single-input step-up state, the relationship of the step-up voltage gain(Gv1) with respect to the switch duty cycle (d1) under differ-ent dead times is depicted in Fig. 10(a). By depending on theprimary input voltage (V1 = 48 V) and the high-voltage dc busvoltage (Vo = 200 V), the duty cycle for the switch Sad can bedetermined as d1 = 0.71 if the dead-time duty cycle is chosenas dd = 0.05. As can be seen from Fig. 9(a), the condition ofthe inductor La to be operated at the critical point of the SCMis that the switch current i′Sad is still negative before the endof the dead time. As for this SCM condition, the variation ofthe inductor current i′La (Δi′′La = 0 − i′La(min)) during the timeinterval from te to tf can be obtained as

Δi′′La =V1

LaddTS . (7)

From (7), the inductor current i′La(min) at the critical point ofthe SCM can be calculated as

i′La(min) = − V1

LaddTS . (8)

The inductor current i′La(min) also can be represented asi′La(min) = I ′La − 1

2 Δi′La , where I ′La is the average current ofthe inductor La , and Δi′La = i′La(max) − i′La(min) is the maxi-mum variation of the inductor current i′La at the critical condi-tion of the SCM. Due to the proposed converter with interleavedstructures, the average current of the inductor La is equal to thehalf of the input current. Thus, i′La(min) can be rewritten via (1)as

i′La(min) = I ′La − 12Δi′La =

V 2o

2V1Roη− V1

2La(d1 + dd)TS

(9)where η is the power conversion efficiency at the single-input step-up state. The assumption of η = 95% at Po =2.5 kW(Ro = 16 Ω) is made in this study. According to (8)and (9), one can obtain the inductor La as

La =ηV 2

1 Ro

V 2o

(d1 − dd)TS (10)

Fig. 10(b) shows the relationship of the inductor value La withrespect to the switch duty cycle d1 under different dead times. Ascan be seen from Fig. 10(b), the inductor value La at the single-input step-up state can be chosen as La = 14.4μH when theselection of d1 = 0.71, dd = 0.05 in Fig. 10(a). As can be seenfrom Fig. 9(a), there are two duty cycles for the switches (d1 andd2) and two dead-time duty cycles (dd) to avoid the switches(Sad and Sau ) or (Sbd and Sbu ) turning ON simultaneously inone switching period. Thus, the duty cycle of d2 for the switchSau can be determined as d2 = 1 − d1 − 2dd . According to theselection of d1 = 0.71 and dd = 0.05, the duty cycle of d2 canbe determined as d2 = 0.19.


Fig. 10. Relationship of voltage gain, duty cycle, and inductor value: (a) Duty cycle (d1 ) with respect to voltage gain (GV 1 ) under different dead times,(b) Inductor value (La ) with respect to duty cycle (d1 ) under different dead times, and (c) Inductor value (Lc ) with respect to duty cycle (d3 ) under differentdead times.

At the dual-output step-down state, the inductor current i′Lc

can be displayed in Fig. 9(b) when the inductor Lc is operated atthe critical point of the SCM. The inductor current i′Lc increasesto i′Lc(max) when the inductor Lc is operated in the SCM duringthe time interval from tb to tc . During the time interval fromtc to td , the switch Scd is turned OFF, and the body diode ofthe switch Scu conducts to carry the inductor current i′Lc . Theinductor current i′Lc decreases from i′Lc(max) . The time intervalfrom tc to td is defined as the dead time to avoid both the twoswitches (Scu and Scd) conducting at the same time, and makesure the inductor current has enough time to conduct the bodydiode of the switch Scu . The condition of the inductor Lc tobe operated at the critical point of the SCM is that the switchcurrent i′Scu is still negative before the end of the dead time. Asfor this SCM condition, the variation of the inductor current i′Lc

(−Δi′′Lc = 0 − i′Lc(max)) during the time interval from tc to tdcan be obtained as

−Δi′′Lc =V2 − Vo

LcddTS . (11)

From (11), the inductor current i′Lc(max) at the critical point ofthe SCM can be calculated as

i′Lc(max) =Vo − V2

LcddTS . (12)

The inductor current i′Lc(max) also can be represented as

i′Lc(max) = I ′Lc + 12 Δi′Lc , where I ′Lc is the average current of

the inductor Lc , and Δi′Lc is the maximum variation of the in-ductor current i′Lc at the critical condition of the SCM. Due tothe proposed converter with interleaved structures, the averagecurrent of the inductor Lc is equal to the half of the input current.Thus, i′Lc(max) can be rewritten as

i′Lc(max) = I ′Lc +12Δi′Lc = − V2

2Rbη+

Vo − V2

2Lc(d3 + dd)TS

(13)where Rb is the equivalent resistance of the secondary powersource at the dual-output step-down state. According to (12) and(13), one can obtain the inductor Lc as

Lc =Vo − V2

V2ηRb(d3 − dd)TS . (14)

By substituting V2 = 48 V, Vo = 200 V, and dd = 0.05 into (6),one can obtain the duty cycle for the switch Scu as d3 = 0.19.As can be seen from Fig. 9(b), there are two duty cycles forthe switches (d3 and d4) and two dead-time duty cycles dd inone switching period. Thus, the duty cycle d4 for the switchScd can be determined as d4 = 1 − d3 − 2dd . According tothe selection of d3 = 0.19 and dd = 0.05, the duty cycle d4can be determined as d4 = 0.71. When the secondary power


source is operated at 2.5 kW, the equivalent resistance of thesecondary power source is Rb = 0.9216Ω. Fig. 10(c) shows therelationship of the inductor value Lc with respect to the switchduty cycle d3 under different dead times. As can be seen fromFig. 10(c), the inductor value Lc at the dual-output step-downstate can be chosen as Lc = 9.7 μH under the selection of dd =0.05. According to the aforementioned theoretical analyses, thecritical value of the inductors (La, Lb, Lc , and Ld) should bechosen under the value of 14.4 μH when the proposed converteris operated at the single-input step-up state and the dual-inputstep-up state. When the proposed converter is operated at thedual-output step-down state, the critical value of the inductors(La, Lb, Lc and Ld) should be chosen under the value of 9.7 μH.For making sure the inductors can be operated at each state, allvalues of the inductors (La, Lb, Lc and Ld) are chosen as 9 μHby considering the circuit stray effects and guaranteeing theinductors to be operated in the SCM.

It is assumed that the maximum output power of the primarypower circuit or the secondary power circuit in the proposedconverter is 2.5 kW. In the previous design consideration, theinductor value is designed according to the maximum outputpower of 2.5 kW. For verifying the selected inductor to workwell for different load situations, the proposed converter oper-ated at the half load of 1.25 kW and the light load of 500 Wis discussed here. When the proposed converter is operatedat the half load with V1 = 48 V, V2 = 48 V, Vo = 200 V, andη = 94%, the inductor values at the step-up state and the step-down state can be, respectively, obtained as La = 28.6μH andLc = 19.2 μH according to (10) and (14). By the same way, theproposed converter operated at the light load also can be ver-ified. By substituting V1 = 48 V, V2 = 48 V, Vo = 200 V, andη = 87.5% into (10) and (14), the inductor values at the step-upstate and the step-down state can be calculated as La = 66.5 μHand Lc = 44.6 μH, respectively. The selected inductor value of9 μH in this study is under all the calculation of the inductorvalues so that all the inductors can be operated in the SCM.Thus, the inductor selection is suitable for not only full load butalso half load and light load.

By considering a maximum output power Po = 5kW withthe primary input voltage V1 = 42−63 V, the secondary inputvoltage V2 = 48 V, and the switching period TS = 25μs at thedual-input step-up state, the maximum and minimum values ofthe inductor currents (iLa and iLb) are 77.41 and −14.75 A,respectively; the ones of the inductor currents (iLc and iLd) are78.07 and −23.25 A, respectively. As for the dual-output step-down state, the maximum and minimum values of the inductorcurrents (iLa and iLb) are 14.75 and −77.41 A, respectively;the ones of the inductor current (iLc and iLd) are 23.25 and−78.07 A, respectively. According to the maximum and min-imum values of the inductor currents, the current stresses onthe switches can be determined. Moreover, the voltage stresseson the switches are equal to the voltage of the high-voltagedc bus (Vo = 200 V). Therefore, all the switches Siu and Sid

(i = a, b, c, d) are chosen as MOSFET IXTQ88N28 T with abreakdown voltage of 280 V, VSD = 1.5 V, and RDS(on) =44 mΩ.

In the output circuit, the ripple of the output voltage canbe derived by the variation of the capacitor current. Foran example at the single-input step-up state, the electriccharge variation of the output capacitor (ΔQ) can be ex-pressed as ΔQ = (Vo/Ro)(d1 + dd)Ts = CoΔVo . Moreover,the ripple of the output voltage Vo can be rearranged as(ΔVo/Vo) = (d1 + dd)Ts/(RoCo), and the output voltage rip-ple is assumed to be less than 1% in this study. In addi-tion, the value of the output capacitor can be representedas Co = (d1 + dd)Ts/[Ro(ΔVo/Vo)]. Thus, the value of theoutput capacitor Coshould be selected over 118.75 μF bysubstituting d1 = 0.71, dd = 0.05, Ro = 16 Ω (Po = 2.5 kW),fS = 40 kHz, and Vo = 200 V into the function of Co = (d1 +dd)Ts/[Ro(ΔVo/Vo)]. In this study, the value of the output ca-pacitor Co is selected as 150 μF in the experimental prototype.By the same capacitor calculation way, the value of the outputcapacitor Co at the half load of 1.25 kW and the light load of500 W can be obtained as 59.37 μF and 23.75μF, respectively.All the calculation of the capacitor values is under the selectedcapacitor value of 150 μF in this study so that the output volt-age ripple can be restricted to be less than 1%. Therefore, theselected output capacitor is suitable for not only full load butalso half load and light load.

IV. EXPERIMENTAL RESULTS

In order to verify the effectiveness of the proposed high-efficiency dual-input interleaved dc–dc converter, rich experi-mental results are provided in this section. Two groups of bat-tery modules are used to take as the primary and secondarypower sources with a maximum power of 2.5 kW for eachgroup. The voltage range of the primary input source is set atV1 = 42−63V to imitate an RSOFC, and the voltage of the sec-ondary input source is V2 = 48 V. The proposed converter canstep up the varied voltages of different power sources in thesense of hybrid power supply to a stable high-voltage dc bus forthe load demand, and step down the voltage of the high-voltagedc bus to charge the primary and secondary power sources.By considering the latter inverter applications with 110 Vac,the desired voltage of the high-voltage dc bus is set at 200 V,and the maximum output power of this converter prototype is5 kW. Two magnetic contactors (S-P50 T), manufactured byShihlin Company, are used to switch the power supply situationbetween the single-input step-up state and the dual-input step-up state in the proposed converter. The driving signals for theswitches in the proposed high-efficiency dual-input interleaveddc–dc converter are generated by the digital signal processor(DSP) TMS320F2812 manufactured by Texas Instruments andperipheral logic circuits. For the interleaved structure in the pro-posed converter, the driving signals are produced by the PWMphase-shift control to manipulate the power switches. In thisstudy, the feedback control is used to solve the problem ofthe output voltage varied with load variations. In this feedbackscheme, conventional proportional–integral (PI) control with-out the detailed mathematical dynamic model is utilized. In thesingle-input step-up state, the dual-output step-down state, and


the dual power source step-up/step-down state, the PI voltagecontrol is adopted. For avoiding the current sharing problem,the PI voltage and current controllers are individually used forthe primary power circuit and the secondary power circuit in thedual-input step-up state.

Due to the cold startup of the RSOFC and the power manage-ment for hybrid reversible power sources, the system operationprinciple is expressed as follows: 1) During the start of the sys-tem, the rechargeable battery powers the high-voltage dc busto ensure the cold startup of the RSOFC easily; 2) When thesystem starts, the rechargeable battery can provide the insuf-ficient energy if the RSOFC cannot respond quickly so thatthe dynamic characteristics of the entire system can be im-proved; 3) The rechargeable battery can provide peak powerso that the power rating of the RSOFC can be decreased andthe total cost of the whole system can be reduced; 4) Whenthe energy in the high-voltage dc bus is higher than ones oftwo input power sources, the proposed converter can chargethe primary and secondary input sources by the high-voltagedc bus; 5) When the system is operated in self energy-storagemode, the RSOFC and rechargeable battery can charge eachother.

A. Single-Input Step-Up State

For examining the performance of the proposed converterat the single-input step-up state with the primary input powersource, the experimental results with the primary input volt-age V1 = 48 V and an output power of 2.5 kW are depicted inFig. 11. The proposed converter under the closed-loop voltagecontrol indeed produces a constant output voltage of 200 Vvia the DSP module written within a PI feedback control law.Fig. 11(a) presents the driving signals Tad and Tau , the induc-tor current iLa , and the primary input voltage V1 . The drivingsignals Tbd and Tbu , the inductor current iLb , and the outputvoltage Vo are depicted in Fig. 11(b). The driving signals (Tad

and Tau ) or (Tbd and Tbu ) are complementary, and they havedead times to avoid the switches (Sad and Sau ) or (Sbd andSbu ) turning ON simultaneously. The inductor La or Lb to beoperated in the SCM is obvious. The output voltage is stablycontrolled to be Vo = 200 V. Fig. 11(c) shows the driving signalTad , the inductor current iLa , the switch current iSad , and theswitch voltage vSad . By observing the switch voltage vSad andthe switch current iSad , the characteristic of turning on withZVS is obvious due to the switch current iSad is negative beforethe switch Sad is turned on. Fig. 11(d) illustrates the driving sig-nal Tau , the inductor current iLa , the switch current iSau , andthe switch voltage vSau . By comparing with a tradition boostconverter, the proposed converter replaces the output diode bya power switch to achieve the objective of synchronous rectifi-cation. The switch Sau is turned on with ZVS since the switchcurrent iSau is negative before the switch Sau is turned. Theproblem of the reverse-recovery current inside the output diodein the tradition boost converter also can be solved. Fig. 11(e)performs the driving signal Tbd , the inductor current iLb , theswitch current iSbd , and the switch voltage vSbd . By observingthe switch voltage vSbd and the switch current iSbd , the char-

acteristic of turning on with ZVS is obvious due to the switchcurrent iSbd is negative before the switch Sbd is turned on.Fig. 11(f) displays the driving signal Tbu , the inductor currentiLb , the switch current iSbu , and the switch voltage vSbu . Theswitch Sbu is turned on with ZVS since the switch current iSbu

is negative before the switch Sbu is turned. The problem of thereverse-recovery current inside the output diode in the traditionboost converter also can be solved.

B. Dual-Input Step-Up State

The experimental results of the proposed converter at thedual-input step-up state with V1 = 63 V, V2 = 48 V and an out-put power of 5 kW are depicted in Fig. 12. By implementing thePI feedback voltage and current control laws in the DSP module,the goal of a stably controlled output voltage Vo = 200 V can beachieved. To compare with the tradition boost converter, the pro-posed topology replaces the output diodes by the power switches(Sau , Sbu , Scu and Sdu ) to achieve the objective of synchronousrectification, and the problem of the reverse-recovery current in-side the output diode in the tradition boost converter also canbe solved. Fig. 12(a) presents the driving signals Tad and Tau ,the inductor current iLa , and the primary input voltage V1 . Thedriving signals Tbd and Tbu , the inductor current iLb , and theoutput voltage Vo are depicted in Fig. 12(b). The driving signals(Tad and Tau ) or (Tbd and Tbu ) are complementary, and theyhave dead times to avoid the switches (Sad and Sau ) or (Sbd

and Sbu ) turning on simultaneously. The inductor La or Lb tobe operated in the SCM is obvious, and the output voltage isstably controlled to be Vo = 200 V. Fig. 12(c) shows the drivingsignal Tad , the inductor current iLa , the switch current iSad , andthe switch voltage vSad . The driving signal Tau , the inductorcurrent iLa , the switch current iSau , and the switch voltage vSau

are depicted in Fig. 12(d) and (e) performs the driving signalTbd , the inductor current iLb , the switch current iSbd , and theswitch voltage vSbd . The driving signal Tbu , the inductor cur-rent iLb , the switch current iSbu , and the switch voltage vSbu

are depicted in Fig. 12(f). By observing the switch voltages andcurrents in Fig. 12(c)–(f), the characteristic of turning on withZVS is obvious due to the switch currents (iSad , iSau , iSbd andiSbu ) are negative before the switches (Sad, Sau , Sbd and Sbu )are turned on. The driving signals Tcd and Tcu , the inductorcurrent iLc and the secondary input voltage V2 are depicted inFig. 12(g); the driving signals Tdd and Tdu , and the inductorcurrent iLd are depicted in Fig. 12(h). The driving signals (Tcd

and Tcu ) or (Tdd and Tdu ) are complementary, and they alsohave dead times to avoid the switches (Scd and Scu ) or (Sdd andSdu ) turning on simultaneously. The inductor Lc or Ld to beoperated in the SCM is obvious. Fig. 12(i) illustrates the drivingsignal Tcd , the inductor current iLc , the switch current iScd , andthe switch voltage vScd . The driving signal Tcu , the inductorcurrent iLc , the switch current iScu , and the switch voltage vScu

are depicted in Fig. 12(j) and (k) performs the driving signalTdd , the inductor current iLd , the switch current iSdd , and theswitch voltage vSdd . The driving signal Tdu , the inductor currentiLd , the switch current iSdu , and the switch voltage vSdu aredepicted in Fig. 12(l). The switches (Scd, Scu , Sdd and Sdu ) are


Fig. 11. Experimental results at single-input step-up state with V1 = 48 V, VO = 200 V, and 2.5-kW output power.

turned on with ZVS since the switch currents (iScd , iScu , iSdd

and iSdu ) are negative before the switches are turned on.

C. Dual-Output Step-Down State

Fig. 13 shows the experimental results at the dual-outputstep-down state with V1 = 63 V, V2 = 48 V, VO = 200 V andan output power of 5 kW. Fig. 13(a) presents the driving signalsTad and Tau , the inductor current iLa , and the primary inputsource V1 . The driving signals Tbd and Tbu , the inductor cur-rent iLb , and the output voltage Vo are depicted in Fig. 13(b).The driving signals (Tad and Tau ) or (Tbd and Tbu ) are com-plementary, and they have dead times to avoid the switches(Sad and Sau ) or (Sbd and Sbu ) turning ON simultaneously.The inductor La or Lb to be operated in the SCM is obvious.The terminal voltage at the primary power circuit is stably con-trolled to be V1 = 63 V, and the voltage of the high-voltagedc bus is Vo = 200 V. Fig. 13(c) illustrates the driving signal

Tau , the inductor current iLa , the switch current iSau , and theswitch voltage vSau . The driving signal Tad , inductor currentiLa , the switch current iSad , and the switch voltage vSad aredepicted in Fig. 13(d). and (e) performs the driving signal Tbu ,inductor current iLb , the switch current iSbu , and the switchvoltage vSbu . The driving signal Tbd , the inductor current iLb ,the switch current iSbd , and the switch voltage vSbd are depictedin Fig. 13(f). By observing the switch voltages and currents asshown in Fig. 13(c)–(f), the characteristic of turning on withZVS is obvious due to the switch currents (iSau , iSad , iSbu andiSbd) are negative before the switches (Sau , Sad , Sbu and Sbd)are turned on. The driving signals Tcd and Tcu , the inductorcurrent iLc , and the secondary power source V2 are depicted inFig. 13(g); the driving signals Tdd and Tdu , and the inductorcurrent iLd are depicted in Fig. 13(h). The driving signals (Tcd

and Tcu ) or (Tdd and Tdu ) are complementary, and they havedead times to avoid the switches (Scd and Scu ) or (Sdd andSdu ) turning on simultaneously. The inductor Lc or Ld to be


Fig. 12. Experimental results at dual-input step-up state with V1 = 63 V, V2 = 48 V, VO = 200 V, and 5-kW output power.

Fig. 13. Experimental results at dual-output step-down state with V1 = 63 V, V2 = 48 V, VO = 200 V, and 5-kW output power.


Fig. 14. Experimental results at dual power source step-up state with V1 = 42 V, V2 = 48 V, and 2.5-kW output power.

operated in the SCM is obvious, and the terminal voltage at thesecondary power circuit is stably controlled to be V2 = 48V .Fig. 13(i) displays the driving signal Tcu , the inductor currentiLc , the switch current iScu , and the switch voltage vScu . Thedriving signal Tcd , the inductor current iLc , the switch currentiScd , and the switch voltage vScd are depicted in Fig. 13(j)and (k) illustrates the driving signal Tdu , the inductor currentiLd , the switch current iSdu , and the switch voltage vSdu . Thedriving signal Tdd , the inductor current iLd , the switch currentiSdd , and the switch voltage vSdd are depicted in Fig. 13(l).The switches (Scu , Scd , Sdu and Sdd) are turned on with ZVSsince the switch currents (iScu , iScd , iSdu and iSdd) are negativebefore the switches are turned on.

D. Dual Power Source Step-Up/Step-Down State

Fig. 14 shows the experimental results at the dual powersource step-up state with V1 = 42V, V2 = 48V, and an outputpower of 2.5 kW. Fig. 14(a) presents the driving signals Tad andTau , the inductor current iLa , and the primary input voltage V1 .The driving signals Tbd and Tbu , and the inductor current iLb

are depicted in Fig. 14(b). The driving signals (Tad and Tau )or (Tbd and Tbu ) are complementary, and they have dead timesto avoid the switches (Sad and Sau ) or (Sbd and Sbu ) turningON simultaneously. The inductor La or Lb to be operated inthe SCM is obvious. Fig. 14(c) displays the driving signal Tad ,the inductor current iLa , the switch current iSad , and the switchvoltage vSad . The driving signal Tau , the inductor current iLa ,the switch current iSau , and the switch voltage vSau are de-

picted in Fig. 14(d). and (e) performs the driving signal Tbd ,the inductor current iLb , the switch current iSbd and the switchvoltage vSbd . The driving signal Tbu , the inductor current iLb ,the switch current iSbu , and the switch voltage vSbu are depictedin Fig. 14(f). By observing the switch voltages and currents asshown in Fig. 14(c)–(f), the characteristic of turning ON withZVS is obvious due to the switch currents (iSad , iSau , iSbd andiSbu ) are negative before the switches (Sad, Sau , Sbd and Sbu )are turned ON. Fig. 14(g) illustrates the driving signals Tcd andTcu , the inductor current iLc , and the secondary power sourceV2 . The driving signals Tdd and Tdu , and the inductor currentiLd are depicted in Fig. 14(h). The driving signals (Tcd and Tcu )or (Tdd and Tdu ) are complementary, and they have dead timesto avoid the switches (Scd and Scu ) or (Sdd and Sdu ) turningON simultaneously. The inductor Lc or Ld to be operated inthe SCM is obvious, and the terminal voltage at the secondarypower circuit is stably controlled to be V2 = 48V . The drivingsignal Tcu , the inductor current iLc , the switch current iScu , andthe switch voltage vScu are depicted in Fig. 14(i). and (j) illus-trates the driving signal Tcd , the inductor current iLc , the switchcurrent iScd , and the switch voltage vScd . The driving signalTdu , the inductor current iLd , the switch current iSdu , and theswitch voltage vSdu are depicted in Fig. 14(k). and (l) shows thedriving signal Tdd , the inductor current iLd , the switch currentiSdd , and the switch voltage vSdd . The switches (Scu , Scd , Sdu

and Sdd) are turned ON with ZVS since the switch currents(iScu , iScd , iSdu and iSdd) are negative before the switches areturned ON.


Fig. 15. Power conversion efficiency of high-efficiency dual-input interleaveddc–dc converter under different powers. (a) curve: single-input step-up state,(b) curve: dual-input step-up state, (c) curve: dual-output step-down state, and(d) curve dual power source step-up state.

E. Conversion Efficiency

The power conversion efficiency of the proposed dual-inputinterleaved dc–dc converter at four operational states under dif-ferent powers is depicted in Fig. 15, where (a) curve is theconversion efficiency at the single-input step-up state, (b) curveis the one at the dual-input step-up state, (c) curve is the one atthe dual-output step-down state, and (d) curve is the one at thedual power source step-up state. When the proposed converteris operated at the single-input step-up state with V1 = 48 VandVo = 200 V as shown in the curve (a), the maximum efficiencyis measured to be about 95.8% due to the ZVS property of allswitches. When the proposed converter is operated at the dual-input step-up state with V1 = 63 V, V2 = 48V, and Vo = 200 Vas shown in the curve (b), the maximum efficiency is measuredto be about 95.1%. The curve (c) shows the conversion efficiencyat the dual-output step-down state with Vo = 200 V, V1 = 63 Vand V2 = 48 V, and the maximum efficiency is measured tobe about 95.3%. The curve (d) performs the conversion effi-ciency at the dual power source step-up state with V1 = 42Vand V2 = 48 V, and the maximum efficiency is measured to beabout 91%. According to the experimental records, the goal ofhigh-efficiency power conversion can be achieved by the pro-posed dual-input interleaved dc–dc converter.

The performance comparisons of the proposed dual-input in-terleaved converter with similar studies in the announced worksare summarized in Table I. Although the maximum conversionefficiency of the previous dual-input interleaved dc–dc converterin [22] is the same as the proposed converter, there is no bidi-rectional power flow function in [22]. Even for the convertersin [12] and [23] with the function of bidirectional power flow,the corresponding maximum conversion efficiency is obviouslylower than the proposed converter in this study. Thus, the pro-posed dual-input interleaved dc–dc converter indeed performs

TABLE IPERFORMANCE COMPARISONS OF DUAL-INPUT INTERLEAVED CONVERTER

WITH OTHER ANNOUNCED WORKS

high conversion efficiency under a 5 kW-level output power thanother announced works [12], [14], [22]–[24].

V. CONCLUSION

This study has successfully developed a high-efficiency dual-input interleaved dc-dc converter for two reversible powersources, and the effectiveness of this converter is verified by ex-perimental results of a 5 kW converter prototype. According tothe experimental results, all the inductors can be operated in theSCM, and all the switches are turned ON with ZVS. Moreover,the maximum conversion efficiency is over 95%, except for thedual power source step-up state. This new converter topologyprovides designers with an alternative choice to simultaneouslyconvert hybrid reversible power sources. In addition, the pro-posed high-efficiency dual-input interleaved dc–dc converteralso can work well in high-power level applications because theswitching loss, which is proportional to the square of the switchvoltage, can be greatly reduced due to the ZVS property.

ACKNOWLEDGMENT

The authors would like to thank the Referees and theAssociate Editor for their valuable comments and helpfulsuggestions.

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Rong-Jong Wai (M’99–SM’05) was born in Tainan,Taiwan, in 1974. He received the B.S. degree in elec-trical engineering and the Ph.D. degree in electronicengineering from Chung Yuan Christian University,Chung Li, Taiwan, in 1996 and 1999, respectively.

Since 1999, he has been with Yuan Ze University,Chung Li, Taiwan, where he is currently a Yuan-ZeChair Professor with the Department of Electrical En-gineering, the Dean of the Office of General Affairs,and the Director of the Electric Control and SystemEngineering Laboratory. He is a chapter-author of

Intelligent Adaptive Control: Industrial Applications in the Applied Computa-tional Intelligence Set (Boca Raton, FL: CRC Press, 1998) and the co-author ofDrive and Intelligent Control of Ultrasonic Motor (Tai-chung, Taiwan: Tsang-Hai, 1999), Electric Control (Tai-chung, Taiwan: Tsang-Hai, 2002) and FuelCell: New Generation Energy (Tai-chung, Taiwan: Tsang-Hai, 2004). He hasauthored nearly 140 conference papers, more than 150 international journalpapers, and 38 inventive patents. His biography was listed in Who’s Who inScience and Engineering (Marquis Who’s Who) in 2004–2012, Who’s Who(Marquis Who’s Who) in 2004–2012, and Leading Scientists of the World (In-ternational Biographical Centre) in 2005, Who’s Who in Asia (Marquis Who’sWho), Who’s Who of Emerging Leaders (Marquis Who’s Who) in 2006–2012,and Asia/Pacific Who’s Who (Rifacimento International) in Vols. VII–XII. Hisresearch interests include power electronics, motor servo drives, mechatronics,energy technology, and control theory applications. The outstanding achieve-ment of his research is for contributions to real-time intelligent control in practi-cal applications and high-efficiency power converters in energy technology. Heis a fellow of the Institution of Engineering and Technology (U.K.) and a seniormember of the Institute of Electrical and Electronics Engineers (U.S.A.).

Dr. Wai received the Excellent Research Award in 2000, and the Wu Ta-YouMedal and Young Researcher Award in 2003 from the National Science Council,Taiwan. In addition, he received the Outstanding Research Award in 2003 and2007 from the Yuan Ze University; the Excellent Young Electrical EngineeringAward and the Outstanding Electrical Engineering Professor Award in 2004and 2010 from the Chinese Electrical Engineering Society; the OutstandingProfessor Award in 2004 and 2008 from the Far Eastern Y. Z. Hsu−Scienceand Technology Memorial Foundation,Taiwan; the International Professionalof the Year Award in 2005 from the International Biographical Centre, U.K.; theYoung Automatic Control Engineering Award in 2005 from the Chinese Au-tomatic Control Society, Taiwan; the Yuan-Ze Chair Professor Award in 2007,2010, and 2013 from the Far Eastern Y. Z. Hsu−Science and Technology Memo-rial Foundation, Taiwan; the Electric Category-Invent Silver Medal Award in2007, the Electronic Category-Invent Gold and Silver Medal Awards in 2008,the Environmental Protection Category-Invent Gold Medal Award in 2008, theMost Environmental Friendly Award in 2008, and the Power Category-InventBronze Medal Award in 2012 from the International Invention Show and Tech-nomart, Taipei, Taiwan; the University Industrial Economic Contribution Awardin 2010 from the Ministry of Economic Affairs, Taiwan; the Ten OutstandingYoung Award in 2012 from the Ten Outstanding Young Person’s Foundation,Taiwan; the Taiwan Top 100 MVP Managers Award in 2012 from MANAGERtoday magazine, Taiwan, and the Outstanding Engineering Professor Award in2013 from the Chinese Institute of Engineers, Taiwan.

Bo-Han Chen was born in Nantou, Taiwan, in 1987.He received the B.S. degree in electrical engineer-ing from Chung Yuan Christian University, ChungLi, Taiwan, in 2009. Moreover, he received the M.S.degree in electrical engineering from Yuan Ze Uni-versity, Chung Li, Taiwan, in 2013.

His research interests include power electronicsand renewable energy.

high-efficiency dual-input interleaved dc–dc converter for reversible power sources

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