hanna and haskell(d2-4)

8/13/2019 Hanna and Haskell(D2-4)

1/12

Learning Digital Systems Design

in VHDL by Example in a Junior Course

Darrin M. Hanna and Richard E. Haskell

School of Engineering and Computer Science

Oakland [email protected] [email protected]

Abstract

Advancements in modern CAD tools enable students to design hardware, simulate their designs, synthesize them,

and study common low-level issues such as timing, glitches, power consumption, and space requirements. Rather

than emphasizing logic and gates to study issues in digital systems in a junior-level digital design course at OaklandUniversity, the course presents the behavior of classical digital components, independent of target technology.

Students learn VHDL and design tools by example through designing systems consisting of basic components,

gradually increasing in complexity to larger digital systems covering most of the VHDL language. Using XilinxISE and Aldec Active-HDL, students describe, study, implement, and test basic gates, multiplexers, encoders and

decoders, as well as more extensive designs including a VGA controller, memory-mapped video, a serial porttransmit and receive, and special-purpose processors. A book calledLearning By Example Using VHDL

Advanced Digital Designhas been written to cover this material. Instead of chapters this book contains over 40

worked examples from basic digital components to datapaths, control units, and a microcontroller. Useful tutorials

and theoretical topics are included in appendices. This approach combines traditional topics in designing hardwarewith modern CAD tools to produce a unique learning experience for junior engineering students. Examples of the

projects done in this course will be presented.

Introduction

At Oakland University a junior-level course,Digital Logic and Microprocessor Design, is taken

by all computer engineering and electrical engineering students and some computer sciencemajors. PowerPoint lectures and laboratory experiments including the latest in design and

simulation software are used to present and practice digital design by example. Xilinx ISE and

Aldec Active-HDL are used to design and test digital systems in VHDL including investigatingpower requirements using XPower, timing and glitches using pre- and post-implementation

simulations, implementation using Floor Planner, and critical path including space/speed

tradeoffs using synthesis information. Students also implement and test their designs on a Xilinx

Spartan 3 FPGA using a prototyping board made by Digilent, Inc, which includes switches,buttons, LEDs, seven-segment displays, a VGA port, an RS-232 port, and a PS/2 port.

During the course, students learn to use the software tools to design and test hardware byexample while designing components starting with basic gates, multiplexers, encoders, decoders,

to more extensive designs including a VGA controller, memory-mapped video, a serial port

transmit and receive, and special-purpose processors that implement algorithms such as integersquare root and Euclids GCD. Both fundamental topics and tool tutorials are presented by

example. After completing the 8 laboratory experiments, students work in groups of 3 or 4 to

complete a design project during the last month of the term. These projects involve sophisticatedspecial-purpose processors and components to produce impressive digital systems that use

peripherals such as A/D and D/A converters, a USB port, sensors, and motors.


2/12

A book calledLearning By Example Using VHDL Advanced Digital Designis being written to

cover this material. Instead of chapters this book contains 49 worked examples ranging frombasic digital components to datapaths, control units, and a microcontroller. Useful tutorials and

theoretical topics are included in appendices. This approach combines traditional topics in

designing hardware with modern CAD tools to produce a novel learning experience for junior

engineering students. Section 1 describes the textbookLearning By Example Using VHDL.Section 2 describes the course materials and tools. Section 3 presents some examples of student

projects. A conclusion is given in Section 4.

1. Learning By Example (LBE) Using VHDL

Many digital design textbooks emphasize digital logic and logic reduction for implementing andstudying digital systems using basic logic gates. Some include examples of implementing select

digital components using a hardware description language such as VHDL or Verilog added to a

later edition. On the other hand, there are textbooks for learning the VHDL language. Theseoften take an approach traditional to learning a programming language emphasizing general

syntax with some specific examples. The former typically do not include enough VHDL forstudents to effectively use the language and tools. The latter usually require significant

knowledge of hardware as a prerequisite to learning VHDL. Further, it is rare to find a text thatprovides step-by-step directions for how to use a specific CAD tool for design entry, simulation,

synthesis, implementation, power analysis, timing analyses, and other functions. This leaves

much information for the instructor to coordinate and assemble for the students which can takeconsiderable time and effort.

We have begun publishing a series of books to address this need. The format of these

books is different from that of standard texts. Instead of chapters these books contain a largenumber of worked examples with tutorials and theory topics relegated to appendices. The table

of contents of the bookLearning By Example Using VHDL Advanced Digital Design1is shown

in Table 1

Table 1 Table of Contents of Learning By Example Using VHDL Advanced Digital Design

Introduction Digital Logic and VHDL

Example 1 2-Input Gates: Logic EquationsExample 2 Multiple-Input Gates

Example 3 4-Input Gates:forLoop

Example 4 2-to-1 Multiplexer: ifStatement

Example 5 4-to-1 Multiplexer: Module Instantiation

Example 6 4-to-1 Multiplexer: caseStatementExample 7 Quad 2-to-1 Multiplexer

Example 8 Generic Multiplexer: Parameters

Example 9 Multiplexer as a Universal Element

Example 10 GlitchesExample 11 7-Segment Decoder: caseStatement

Example 12 Top-level VHDL Designs

Example 13 7-Segment Display: Spartan-3 BoardExample 14 4-Bit Binary-to-BCD Converter: caseStatement

Example 15 Bit Binary-to-BCD Converter:forLoops

Example 16 Gray Code Converters

Example 17 Adder

Example 18 ShiftersExample 19 Multiplier


3/12

Table 1 (contd) Table of Contents of Learning By Example Using VHDL Advanced Digital Design

Example 20 Divider

Example 21 Arithmetic Logic Unit (ALU): caseStatement

Example 22 Comparators

Example 23 EncodersExample 24 Priority Encoders

Example 25 3-to-8 DecoderExample 26 Edge-Triggered D Flip-FlopsExample 27 D Flip-Flops in VHDL

Example 28 Divide-by-2 Counter

Example 29 JK and T Flip-Flops

Example 30 RegistersExample 31 Shift Registers

Example 32 Ring Counter

Example 33 Counters

Example 34 Arbitrary WaveformExample 35 Pulse-Width Modulation (PWM)

Example 36 Finite State Machines

Example 37 DatapathsExample 38 Control Units

Example 39 VGA Controller

Example 40 Memory: ROM

Example 41 Memory: On-chip RAM, Distributed and Block Memory

Example 42 Memory: External RAMExample 43 Asynchronous Serial Communications: Transmit

Example 44 Asynchronous Serial Communications: Receive

Example 45 PS/2 Controller Keyboard

Example 46 PS/2 Controller MouseExample 47 Test Benches using a Liquid Crystal Display Controller

Example 48 Power Consumption

Example 49 Combinational and Sequential Multiplication: Speed/Space Tradeoff

Appendix A Aldec Active-HDL Tutorial Part 1

Appendix B Aldec Active-HDL Tutorial Part 2Appendix C Number SystemsAppendix D Basic Logic Gates and De Morgans Theorem

Appendix E Implementing Digital Circuits

Appendix F Basic Digital Design

Appendix G Boolean AlgebraAppendix H Karnaugh Maps

Appendix I Adders

Appendix J Latches and Flip-FlopsAppendix K State Machines

Appendix L VHDL Quick Reference Guide

The text begins with an extremely basic example of implementing basic gates. For students whowish to learn or review digital logic basics and prerequisites, Appendix C through K contain

tutorials for various topics. Appendix A contains a step-by-step tutorial for completing the first

example using Aldec Active-HDL with Xilinx Web Pack installed for synthesis andimplementation. This tutorial illustrates completing the exercise using explicit screen shots for

each step, easy for anyone to follow to learn how to use the tools for design entry, functionalsimulation, synthesis, implementation, and downloading the design to the FPGA. Appendix L

contains a VHDL quick reference guide.


4/12

The examples become more complex as the student completes earlier examples. It is not

necessary to complete all of the examples; examples do not require skills from all previousexamples. In some cases, a single hardware component is used in multiple examples to illustrate

different ways to do things in VHDL. For example, examples 4 through 9 all use a multiplexer

to illustrate different VHDL constructs and digital topics. Example 4 uses an if-statement,

Example 5 teaches instantiating modules, Example 6 uses a casestatement, Example 7demonstrates a quad 2-to-1 multiplexer as opposed to the 4-to-1 multiplexers used in the other

examples, Example 8 introduces a generic multiplexer using parameters, and finally Example 9

presents the multiplexer as a universal element.

Later examples emphasize more sophisticated digital designs including special-purposeprocessors, serial communication, a VGA controller, a memory controller, and more. In addition

to more sophisticated designs are the more advanced digital issues including measuring power

consumption and battery life, post-implementation timing and critical paths, and creating and

using test benches. This mixture of digital logic, digital design, and VHDL is valuable for bothadvancing knowledge in digital logic and design as well as providing practice in using modern

design tools that are used in industry for designing chips.

This book contains teachers resources including solutions to the examples and PowerPoint

slides for lectures. OtherLearning By Examplebooks include one for learning basic digital

design using Verilog2and one for learning to program microcontrollers using C

3,4.

2. Course Materials and Tools

A 4-credit junior-level course in digital design is offered at Oakland University using thistextbook. Students have taken, as a prerequisite, an introductory course in electrical and

computer engineering where approximately five weeks are devoted to numbers systems and

digital logic. In the junior-level digital design course students attend two lectures each week plus

a 3-hour laboratory session where a lab instructor is available to help students and check theirassignments. PowerPoint slides from the LBE book are used in the lectures. Each assigned lab

is comprised of one or more examples. Typically, there are eight labs. Aldecs Active-HDL is

used for simulation and the design flow. Xilinx ISE is installed for synthesis andimplementation, accessed from the main design flow menu in Active-HDL. Each student is

required to purchase a development board so that they can explore the tools and digital design on

their own. Xilinx Web Pack is offered free for students to download. Using a virtual privateconnection, students can connect to the Schools license server to obtain full access to Active-

HDL. This makes it convenient for students to setup the digital design environment at home or

on a laptop, often increasing the time that they spend with the tools and labs as opposed to onlyoffering a laboratory environment on campus.

At Oakland, we have used Digilents FPGA development boards for this course. In particular weare currently using Digilents Spartan 3 Development Board ranging from a Spartan 3 200 to

1000 (approximately 200,000 to 1,000,000 equivalent gate capacity, respectively). This

development board is JTAG programmable and contains: 8 slide switches, 4 pushbuttons, 8LEDs, and 4-digit seven-segment display, 1MByte fast asynchronous RAM on board, Serial port,

VGA port, and PS/2 mouse/keyboard port, and three 40-pin expansion connectors and three

high-current voltage regulators (3.3V, 2.5V, and 1.2V).


5/12

After completing the eight labs listed in Table 2, the remaining three to four weeks are spent on ateam design project. For the design project, students are put into groups of three or four based on

a list of preferred group members. Each group decides what their project will do and after

receiving instructor approval and discussion, development commences. To implement their

design, students can use a combination of digital components that they have developedthroughout the course from the LBE examples and a state machine and datapath specific to their

project. Each group gives a fifteen minute presentation and submits a written report and project

poster as their final deliverables for the course. They are also required to include a group picturein the presentation, poster, and report, and a video of their working demonstration in their

presentation. This makes it easy to identify students who have completed projects years later and

show their demonstrations without actually setting them up and downloading them. Studentsreceive individual grades based on mandatory peer evaluations.

Table 2 Eight lab assignments leading to the project

1. Multiplexers -- Simulation and Synthesis Using Aldec Active-HDL 7.1

2. Priority Encoders and Seven-Segment Decoder3. Comparators and Using the FPGA Editor

4. Binary to BCD Converter and the Seven-Segment Displays

5. Datapaths and Controllers: Integer Square Root

6. VGA Controller

7. UART and RAM

8. Combinational and Sequential Multiplication Space vs. Speed Trade-off

3. Examples of Student Projects

We have found that most student projects resulting from this course are of impressive quality and

complexity. Table 3 shows a list of selected student projects.

Table 3 Some examples of student projects

A. Interactive Sudoku gameB. Wheel of FortuneC. BlackjackD. Digital clock using a touch screen monitorE. MastermindF. MemoryG. Pong

H. A typing tutorI. FPGA MarioJ. Catch em

Sudoku, also known as Number Place, is a logic-based placement puzzle. The objective is to fill

the grid so that every column, every row and every 33 box contains the digits 1 to 9. The puzzle

setter provides a partially completed grid so that there is only one solution. This wasimplemented on an FPGA. The game board is displayed on a VGA monitor. Using the VGA


6/12

controller developed in Example 39, assigned as one of their lab assignments, some students

developed their own font. The cursor is moved using the arrow keys. The player presses anumber key when the cursor is located over the desired cell. When the last cell is full, if all the

answers are correct, the numbers the user input turn green and the clock stops. The object is to

beat the clock, or have the best time. Figure 1 shows screenshots of this Sudoku implementation.

(Player loses) (Player wins)Figure 1: Interactive Sudoku on an FPGA

Using the keyboard,

players enter the phrase

and set the wheelspinning on Wheel of

Fortune. The wheel spins

on the VGA screen andstop at a random dollar

amount. Using the

keyboard again, players

select a letter and the

game reveals where thatletter appears in the

phrase and awards pointsaccordingly or reports

that the letter does notappear in the phrase.

Figure 2 shows a block

diagram of the data path for

Wheelclock

Fnt_data

Num2asc

Wheelposition

ScoreCtrl

Scoreboard

keyboard

store and

guess

turncontrol

row gendata

phrasedata

vgasel

poscnt

255

spin wheelclk

turn

keyflg

Vga_adrwinner

intro

nxtpos

keydata

VGA_adr

gameover

Figure 2: A block diagram of the components in Wheel of Fortune


7/12

the Wheel of Fortune component. This component is integrated with a VGA controller and

control unit designed by the group as shown in Figure 3.

Figure 3: Wheel of fortune integrated with keyboard input, a VGA controller, and a control unit

A shortened version of Blackjack was implemented using the basic rule that the hand that is

highest, but less than or equal to 21 wins. This version of blackjack includes 2 players and a

computer player. This consists of a graphics engine, card randomizer, and fonts for the suits and

numbers/letters on the cards. Players select whether to stand or hit using buttons on thedevelopment board.

Extreme Memory supports custom card faces and patterns for card backs using serialcommunication to transmit these items to the game. Using the keyboard arrow keys, players can

move a selection box from frame to frame and select a card. The next step is to remember where

the match is and select that card next in this classic game of memory. Figure 4 shows

screenshots of extreme memory. Figures 5 and 6 show a block diagram of the data path and astate diagram of the high-level state machine.

Splash Screen Ready to Play Winning Marquee

Figure 4: Screenshots of Extreme Memory

gendata

phasedata

wheelclk

aturn

vga_adr

plno

row_out

pos_cnt

vgaselkeydata

keyflag

nextpos

gover

next_

turn

spin

gendata

phasedata

wheelclk

aturn

vga_adr

plno

row_out

pos_cnt

vgasel

keydata

keyflg

nextpos

gover

next_

turn

spin

gover

screen

screen

clk clr

clk

clr

clk clr

kc

kd

hs

vs

red

green

blue

Custom card faces and backs


8/12

Figure 5: Block diagram of the data path for Extreme Memory

Figure 6: State diagram for the high-level state machine controlling Extreme Memory

display

randomset

key CheckS

setupGo

start

unflip

check

f lip

keyC heckF

mov eDown

moveUp

moveLef t

mov eRight

keyC heckD

win

key Out=X"0D"

key Out=X"00"

setdn='0'

setdn='1'

key Out=X"19"

key Out=X"1A"

key Out=X"17"

key Out=X"18"

key Out=X"00"

key Out=X"00"

key Out=X"00"

key Out=X"00"

mcount = "1000"

key Out=X"00""not a match"

"match found"

Any time the escape key is pressed,

all states return to start-state and clear.


9/12

The FPGA Mario game consists of three levels of graphics: the background, the player, and the

good/bad object to catch/avoid. Using a standard NES controller made by NintendoEntertainment Systems, players can move the Mario player from left to right to catch or avoid

the falling object. As the game progresses, the objects fall more quickly. Points are awarded for

catching good objects and deducted for catching bad objects. Figure 7 shows a screenshot of the

FPGA Mario Game, the NES controller, and the images.

The FPGA Mario group also created a software FPGA Image Utility using Microsoft Visual

Basic .NET to open an image and generate a COE file containing data encoding the image for anIP core memory. This utility is shown in Figure 9.

Figure 8 shows a screenshot of the Ping Pong game using a potentiometer and A-to-D converterfor playing against the computer. The computer anticipates ball movement and the ball speeds

up as the game progresses. Figure 8 also shows the ball/angle scheme where students mapped

the number of units to the right/left/up/down the ball should move to achieve a particular angle.

Figure 7: The FPGA Mario Game

Mario Sprites (16 x 32) Good and Bad Sprites (16 x 16)

Background Tiles

Screenshot

NES Controller

Graphics Components


10/12

Figure 8: Ping Pong Game

Screenshot

Potentiometer Paddle

Ball Angle Scheme


11/12

Figure 9: The FPGA Image Utility created by the FPGA Mario team

The game of Catch em consisted of a football goal post displayed on a VGA monitor that moves

left and right using the arrow keys on a PS/2 keyboard. The object of the game is to move thegoal post to catch the football that falls from the top of the screen. The football falls faster as the

game progresses and points are awarded for catching the football. Figure 10 shows this game.

Figure 10: Catch em Screenshot


12/12

4. Conclusions

Using the LBE approach, students can refer to appendices for basic digital logic material in a

junior-level course of digital design. Students each purchase a development board and setup the

design tools at home or on their laptop. Lectures teach topics in digital logic, digital design, and

VHDL according to examples selected by the instructor. The students are assigned eight labs tocomplete which are comprised of one or more examples. After completing these labs, a group of

students completes a design project. We have found that students are well-prepared for

designing digital systems having designed and implemented a sophisticated project of their ownin only three weeks. This approach has produced better, more sophisticated projects than other,

more traditional approaches to teaching digital logic with VHDL.

5. References

1. Richard E. Haskell and Darrin M. Hanna,Learning By Example Using VHDL Advanced Digital Design, LBEBooks, Rochester, MI, 2007.

2. Richard E. Haskell,Learning By Example Using Verilog Basic Digital Design, LBE Books, Rochester, MI,2007.

3. Richard E. Haskell, Learning By Example Using C Programming the HCS12 Microcontroller UsingCodeWarrior, LBE Books, Rochester, MI, 2007.

4. Richard E. Haskell, Darrin M. Hanna, and Michael Latcha, Learning Microcontroller Programming in C by

Example in a Sophomore Core Course, ASEE North Central Section Conference, Mar. 30-31, 2007,

Charleston, WV.

hanna and haskell(d2-4)

Documents