h. huang transparency no.1-1 the 68hc11 microcontroller chapter 1: introduction to 68hc11 the 68hc11...
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H. Huang Transparency No.1-1
The 68HC11 Microcontroller
Chapter 1: Introduction to 68HC11
The 68HC11 Microcontroller
Han-Way Huang
Minnesota State University, Mankato
H. Huang Transparency No.1-2
The 68HC11 Microcontroller
What is a computer?
Software
Hardware
Computer Hardware Organization
Control unit
Arithmetic logic unit
Registers
common bus
memory
program
storage
data
storage
output
unit
input
unit
Figure 1.1 Computer hardware organization
H. Huang Transparency No.1-3
The 68HC11 Microcontroller
The processor
Registers -- storage locations in the processor
Arithmetic logic unit
Control unit
program counter keeps track of the address of the next instruction to be executed
status register flags the instruction execution result
The microprocessor
A processor implemented on a very large scale integration (VLSI) chip
Peripheral chips are needed to construct a product
The MicrocontrollerThe processor and peripheral functions implemented on one VLSI chip
H. Huang Transparency No.1-4
The 68HC11 Microcontroller
Features of the 68HC11A8 microcontroller
- 8-bit CPU
- 256 bytes SRAM
- 512 bytes EEPROM
- 8 KB ROM
- 3 input capture channels
- 5 output compare functions
- one 8-bit pulse accumulator
- one serial communication interface (SCI)
- one serial peripheral interface (SPI)
- real-time interrupt (RTI) circuit
- 8-channel 8-bit A/D converter
- computer operate properly (COP) watchdog system
H. Huang Transparency No.1-5
The 68HC11 Microcontroller
ROM-8KB
RAM-256 bytes
EEPROM-512 bytes
PORTA
PULSE ACCUMULATOR
PERIODIC INTERRUPT
COP WATCHDOG
PAIOC2
OC3OC4OC5
OC1
IC1
IC2IC3
PA7
PA6PA5PA4PA3PA2PA1
PA0
PE7
PE6PE5PE4
PE3
PE2
PE1PE0
PORTE
V REFH
V REFL
A/DCONVERTER
DA
TA
DIR
EC
TIO
N
PORTD
SSSCK
MOSI
MISO
SPI
TxD
RxDSCI
PD5
PD4
PD3
PD2
PD1
PD0
M68HC11 CPU
ADDRESS DATA BUS
INTERRUPTS
RESET
XIRQ
IRQ(V PPBULK ) HANDSHAKE I/O
DATA DIRECTION C
PORT CPORT B
PARALLELI/O
SINGLECHIP
PB7
PB6
PB5
PB4
PB3
PB2
PB1
PB0
PC7
PC6
PC5
PC4
PC3
PC2
PC1
PC0
STRA
STRB
A15
A14
A13
A12
A11
A10
A9
A8
AD7
AD6
AD5
AD4
AD3
AD2
AD1
AD0
R/W ASEXPAND
OSCILLATOR
XTAL
EXTAL
E
MODALIR
MODB(V STBY )
V DD
V SS
MODESELECT
POWER
Figure 1.2 68HC11A8 block diagram (redrawn with permission of Motorola)
H. Huang Transparency No.1-6
The 68HC11 Microcontroller
Examples of microcontroller applications
- Displays
- Printers
- Keyboards
- Modems
- Charge card phones
- Refrigerators
- Washing machines
- Microwave ovens
- Automobile engine fuel injection
- Fax machines
- Motor speed control
- etc.
H. Huang Transparency No.1-7
The 68HC11 Microcontroller
Semiconductor memory
Random-access memory (RAM): same amount of timeis required to access any location on the same chip
Read-only memory (ROM): can only be read but notwritten by the processor
-
-
Random-access memory
- Dynamic random-access memory (DRAM): periodic refresh is required to maintain the contents of a DRAM chip
- Static random-access memory (SRAM): no periodic refresh is required
Read-only memory
- Mask-programmed read-only memory (MROM): programmed when being manufactured
- Programmable read-only memory (PROM): the memory chip can be programmed by the end user
H. Huang Transparency No.1-8
The 68HC11 Microcontroller
- Erasable programmable ROM (EPROM) 1. electrically programmable many times 2. erased by ultraviolet light (through a window) 3. erasable in bulk (whole chip in one erasure operation)
- Electrically erasable programmable ROM (EEPROM)
1. electrically programmable many times 2. electrically erasable many times 3. can be erased one location, one row, or whole chip in one operation
- Flash memory
1. electrically programmable many times 2. electrically erasable many times 3. can only be erased in bulk
H. Huang Transparency No.1-9
The 68HC11 Microcontroller
Computer software
- Computer programs are known as software- A program is a sequence of instructions
Machine instruction
- A sequence of binary digits which can be executed by the processor- Hard to understand for human being
Assembly language
- Defined by assembly instructions- An assembly instruction is a mnemonic representation of a machine
instruction- Assembly programs must be translated before it can be executed --
translated by an assembler
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The 68HC11 Microcontroller
High-level language
- Syntax of a high-level language is similar to English- A translator is required to translate the program written in a
high-level language -- done by a compiler
Source code
- A program written in assembly or high-level language
Object code
- The output of an assembler or compiler
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The 68HC11 Microcontroller
7 0Accumulator A 7 0Accumulator B
15 0Double Accumulator D
15 0Index Register IX
15 0Index Register IY
15 0Stack pointer
15 0Program Counter
A:B
D
IX
IY
PC
SP
S X H I N Z V C CCR
Carry
Overflow
Negative
Zero
I interrupt mask
Half-Carry (from bit 3)
X Interrupt Mask
Stop Disable
Figure 1.3 MC68HC11 Programmer's model
H. Huang Transparency No.1-12
The 68HC11 Microcontroller
Memory Addressing
Memory consists of addressable locationsA memory location has 2 components: address and contents
Data transfer between CPU and memory involves addressbus and data bus
CPU memory
address bus lines
data bus lines
Figure 1.5 Data transfer between CPU and memory
address contents
H. Huang Transparency No.1-13
The 68HC11 Microcontroller
68HC11 addressing modesTable 1.1 Prefix for number representation
Base Prefix
binaryoctal
decimalhexadecimal
%@
nothing*$
*Note: Some assemblers use &
Operands needed in an instruction are specified by one of the 6 addressing modes
Immediate mode
The actual operand is contained in the byte or bytes immediately following the instruction opcode
LDAA #22ADDA #@32LDD #1000
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The 68HC11 Microcontroller
Direct modeA one-byte value is used as the address of a memory operand (located in on-chip SRAM)
ADDA $10SUBA $20LDD $30
Extended modeA two-byte value is used as the address of a memory operand
LDAA $1000LDX $1000ADDD $1030
Indexed modeThe sum of one of the index registers and an 8-bit value is used as the address of a memory operand
ADDA 10,XLDAA 3,Y
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The 68HC11 Microcontroller
Inherent mode
- Operands are implied by the instruction- No address information is needed
ABAINCBINX
Relative mode
- Used in branch instructions to specify the branch target - Specified using either a 16-bit value or a label (preferred)
...BEQ thereADDA #10...
there DECB
H. Huang Transparency No.1-16
The 68HC11 Microcontroller
A Sample of 68HC11 Instructions
The LOAD instructions
A group of instructions that place a value or copy the contents of a memorylocation (or locations) into a register
LDAA <opr>LDAB <opr>LDD <opr>LDX <opr>LDY <opr>LDS <opr>
<opr> can be immediate, direct, extended, or index mode
Examples
LDAA $10LDX #$1000
H. Huang Transparency No.1-17
The 68HC11 Microcontroller
The ADD instruction
A group of instructions perform addition operation
ABAABXABYADDA <opr>ADDB <opr>ADDD <opr>ADCA <opr>ADCB <opr>
<opr> is specified using immediate, direct, extended, or index mode
Examples.
ADDA #10ADDA $20ADDD $30
H. Huang Transparency No.1-18
The 68HC11 Microcontroller
The SUB instruction
A group of instructions that perform the subtract operation
SBASUBA <opr>SUBB <opr>SUBD <opr>SBCA <opr> ; A [A] - <opr> - C flagSBCB <opr> ; A [B] - <opr> - C flag
<opr> can be immediate, direct, extended, or index mode
Examples
SUBA #10SUBA $10SUBA 0,XSUBD 10,X
H. Huang Transparency No.1-19
The 68HC11 Microcontroller
The STORE instructionA group of instructions that store the contents of a register into a memory location or memory locations
STAA <addr>STAB <addr>STD <addr>STX <addr>STY <addr>STS <addr>
<addr> can be direct, extended, or index mode
Examples:
STAA $20STAA 10,XSTD $10STD $1000STD 0,X
H. Huang Transparency No.1-20
The 68HC11 Microcontroller
The 68HC11 Machine Code
A 68HC11 instruction consists of 1 to 2 bytes of opcode and 0 to 3 bytes of operand information
ExamplesMachine instructions
Assembly instruction (in hex format)
LDAA #29 86 1DSTAA $00 97 00ADDA $02 9B 02STAA $01 97 01INY 18 08
H. Huang Transparency No.1-21
The 68HC11 Microcontroller
Decoding machine language instructionsProcedure
Step 1 Compare the first one or two bytes with the opcode table to identify the corresponding assembly mnemonic and format.Step 2 Identify the operand bytes after the opcode field.Step 3 Write down the corresponding assembly instruction.Step 4 Repeat step 1 to 3 until the machine code file is exhausted.
A sample of machine codes and assembly instruction format
machine code assembly instruction format
01 NOP 86 LDAA IMM 96 LDAA DIR C6 LDAB IMM D6 LDAB DIR CC LDD IMM DC LDD DIR 8B ADDA IMM 9B ADDA DIR CB ADDB IMM
H. Huang Transparency No.1-22
The 68HC11 Microcontroller
DB ADDB DIRC3 ADDD IMMD3 ADDD DIR97 STAA DIRD7 STAB DIRDD STD DIR
machine code assembly instruction format
Example. Disassemble the following machine code to its corresponding assemblyinstructions.
96 30 8B 07 97 30 96 31
Solution:
The disassembly process starts from the leftmost byte. We next look up the machine code table to see which instruction it corresponds to.
Instruction 1.Step 1. The first byte 96 corresponds to the instruction LDAA DIR.Step 2. The second byte, 30, is the direct address.Step 3. Therefore, the first instruction is LDAA $30.
H. Huang Transparency No.1-23
The 68HC11 Microcontroller
Instruction 2.Step 1. The third byte (8B) corresponds to the instruction ADDA IMM.Step 2. The immediate value is 07.Step 3. Therefore, the second instruction is ADDA $07.
Instruction 3. Step 1. The fifth byte (97) corresponds to the instruction STAA DIR.Step 2. The DIR address is the next byte 30.Step 3. Therefore, the third instruction is STAA $30.
Instruction 4.Step 1. The seventh byte (96) corresponds to the instruction LDAA DIR.Step 2. The DIR value is the next byte 31.Step 3. Therefore, the four instruction is LDAA $31.
H. Huang Transparency No.1-24
The 68HC11 Microcontroller
machine code assembly instruction format
01 NOP 86 LDAA IMM 96 LDAA DIR C6 LDAB IMM D6 LDAB DIR CC LDD IMM DC LDD DIR 8B ADDA IMM 9B ADDA DIR CB ADDB IMM
DB ADDB DIRC3 ADDD IMMD3 ADDD DIR97 STAA DIRD7 STAB DIRDD STD DIR
H. Huang Transparency No.1-25
The 68HC11 Microcontroller
The 68HC11 Instruction Execution Cycle
- Perform a sequence of read cycles to fetch instruction opcode byte and address information.- Optionally perform read cycle(s) required to fetch the memory operand.- Perform the operation specified by the opcode.- Optionally write back the result to a register or a memory location.
- Consider the following 3 instructions
Assembly instruction Memory location Opcode
LDAA $2000 $C000 B6 20 00ADAA $3000 $C003 BB 30 00STAA $2000 $C006 B7 20 00
H. Huang Transparency No.1-26
The 68HC11 Microcontroller
$B6
$20
$00
$BB
$30
$00
$B7
$20
$00
Figure 1.10 Instruction 1--Opcode read cycle
Before After
PC PC
$C000 $C001
Memory contents Address
$C000
$C001
$C002
$C003
$C004
$C005
$C006
$C007
$C008
CPU
$C000
$B6Data bus
Address bus
Instruction LDAA $2000
Step 1. Place the value in PC on the address bus with a request to read the contents of thatlocation.
Step 2. The opcode byte $B6 at $C000 is returned to the CPU and PC is incremented by 1.
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The 68HC11 Microcontroller
$B6
$20
$00
$BB
$30
$00
$B7
$20
$00
Figure 1.11 Instruction 1--address byte read cycles
Before After first read
PC PC
$C001 $C002
Memory contents Address
$C000
$C001
$C002
$C003
$C004
$C005
$C006
$C007
$C008
CPU
Data bus
Address bus
$C001
$20
$B6
$20
$00
$BB
$30
$00
$B7
$20
$00
Memory contents Address
$C000
$C001
$C002
$C003
$C004
$C005
$C006
$C007
$C008
CPU
Data bus
Address bus
$C002
$00
After second read
PC
$C003
Step 3. CPU performs two read cycles to obtain the extended address $2000 from locations$C001 and $C002. At the end the value of PC is incremented to $C003
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The 68HC11 Microcontroller
Memory contents
Figure 1.12 Instruction 1--execution read cycle
$19
$37
CPU ...
$2000
Address bus
Data bus
$19
$2000
Address
$3000
Step 4. The CPU performs another read to get the contents of the memory location at$2000, which is $19. The value $19 will be loaded into accumulator A.