global instruction selection -...
TRANSCRIPT
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Global Instruction Selection
Quentin Colombet Apple
A Proposal
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What Is Instruction Selection?
Translation from target independent intermediate representation (IR) to target specific IR.
LLVM IR -> MachineInstr
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SelectionDAG (SD) ISel
MachineInstr
LLVM IR
FastISelFail
FastPath
SDBuilder
DAGCombiner
Legalize*
DAGCombiner
Select
Schedule
GoodPath
TargetHooks
SDNode
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SelectionDAG (SD) ISel
LLVM IR (-> SDNode) -> MachineInstr
MachineInstr
LLVM IR
FastISelFail
FastPath
SDBuilder
DAGCombiner
Legalize*
DAGCombiner
Select
Schedule
GoodPath
TargetHooks
SDNode
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Problems with SDISel
• Basic block scope
• SDNode IR, specific to instruction selection
• Monolithic
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Goals
• Global • Fast • Shared code for fast and good paths • IR that represents ISA concepts better • More flexible pipeline • Easier to maintain/understand • Self contained representation • No change to LLVM IR
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Non-Goals for the Prototype
• Reuse of InstCombine
• Improve TableGen
• Support target specific features
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Why Not Fix SDISel?
• Hard limitations of the underlying representation
• Would introduce SDNode IR to optimizers
• SDNode IR can be avoided
• Inherent overhead
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Global ISel
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LLVM IR
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IRTranslatorLLVM IR
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IRTranslatordefine double @foo(double %val, double* %addr) { %intval = bitcast double %val to i64 %loaded = load double, double* %addr %mask = bitcast double %loaded to i64 %and = and i64 %intval, %mask %res = bitcast i64 %and to double ret double %res }
• LLVM IR to generic (G) MachineInstr
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IRTranslatordefine double @foo(double %val, double* %addr) { %intval = bitcast double %val to i64 %loaded = load double, double* %addr %mask = bitcast double %loaded to i64 %and = and i64 %intval, %mask %res = bitcast i64 %and to double ret double %res }
foo: val = VMOVDRR R0,R1 addr = COPY R2 loaded(64) = gLD (double) addr and(64) = gAND (i64) val, loaded R0,R1 = VMOVRRD and tBX_RET R0<imp-use>,R1<imp-use>
• LLVM IR to generic (G) MachineInstr • One IR instruction to 0..* (G) MachineInstr • Virtual registers have a size • ABI lowering
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IRTranslatordefine double @foo(double %val, double* %addr) { %intval = bitcast double %val to i64 %loaded = load double, double* %addr %mask = bitcast double %loaded to i64 %and = and i64 %intval, %mask %res = bitcast i64 %and to double ret double %res }
foo: val = … VMOVDRR R0,R1 addr = … COPY R2 loaded(64) = gLD (double) addr and(64) = gAND (i64) val, loaded R0,R1 = VMOVRRD and tBX_RET R0<imp-use>,R1<imp-use>
• LLVM IR to generic (G) MachineInstr • One IR instruction to 0..* (G) MachineInstr • Virtual registers have a size • ABI lowering
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IRTranslatordefine double @foo(double %val, double* %addr) { %intval = bitcast double %val to i64 %loaded = load double, double* %addr %mask = bitcast double %loaded to i64 %and = and i64 %intval, %mask %res = bitcast i64 %and to double ret double %res }
foo: val = … VMOVDRR R0,R1 addr = … COPY R2 loaded = gLD addr and(64) = gAND (i64) val, loaded R0,R1 = VMOVRRD and tBX_RET R0<imp-use>,R1<imp-use>
• LLVM IR to generic (G) MachineInstr • One IR instruction to 0..* (G) MachineInstr • Virtual registers have a size • ABI lowering
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IRTranslatordefine double @foo(double %val, double* %addr) { %intval = bitcast double %val to i64 %loaded = load double, double* %addr %mask = bitcast double %loaded to i64 %and = and i64 %intval, %mask %res = bitcast i64 %and to double ret double %res }q
foo: val = … VMOVDRR R0,R1 addr = … COPY R2 loaded = gLD addr and(64) = gAND (i64) val, loaded R0,R1 = VMOVRRD and tBX_RET R0<imp-use>,R1<imp-use>
• LLVM IR to generic (G) MachineInstr • One IR instruction to 0..* (G) MachineInstr • MachineInstrs get a type • Virtual registers get a size • ABI lowering
New
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IRTranslatordefine double @foo(double %val, double* %addr) { %intval = bitcast double %val to i64 %loaded = load double, double* %addr %mask = bitcast double %loaded to i64 %and = and i64 %intval, %mask %res = bitcast i64 %and to double ret double %res }q
foo: val = … VMOVDRR R0,R1 addr = … COPY R2 loaded = gLD (double) addr and(64) = gAND (i64) val, loaded R0,R1 = VMOVRRD and tBX_RET R0<imp-use>,R1<imp-use>
• LLVM IR to generic (G) MachineInstr • One IR instruction to 0..* (G) MachineInstr • MachineInstrs get a type • Virtual registers get a size • ABI lowering
NEW
New
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IRTranslatordefine double @foo(double %val, double* %addr) { %intval = bitcast double %val to i64 %loaded = load double, double* %addr %mask = bitcast double %loaded to i64 %and = and i64 %intval, %mask %res = bitcast i64 %and to double ret double %res }q
foo: val = … VMOVDRR R0,R1 addr = … COPY R2 loaded(64) = gLD (double) addr and(64) = gAND (i64) val, loaded R0,R1 = VMOVRRD and tBX_RET R0<imp-use>,R1<imp-use>
• LLVM IR to generic (G) MachineInstr • One IR instruction to 0..* (G) MachineInstr • MachineInstrs get a type • Virtual registers get a size • ABI lowering
NEW
NEW
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IRTranslatordefine double @foo(double %val, double* %addr) { %intval = bitcast double %val to i64 %loaded = load double, double* %addr %mask = bitcast double %loaded to i64 %and = and i64 %intval, %mask %res = bitcast i64 %and to double ret double %res }q
foo: val(64) = … VMOVDRR R0,R1 addr(32) = … COPY R2 loaded(64) = gLD (double) addr and(64) = gAND (i64) val, loaded R0,R1 = VMOVRRD and tBX_RET R0<imp-use>,R1<imp-use>
• LLVM IR to generic (G) MachineInstr • One IR instruction to 0..* (G) MachineInstr • MachineInstrs get a type • Virtual registers get a size • ABI lowering
NEW
NEW
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IRTranslatordefine double @foo(double %val, double* %addr) { %intval = bitcast double %val to i64 %loaded = load double, double* %addr %mask = bitcast double %loaded to i64 %and = and i64 %intval, %mask %res = bitcast i64 %and to double ret double %res }
foo: val(64) = … VMOVDRR R0,R1 addr(32) = … COPY R2 loaded(64) = gLD (double) addr and(64) = gAND (i64) val, loaded R0,R1 = VMOVRRD and tBX_RET R0<imp-use>,R1<imp-use>
• LLVM IR to generic (G) MachineInstr • One IR instruction to 0..* (G) MachineInstr • MachineInstrs get a type • Virtual registers get a size • ABI lowering
NEW
NEW
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IRTranslatordefine double @foo(double %val, double* %addr) { %intval = bitcast double %val to i64 %loaded = load double, double* %addr %mask = bitcast double %loaded to i64 %and = and i64 %intval, %mask %res = bitcast i64 %and to double ret double %res }
foo: val(64) = … VMOVDRR R0,R1 addr(32) = … COPY R2 loaded(64) = gLD (double) addr and(64) = gAND (i64) val, loaded R0,R1 = VMOVRRD and tBX_RET R0<imp-use>,R1<imp-use>
• LLVM IR to generic (G) MachineInstr • One IR instruction to 0..* (G) MachineInstr • MachineInstrs get a type • Virtual registers get a size • ABI lowering
NEW
NEW
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IRTranslatordefine double @foo(double %val, double* %addr) { %intval = bitcast double %val to i64 %loaded = load double, double* %addr %mask = bitcast double %loaded to i64 %and = and i64 %intval, %mask %res = bitcast i64 %and to double ret double %res }
foo: val(64) = … VMOVDRR R0,R1 addr(32) = … COPY R2 loaded(64) = gLD (double) addr and(64) = gAND (i64) val, loaded = and tBX_RET R0<imp-use>,R1<imp-use>
• LLVM IR to generic (G) MachineInstr • One IR instruction to 0..* (G) MachineInstr • MachineInstrs get a type • Virtual registers get a size • ABI lowering
NEW
NEW
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IRTranslatordefine double @foo(double %val, double* %addr) { %intval = bitcast double %val to i64 %loaded = load double, double* %addr %mask = bitcast double %loaded to i64 %and = and i64 %intval, %mask %res = bitcast i64 %and to double ret double %res }
foo: val(64) = … VMOVDRR R0,R1 addr(32) = … COPY R2 loaded(64) = gLD (double) addr and(64) = gAND (i64) val, loaded … = and tBX_RET R0<imp-use>,R1<imp-use>
• LLVM IR to generic (G) MachineInstr • One IR instruction to 0..* (G) MachineInstr • MachineInstrs get a type • Virtual registers get a size • ABI lowering
NEW
NEW
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IRTranslatordefine double @foo(double %val, double* %addr) { %intval = bitcast double %val to i64 %loaded = load double, double* %addr %mask = bitcast double %loaded to i64 %and = and i64 %intval, %mask %res = bitcast i64 %and to double ret double %res }q
foo: val(64) = … R0,R1 addr(32) = … COPY R2 loaded(64) = gLD (double) addr and(64) = gAND (i64) val, loaded … = and tBX_RET R0<imp-use>,R1<imp-use>
• LLVM IR to generic (G) MachineInstr • One IR instruction to 0..* (G) MachineInstr • MachineInstrs get a type • Virtual registers get a size • ABI lowering
NEW
NEW
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IRTranslatordefine double @foo(double %val, double* %addr) { %intval = bitcast double %val to i64 %loaded = load double, double* %addr %mask = bitcast double %loaded to i64 %and = and i64 %intval, %mask %res = bitcast i64 %and to double ret double %res }q
foo: val(64) = … R0,R1 addr(32) = … COPY R2 loaded(64) = gLD (double) addr and(64) = gAND (i64) val, loaded … = and tBX_RET R0<imp-use>,R1<imp-use>
• LLVM IR to generic (G) MachineInstr • One IR instruction to 0..* (G) MachineInstr • MachineInstrs get a type • Virtual registers get a size • ABI lowering
NEW
NEW
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IRTranslatordefine double @foo(double %val, double* %addr) { %intval = bitcast double %val to i64 %loaded = load double, double* %addr %mask = bitcast double %loaded to i64 %and = and i64 %intval, %mask %res = bitcast i64 %and to double ret double %res }q
foo: val(FPR,64) = VMOVDRR R0,R1 addr(32) = … R2 loaded(64) = gLD (double) addr and(64) = gAND (i64) val, loaded … = and tBX_RET R0<imp-use>,R1<imp-use>
• LLVM IR to generic (G) MachineInstr • One IR instruction to 0..* (G) MachineInstr • MachineInstrs get a type • Virtual registers get a size • ABI lowering
NEW
NEW
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IRTranslatordefine double @foo(double %val, double* %addr) { %intval = bitcast double %val to i64 %loaded = load double, double* %addr %mask = bitcast double %loaded to i64 %and = and i64 %intval, %mask %res = bitcast i64 %and to double ret double %res }q
foo: val(FPR,64) = VMOVDRR R0,R1 addr(32) = COPY R2 loaded(64) = gLD (double) addr and(64) = gAND (i64) val, loaded … = and tBX_RET R0<imp-use>,R1<imp-use>
• LLVM IR to generic (G) MachineInstr • One IR instruction to 0..* (G) MachineInstr • MachineInstrs get a type • Virtual registers get a size • ABI lowering
NEW
NEW
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IRTranslatordefine double @foo(double %val, double* %addr) { %intval = bitcast double %val to i64 %loaded = load double, double* %addr %mask = bitcast double %loaded to i64 %and = and i64 %intval, %mask %res = bitcast i64 %and to double ret double %res }q
foo: val(FPR,64) = VMOVDRR R0,R1 addr(32) = COPY R2 loaded(64) = gLD (double) addr and(64) = gAND (i64) val, loaded R0,R1 = VMOVRRD and tBX_RET R0<imp-use>,R1<imp-use>
• LLVM IR to generic (G) MachineInstr • One IR instruction to 0..* (G) MachineInstr • MachineInstrs get a type • Virtual registers get a size • ABI lowering
NEW
NEW
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• LLVM IR to generic (G) MachineInstr • One IR instruction to 0..* (G) MachineInstr • MachineInstrs get a type • Virtual registers get a size • ABI lowering
IRTranslatordefine double @foo(double %val, double* %addr) { %intval = bitcast double %val to i64 %loaded = load double, double* %addr %mask = bitcast double %loaded to i64 %and = and i64 %intval, %mask %res = bitcast i64 %and to double ret double %res }q
foo: val(FPR,64) = VMOVDRR R0,R1 addr(32) = COPY R2 loaded(64) = gLD (double) addr and(64) = gAND (i64) val, loaded R0,R1 = VMOVRRD and tBX_RET R0<imp-use>,R1<imp-use>
NEW
NEW
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IRTranslatorLLVM IR
foo: val(FPR,64) = VMOVDRR R0,R1 addr(32) = COPY R2 loaded(64) = gLD (double) addr and(64) = gAND (i64) val, loaded R0,R1 = VMOVRRD and tBX_RET R0<imp-use>,R1<imp-use> 11
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IRTranslator (G)MILLVM IR
foo: val(FPR,64) = VMOVDRR R0,R1 addr(32) = COPY R2 loaded(64) = gLD (double) addr and(64) = gAND (i64) val, loaded R0,R1 = VMOVRRD and tBX_RET R0<imp-use>,R1<imp-use> 11
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foo: val(FPR,64) = VMOVDRR R0,R1 addr(32) = COPY R2 loaded(64) = gLD (double) addr and(64) = gAND (i64) val, loaded R0,R1 = VMOVRRD and tBX_RET R0<imp-use>,R1<imp-use>
LegalizerIRTranslator (G)MILLVM IR
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Legalizer
• No illegal types, just illegal operations
• Illegal (G)MachineInstr to legal (G)MachineInstr • State expressed in the IR • Iterative process
• Set of transformations • Loop until no more changes
foo: val(FPR,64) = VMOVDRR R0,R1 addr(32) = COPY R2 loaded(64) = gLD (double) addr and(64) = gAND (i64) val, loaded R0,R1 = VMOVRRD and tBX_RET R0<imp-use>,R1<imp-use>
NEW
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Legalizer
• No illegal types, just illegal operations
• Illegal (G)MachineInstr to legal (G)MachineInstr • State expressed in the IR • Iterative process
• Set of transformations • Loop until no more changes
foo: val(FPR,64) = VMOVDRR R0,R1 addr(32) = COPY R2 loaded(64) = gLD (double) addr and(64) = gAND (i64) val, loaded R0,R1 = VMOVRRD and tBX_RET R0<imp-use>,R1<imp-use>
foo: val(FPR,64) = VMOVDRR R0,R1 addr(32) = COPY R2 loaded(64) = gLD (double) addr and(64) = gAND (i64) val, loaded R0,R1 = VMOVRRD and tBX_RET R0<imp-use>,R1<imp-use>
NEW
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![Page 35: Global Instruction Selection - LLVMllvm.org/devmtg/2015-10/slides/Colombet-GlobalInstructionSelection.pdf%res = bitcast i64 %and to double ret double %res }q foo: val = … VMOVDRR](https://reader034.vdocuments.site/reader034/viewer/2022042312/5eda1fbbb3745412b570cebd/html5/thumbnails/35.jpg)
Legalizer
• No illegal types, just illegal operations
• Illegal (G)MachineInstr to legal (G)MachineInstr • State expressed in the IR • Iterative process
• Set of transformations • Loop until no more changes
foo: val(FPR,64) = VMOVDRR R0,R1 addr(32) = COPY R2 loaded(64) = gLD (double) addr and(64) = gAND (i64) val, loaded R0,R1 = VMOVRRD and tBX_RET R0<imp-use>,R1<imp-use>
foo: val(FPR,64) = VMOVDRR R0,R1 addr(32) = COPY R2 loaded(64) = gLD (double) addr and(64) = gAND (i64) val, loaded R0,R1 = VMOVRRD and tBX_RET R0<imp-use>,R1<imp-use>
NEW
12
![Page 36: Global Instruction Selection - LLVMllvm.org/devmtg/2015-10/slides/Colombet-GlobalInstructionSelection.pdf%res = bitcast i64 %and to double ret double %res }q foo: val = … VMOVDRR](https://reader034.vdocuments.site/reader034/viewer/2022042312/5eda1fbbb3745412b570cebd/html5/thumbnails/36.jpg)
Legalizer
• No illegal types, just illegal operations
• Illegal (G)MachineInstr to legal (G)MachineInstr • State expressed in the IR (extract, build_sequence) • Iterative process
• Set of transformations • Loop until no more changes
foo: val(FPR,64) = VMOVDRR R0,R1 addr(32) = COPY R2 loaded(64) = gLD (double) addr and(64) = gAND (i64) val, loaded R0,R1 = VMOVRRD and tBX_RET R0<imp-use>,R1<imp-use>
foo: val(FPR,64) = VMOVDRR R0,R1 addr(32) = COPY R2 loaded(64) = gLD (double) addr lval(32),hval(32) = extract val low(32),high(32) = extract loaded land(32) = gAND (i32) lval, low hand(32) = gAND (i32) hval, high and(64) = build_sequence land, hand R0,R1 = VMOVRRD and tBX_RET R0<imp-use>,R1<imp-use>
NEW
12
![Page 37: Global Instruction Selection - LLVMllvm.org/devmtg/2015-10/slides/Colombet-GlobalInstructionSelection.pdf%res = bitcast i64 %and to double ret double %res }q foo: val = … VMOVDRR](https://reader034.vdocuments.site/reader034/viewer/2022042312/5eda1fbbb3745412b570cebd/html5/thumbnails/37.jpg)
Legalizer
• No illegal types, just illegal operations
• Illegal (G)MachineInstr to legal (G)MachineInstr • State expressed in the IR (extract, build_sequence) • Iterative process • Set of transformations • Iterate until no more changes
foo: val(FPR,64) = VMOVDRR R0,R1 addr(32) = COPY R2 loaded(64) = gLD (double) addr and(64) = gAND (i64) val, loaded R0,R1 = VMOVRRD and tBX_RET R0<imp-use>,R1<imp-use>
foo: val(FPR,64) = VMOVDRR R0,R1 addr(32) = COPY R2 loaded(64) = gLD (double) addr lval(32),hval(32) = extract val low(32),high(32) = extract loaded land(32) = gAND (i32) lval, low hand(32) = gAND (i32) hval, high and(64) = build_sequence land, hand R0,R1 = VMOVRRD and tBX_RET R0<imp-use>,R1<imp-use>
foo: val(FPR,64) = VMOVDRR R0,R1 addr(32) = COPY R2 loaded(64) = gLD (double) addr lval(32),hval(32) = extract val low(32),high(32) = extract loaded land(32) = gAND (i32) lval, low hand(32) = gAND (i32) hval, high and(64) = build_sequence land, hand R0,R1 = VMOVRRD and tBX_RET R0<imp-use>,R1<imp-use>
NEW
NEW
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![Page 38: Global Instruction Selection - LLVMllvm.org/devmtg/2015-10/slides/Colombet-GlobalInstructionSelection.pdf%res = bitcast i64 %and to double ret double %res }q foo: val = … VMOVDRR](https://reader034.vdocuments.site/reader034/viewer/2022042312/5eda1fbbb3745412b570cebd/html5/thumbnails/38.jpg)
Legalizer
• No illegal types, just illegal operations
• Illegal (G)MachineInstr to legal (G)MachineInstr • State expressed in the IR (extract, build_sequence) • Iterative process • Set of transformations • Iterate until no more changes
foo: val(FPR,64) = VMOVDRR R0,R1 addr(32) = COPY R2 loaded(64) = gLD (double) addr and(64) = gAND (i64) val, loaded R0,R1 = VMOVRRD and tBX_RET R0<imp-use>,R1<imp-use>
foo: val(FPR,64) = VMOVDRR R0,R1 addr(32) = COPY R2 loaded(64) = gLD (double) addr lval(32),hval(32) = extract val low(32),high(32) = extract loaded land(32) = gAND (i32) lval, low hand(32) = gAND (i32) hval, high and(64) = build_sequence land, hand R0,R1 = VMOVRRD and tBX_RET R0<imp-use>,R1<imp-use>
NEW
NEW
12
![Page 39: Global Instruction Selection - LLVMllvm.org/devmtg/2015-10/slides/Colombet-GlobalInstructionSelection.pdf%res = bitcast i64 %and to double ret double %res }q foo: val = … VMOVDRR](https://reader034.vdocuments.site/reader034/viewer/2022042312/5eda1fbbb3745412b570cebd/html5/thumbnails/39.jpg)
Legalizerfoo: val(FPR,64) = VMOVDRR R0,R1 addr(32) = COPY R2 loaded(64) = gLD (double) addr lval(32),hval(32) = extract val low(32),high(32) = extract loaded land(32) = gAND (i32) lval, low hand(32) = gAND (i32) hval, high and(64) = build_sequence land, hand R0,R1 = VMOVRRD and tBX_RET R0<imp-use>,R1<imp-use>
foo: val(FPR,64) = VMOVDRR R0,R1 addr(32) = COPY R2 loaded(64) = gLD (double) addr lval(32),hval(32) = VMOVRRD val low(32),high(32) = VMOVRRD loaded land(32) = gAND (i32) lval, low hand(32) = gAND (i32) hval, high and(64) = VMOVDRR land, hand R0,R1 = VMOVRRD and tBX_RET R0<imp-use>,R1<imp-use>
• Introduce a “LegalizerToolkit” for (custom) lowering of legalization
NEW
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Legalizer
• Introduce a “LegalizerToolkit” for (custom) lowering of legalization
foo: val(FPR,64) = VMOVDRR R0,R1 addr(32) = COPY R2 loaded(64) = gLD (double) addr lval(32),hval(32) = VMOVRRD val low(32),high(32) = VMOVRRD loaded land(32) = gAND (i32) lval, low hand(32) = gAND (i32) hval, high and(64) = VMOVDRR land, hand R0,R1 = VMOVRRD and tBX_RET R0<imp-use>,R1<imp-use>
foo: val(FPR,64) = VMOVDRR R0,R1 addr(32) = COPY R2 loaded(64) = gLD (double) addr lval(32),hval(32) = extract val low(32),high(32) = extract loaded land(32) = gAND (i32) lval, low hand(32) = gAND (i32) hval, high and(64) = build_sequence land, hand R0,R1 = VMOVRRD and tBX_RET R0<imp-use>,R1<imp-use>
NEW
13
![Page 41: Global Instruction Selection - LLVMllvm.org/devmtg/2015-10/slides/Colombet-GlobalInstructionSelection.pdf%res = bitcast i64 %and to double ret double %res }q foo: val = … VMOVDRR](https://reader034.vdocuments.site/reader034/viewer/2022042312/5eda1fbbb3745412b570cebd/html5/thumbnails/41.jpg)
LegalizerIRTranslator (G)MILLVM IR
foo: val(FPR,64) = VMOVDRR R0,R1 addr(32) = COPY R2 loaded(64) = gLD (double) addr lval(32),hval(32) = VMOVRRD val low(32),high(32) = VMOVRRD loaded land(32) = gAND (i32) lval, low hand(32) = gAND (i32) hval, high and(64) = VMOVDRR land, hand R0,R1 = VMOVRRD and tBX_RET R0<imp-use>,R1<imp-use> 14
![Page 42: Global Instruction Selection - LLVMllvm.org/devmtg/2015-10/slides/Colombet-GlobalInstructionSelection.pdf%res = bitcast i64 %and to double ret double %res }q foo: val = … VMOVDRR](https://reader034.vdocuments.site/reader034/viewer/2022042312/5eda1fbbb3745412b570cebd/html5/thumbnails/42.jpg)
Legalizer RegBank IRTranslator (G)MILLVM IR
foo: val(FPR,64) = VMOVDRR R0,R1 addr(32) = COPY R2 loaded(64) = gLD (double) addr lval(32),hval(32) = VMOVRRD val low(32),high(32) = VMOVRRD loaded land(32) = gAND (i32) lval, low hand(32) = gAND (i32) hval, high and(64) = VMOVDRR land, hand R0,R1 = VMOVRRD and tBX_RET R0<imp-use>,R1<imp-use>
Select
NEW
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![Page 43: Global Instruction Selection - LLVMllvm.org/devmtg/2015-10/slides/Colombet-GlobalInstructionSelection.pdf%res = bitcast i64 %and to double ret double %res }q foo: val = … VMOVDRR](https://reader034.vdocuments.site/reader034/viewer/2022042312/5eda1fbbb3745412b570cebd/html5/thumbnails/43.jpg)
SelectRegBank foo: val(FPR,64) = VMOVDRR R0,R1 addr(32) = COPY R2 loaded(64) = gLD (double) addr lval(32),hval(32) = VMOVRRD val low(32),high(32) = VMOVRRD loaded land(32) = gAND (i32) lval, low hand(32) = gAND (i32) hval, high and(64) = VMOVDRR land, hand R0,R1 = VMOVRRD and tBX_RET R0<imp-use>,R1<imp-use>
NEW
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![Page 44: Global Instruction Selection - LLVMllvm.org/devmtg/2015-10/slides/Colombet-GlobalInstructionSelection.pdf%res = bitcast i64 %and to double ret double %res }q foo: val = … VMOVDRR](https://reader034.vdocuments.site/reader034/viewer/2022042312/5eda1fbbb3745412b570cebd/html5/thumbnails/44.jpg)
foo: val(FPR,64) = VMOVDRR R0,R1 addr(32) = COPY R2 loaded(64) = gLD (double) addr lval(32),hval(32) = VMOVRRD val low(32),high(32) = VMOVRRD loaded land(32) = gAND (i32) lval, low hand(32) = gAND (i32) hval, high and(64) = VMOVDRR land, hand R0,R1 = VMOVRRD and tBX_RET R0<imp-use>,R1<imp-use>
• Assign virtual registers to register bank
• Avoid cross domain penalties
• Aware of register pressure
foo: val(FPR,64) = VMOVDRR R0,R1 addr(32) = COPY R2 loaded(64) = gLD (double) addr lval(32),hval(32) = VMOVRRD val low(32),high(32) = VMOVRRD loaded land(32) = gAND (i32) lval, low hand(32) = gAND (i32) hval, high and(64) = VMOVDRR land, hand R0,R1 = VMOVRRD and tBX_RET R0<imp-use>,R1<imp-use>
NEWRegBank Select
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![Page 45: Global Instruction Selection - LLVMllvm.org/devmtg/2015-10/slides/Colombet-GlobalInstructionSelection.pdf%res = bitcast i64 %and to double ret double %res }q foo: val = … VMOVDRR](https://reader034.vdocuments.site/reader034/viewer/2022042312/5eda1fbbb3745412b570cebd/html5/thumbnails/45.jpg)
• Assign virtual registers to register bank
• Avoid cross domain penalties
• Aware of register pressure
foo: val(FPR,64) = VMOVDRR R0,R1 addr(GPR,32) = COPY R2 loaded(FPR,64) = gLD (double) addr lval(GPR,32),hval(GPR,32) = VMOVRRD val low(GPR,32),high(GPR,32) = VMOVRRD loaded land(GPR,32) = gAND (i32) lval, low hand(GPR,32) = gAND (i32) hval, high and(FPR,64) = VMOVDRR land, hand R0,R1 = VMOVRRD and tBX_RET R0<imp-use>,R1<imp-use>
NEWRegBank Selectfoo: val(FPR,64) = VMOVDRR R0,R1 addr(32) = COPY R2 loaded(64) = gLD (double) addr lval(32),hval(32) = VMOVRRD val low(32),high(32) = VMOVRRD loaded land(32) = gAND (i32) lval, low hand(32) = gAND (i32) hval, high and(64) = VMOVDRR land, hand R0,R1 = VMOVRRD and tBX_RET R0<imp-use>,R1<imp-use>
15
![Page 46: Global Instruction Selection - LLVMllvm.org/devmtg/2015-10/slides/Colombet-GlobalInstructionSelection.pdf%res = bitcast i64 %and to double ret double %res }q foo: val = … VMOVDRR](https://reader034.vdocuments.site/reader034/viewer/2022042312/5eda1fbbb3745412b570cebd/html5/thumbnails/46.jpg)
foo: val(FPR,64) = VMOVDRR R0,R1 addr(32) = COPY R2 loaded(64) = gLD (double) addr lval(32),hval(32) = VMOVRRD val low(32),high(32) = VMOVRRD loaded land(32) = gAND (i32) lval, low hand(32) = gAND (i32) hval, high and(64) = VMOVDRR land, hand R0,R1 = VMOVRRD and tBX_RET R0<imp-use>,R1<imp-use>
• RegBankSelect: • Asks the target what register banks are supported
for a given opcode • Assigns register banks to avoid cross bank copies • May use the LegalizerToolkit to change the code
foo: val(FPR,64) = VMOVDRR R0,R1 addr(32) = COPY R2 loaded(64) = gLD (double) addr lval(32),hval(32) = VMOVRRD val low(32),high(32) = VMOVRRD loaded land(32) = gAND (i32) lval, low hand(32) = gAND (i32) hval, high and(64) = VMOVDRR land, hand R0,R1 = VMOVRRD and tBX_RET R0<imp-use>,R1<imp-use>
[{(FPR,0xFF…FF),1},{(GPR,0xFF..00)(GPR,0x00..FF),0}]
NEWRegBank Select
16
![Page 47: Global Instruction Selection - LLVMllvm.org/devmtg/2015-10/slides/Colombet-GlobalInstructionSelection.pdf%res = bitcast i64 %and to double ret double %res }q foo: val = … VMOVDRR](https://reader034.vdocuments.site/reader034/viewer/2022042312/5eda1fbbb3745412b570cebd/html5/thumbnails/47.jpg)
• RegBankSelect: • Asks the target what register banks are supported
for a given opcode • Assigns register banks to avoid cross bank copies • May use the LegalizerToolkit to change the code
foo: val(FPR,64) = VMOVDRR R0,R1 addr(32) = COPY R2 loaded(64) = gLD (double) addr lval(32),hval(32) = VMOVRRD val low(32),high(32) = VMOVRRD loaded land(32) = gAND (i32) lval, low hand(32) = gAND (i32) hval, high and(64) = VMOVDRR land, hand R0,R1 = VMOVRRD and tBX_RET R0<imp-use>,R1<imp-use>
[{(FPR,0xFF…FF),1},{(GPR,0xFFFF…0000)(GPR,0x0000…FFFF),0}]
NEWRegBank Select
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![Page 48: Global Instruction Selection - LLVMllvm.org/devmtg/2015-10/slides/Colombet-GlobalInstructionSelection.pdf%res = bitcast i64 %and to double ret double %res }q foo: val = … VMOVDRR](https://reader034.vdocuments.site/reader034/viewer/2022042312/5eda1fbbb3745412b570cebd/html5/thumbnails/48.jpg)
• RegBankSelect: • Asks the target what register banks are supported
for a given opcode • Assigns register banks to avoid cross bank copies • May use the LegalizerToolkit to change the code
foo: val(FPR,64) = VMOVDRR R0,R1 addr(32) = COPY R2 loaded(64) = gLD (double) addr lval(32),hval(32) = VMOVRRD val low(32),high(32) = VMOVRRD loaded land(32) = gAND (i32) lval, low hand(32) = gAND (i32) hval, high and(64) = VMOVDRR land, hand R0,R1 = VMOVRRD and tBX_RET R0<imp-use>,R1<imp-use>
[{(FPR,0xFF…FF),1},{(GPR,0xFFFF…0000)(GPR,0x0000…FFFF),0}]
{(FPR,0xFF…FF),1} {(GPR,0xFF..00)(GPR,0x00..FF),0}
NEWRegBank Select
16
![Page 49: Global Instruction Selection - LLVMllvm.org/devmtg/2015-10/slides/Colombet-GlobalInstructionSelection.pdf%res = bitcast i64 %and to double ret double %res }q foo: val = … VMOVDRR](https://reader034.vdocuments.site/reader034/viewer/2022042312/5eda1fbbb3745412b570cebd/html5/thumbnails/49.jpg)
• RegBankSelect: • Asks the target what register banks are supported
for a given opcode • Assigns register banks to avoid cross bank copies • May use the LegalizerToolkit to change the code
foo: val(FPR,64) = VMOVDRR R0,R1 addr(32) = COPY R2 loaded(64) = gLD (double) addr lval(32),hval(32) = VMOVRRD val low(32),high(32) = VMOVRRD loaded land(32) = gAND (i32) lval, low hand(32) = gAND (i32) hval, high and(64) = VMOVDRR land, hand R0,R1 = VMOVRRD and tBX_RET R0<imp-use>,R1<imp-use>
[{(FPR,0xFF…FF),1},{(GPR,0xFFFF…0000)(GPR,0x0000…FFFF),0}]
{(FPR,0xFF…FF),1} {(GPR,0xFFFF…0000)(GPR,0x0000…FFFF),0}
NEWRegBank Select
16
![Page 50: Global Instruction Selection - LLVMllvm.org/devmtg/2015-10/slides/Colombet-GlobalInstructionSelection.pdf%res = bitcast i64 %and to double ret double %res }q foo: val = … VMOVDRR](https://reader034.vdocuments.site/reader034/viewer/2022042312/5eda1fbbb3745412b570cebd/html5/thumbnails/50.jpg)
• RegBankSelect: • Asks the target what register banks are supported
for a given opcode • Assigns register banks to avoid cross bank copies • May use the LegalizerToolkit to change the code
foo: val(FPR,64) = VMOVDRR R0,R1 addr(32) = COPY R2 loaded(64) = gLD (double) addr lval(32),hval(32) = VMOVRRD val low(32),high(32) = VMOVRRD loaded land(32) = gAND (i32) lval, low hand(32) = gAND (i32) hval, high and(64) = VMOVDRR land, hand R0,R1 = VMOVRRD and tBX_RET R0<imp-use>,R1<imp-use>
[{(FPR,0xFF…FF),1},{(GPR,0xFFFF…0000)(GPR,0x0000…FFFF),0}]
{(FPR,0xFF…FF),1} {(GPR,0xFFFF…0000)(GPR,0x0000…FFFF),0}
NEWRegBank Select
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![Page 51: Global Instruction Selection - LLVMllvm.org/devmtg/2015-10/slides/Colombet-GlobalInstructionSelection.pdf%res = bitcast i64 %and to double ret double %res }q foo: val = … VMOVDRR](https://reader034.vdocuments.site/reader034/viewer/2022042312/5eda1fbbb3745412b570cebd/html5/thumbnails/51.jpg)
• RegBankSelect: • Asks the target what register banks are supported
for a given opcode
foo: val(FPR,64) = VMOVDRR R0,R1 addr(32) = COPY R2 loaded(64) = gLD (double) addr lval(32),hval(32) = VMOVRRD val low(32),high(32) = VMOVRRD loaded land(32) = gAND (i32) lval, low hand(32) = gAND (i32) hval, high and(64) = VMOVDRR land, hand R0,R1 = VMOVRRD and tBX_RET R0<imp-use>,R1<imp-use>
foo: val(FPR,64) = VMOVDRR R0,R1 addr(32) = COPY R2 loaded(64) = gLD (double) addr lval(32),hval(32) = VMOVRRD val low(32),high(32) = VMOVRRD loaded land(32) = gAND (i32) lval, low hand(32) = gAND (i32) hval, high and(64) = VMOVDRR land, hand R0,R1 = VMOVRRD and tBX_RET R0<imp-use>,R1<imp-use>
NEWRegBank Select
16
![Page 52: Global Instruction Selection - LLVMllvm.org/devmtg/2015-10/slides/Colombet-GlobalInstructionSelection.pdf%res = bitcast i64 %and to double ret double %res }q foo: val = … VMOVDRR](https://reader034.vdocuments.site/reader034/viewer/2022042312/5eda1fbbb3745412b570cebd/html5/thumbnails/52.jpg)
• RegBankSelect: • Asks the target what register banks are supported
for a given opcode • Assigns register banks to avoid cross bank copies • May use the LegalizerToolkit to change the code
foo: val(FPR,64) = VMOVDRR R0,R1 addr(32) = COPY R2 loaded(64) = gLD (double) addr lval(32),hval(32) = VMOVRRD val low(32),high(32) = VMOVRRD loaded land(32) = gAND (i32) lval, low hand(32) = gAND (i32) hval, high and(64) = VMOVDRR land, hand R0,R1 = VMOVRRD and tBX_RET R0<imp-use>,R1<imp-use>
foo: val1(GPR,32),val2(GPR,32) = COPIES R0,R1 addr(32) = COPY R2 loaded(64) = gLD (double) addr lval(32),hval(32) = COPIES val1, val2 low(32),high(32) = VMOVRRD loaded land(32) = gAND (i32) lval, low hand(32) = gAND (i32) hval, high and(64) = VMOVDRR land, hand R0,R1 = VMOVRRD and tBX_RET R0<imp-use>,R1<imp-use>
NEWRegBank Select
16
![Page 53: Global Instruction Selection - LLVMllvm.org/devmtg/2015-10/slides/Colombet-GlobalInstructionSelection.pdf%res = bitcast i64 %and to double ret double %res }q foo: val = … VMOVDRR](https://reader034.vdocuments.site/reader034/viewer/2022042312/5eda1fbbb3745412b570cebd/html5/thumbnails/53.jpg)
• RegBankSelect: • Asks the target what register banks are supported
for a given opcode • Assigns register banks to avoid cross bank copies • May use the LegalizerToolkit to change the code
foo: val(FPR,64) = VMOVDRR R0,R1 addr(32) = COPY R2 loaded(64) = gLD (double) addr lval(32),hval(32) = VMOVRRD val low(32),high(32) = VMOVRRD loaded land(32) = gAND (i32) lval, low hand(32) = gAND (i32) hval, high and(64) = VMOVDRR land, hand R0,R1 = VMOVRRD and tBX_RET R0<imp-use>,R1<imp-use>
foo: val1(GPR,32),val2(GPR,32) = COPIES R0,R1 addr(32) = COPY R2 loaded(64) = gLD (double) addr lval(32),hval(32) = COPIES val1, val2 low(32),high(32) = VMOVRRD loaded land(32) = gAND (i32) lval, low hand(32) = gAND (i32) hval, high and(64) = VMOVDRR land, hand R0,R1 = VMOVRRD and tBX_RET R0<imp-use>,R1<imp-use>
NEWRegBank Select
16
![Page 54: Global Instruction Selection - LLVMllvm.org/devmtg/2015-10/slides/Colombet-GlobalInstructionSelection.pdf%res = bitcast i64 %and to double ret double %res }q foo: val = … VMOVDRR](https://reader034.vdocuments.site/reader034/viewer/2022042312/5eda1fbbb3745412b570cebd/html5/thumbnails/54.jpg)
foo: val1(GPR,32),val2(GPR,32) = COPIES R0,R1 addr(32) = COPY R2 loaded(64) = gLD (double) addr lval(32),hval(32) = COPIES val1, val2 low(32),high(32) = VMOVRRD loaded land(32) = gAND (i32) lval, low hand(32) = gAND (i32) hval, high and(64) = VMOVDRR land, hand R0,R1 = VMOVRRD and tBX_RET R0<imp-use>,R1<imp-use>
• RegBankSelect: • Asks the target what register banks are supported
for a given opcode • Assigns register banks to avoid cross bank copies • May use the LegalizerToolkit to change the code
foo: val1(GPR,32),val2(GPR,32) = COPIES R0,R1 addr(32) = COPY R2 loaded(64) = gLD (double) addr lval(32),hval(32) = COPIES val1, val2 low(32),high(32) = VMOVRRD loaded land(32) = gAND (i32) lval, low hand(32) = gAND (i32) hval, high and(64) = VMOVDRR land, hand R0,R1 = VMOVRRD and tBX_RET R0<imp-use>,R1<imp-use>
NEWRegBank Select
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foo: val1(GPR,32),val2(GPR,32) = COPIES R0,R1 addr(32) = COPY R2 loaded(64) = gLD (double) addr lval(32),hval(32) = COPIES val1, val2 low(32),high(32) = VMOVRRD loaded land(32) = gAND (i32) lval, low hand(32) = gAND (i32) hval, high and(64) = VMOVDRR land, hand R0,R1 = VMOVRRD and tBX_RET R0<imp-use>,R1<imp-use>
foo: val1(GPR,32),val2(GPR,32) = COPIES R0,R1 addr(32) = COPY R2 loaded1(GPR,32) = gLD (i32) addr loaded2(GPR,32) = gLD (i32) addr, #4 lval(32),hval(32) = COPIES val1, val2 low(32),high(32) = COPIES loaded1,loaded2 land(32) = gAND (i32) lval, low hand(32) = gAND (i32) hval, high and(64) = VMOVDRR land, hand R0,R1 = VMOVRRD and tBX_RET R0<imp-use>,R1<imp-use>
• RegBankSelect: • Asks the target what register banks are supported
for a given opcode • Assigns register banks to avoid cross bank copies • May use the LegalizerToolkit to change the code
NEWRegBank Select
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foo: val1(GPR,32),val2(GPR,32) = COPIES R0,R1 addr(32) = COPY R2 loaded(64) = gLD (double) addr lval(32),hval(32) = COPIES val1, val2 low(32),high(32) = VMOVRRD loaded land(32) = gAND (i32) lval, low hand(32) = gAND (i32) hval, high and(64) = VMOVDRR land, hand R0,R1 = VMOVRRD and tBX_RET R0<imp-use>,R1<imp-use>
foo: val1(GPR,32),val2(GPR,32) = COPIES R0,R1 addr(32) = COPY R2 loaded1(GPR,32) = gLD (i32) addr loaded2(GPR,32) = gLD (i32) addr, #4 lval(32),hval(32) = COPIES val1, val2 low(32),high(32) = COPIES loaded1,loaded2 land(32) = gAND (i32) lval, low hand(32) = gAND (i32) hval, high and(64) = VMOVDRR land, hand R0,R1 = VMOVRRD and tBX_RET R0<imp-use>,R1<imp-use>
• RegBankSelect: • Asks the target what register banks are supported
for a given opcode • Assigns register banks to avoid cross bank copies • May use the LegalizerToolkit to change the code
NEWRegBank Select
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foo: val1(GPR,32),val2(GPR,32) = COPIES R0,R1 addr(32) = COPY R2 loaded1(GPR,32) = gLD (i32) addr loaded2(GPR,32) = gLD (i32) addr, #4 lval(32),hval(32) = COPIES val1, val2 low(32),high(32) = COPIES loaded1,loaded2 land(32) = gAND (i32) lval, low hand(32) = gAND (i32) hval, high and(64) = VMOVDRR land, hand R0,R1 = VMOVRRD and tBX_RET R0<imp-use>,R1<imp-use>
foo: val1(GPR,32),val2(GPR,32) = COPIES R0,R1 addr(GPR,32) = COPY R2 loaded1(GPR,32) = gLD (i32) addr loaded2(GPR,32) = gLD (i32) addr, #4 lval(GPR,32),hval(GPR,32) = COPIES val1, val2 low(GPR,32),high(GPR,32) = COPIES loaded1,loaded2 land(GPR,32) = gAND (i32) lval, low hand(GPR,32) = gAND (i32) hval, high and1(GPR,32), and2(GPR,32) = COPIES land, hand R0,R1 = COPIES and1, and2 tBX_RET R0<imp-use>,R1<imp-use>
• RegBankSelect: • Asks the target what register banks are supported
for a given opcode • Assigns register banks to avoid cross bank copies • May use the LegalizerToolkit to change the code
NEWRegBank Select
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foo: val1(GPR,32),val2(GPR,32) = COPIES R0,R1 addr(32) = COPY R2 loaded1(GPR,32) = gLD (i32) addr loaded2(GPR,32) = gLD (i32) addr, #4 lval(32),hval(32) = COPIES val1, val2 low(32),high(32) = COPIES loaded1,loaded2 land(32) = gAND (i32) lval, low hand(32) = gAND (i32) hval, high and(64) = VMOVDRR land, hand R0,R1 = VMOVRRD and tBX_RET R0<imp-use>,R1<imp-use>
foo: val1(GPR,32),val2(GPR,32) = COPIES R0,R1 addr(GPR,32) = COPY R2 loaded1(GPR,32) = gLD (i32) addr loaded2(GPR,32) = gLD (i32) addr, #4 lval(GPR,32),hval(GPR,32) = COPIES val1, val2 low(GPR,32),high(GPR,32) = COPIES loaded1,loaded2 land(GPR,32) = gAND (i32) lval, low hand(GPR,32) = gAND (i32) hval, high and1(GPR,32), and2(GPR,32) = COPIES land, hand R0,R1 = COPIES and1, and2 tBX_RET R0<imp-use>,R1<imp-use>
• RegBankSelect: • Asks the target what register banks are supported
for a given opcode • Assigns register banks to avoid cross bank copies • May use the LegalizerToolkit to change the code
NEWRegBank Select
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RegBank IRTranslator (G)MILLVM IR Legalizer Select
foo: val1(GPR,32),val2(GPR,32) = COPIES R0,R1 addr(GPR,32) = COPY R2 loaded1(GPR,32) = gLD (i32) addr loaded2(GPR,32) = gLD (i32) addr, #4 lval(GPR,32),hval(GPR,32) = COPIES val1, val2 low(GPR,32),high(GPR,32) = COPIES loaded1,loaded2 land(GPR,32) = gAND (i32) lval, low hand(GPR,32) = gAND (i32) hval, high and1(GPR,32), and2(GPR,32) = COPIES land, hand R0,R1 = COPIES and1, and2 tBX_RET R0<imp-use>,R1<imp-use>
17
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RegBank IRTranslator (G)MILLVM IR Legalizer Select
foo: val1(GPR,32),val2(GPR,32) = COPIES R0,R1 addr(GPR,32) = COPY R2 loaded1(GPR,32) = gLD (i32) addr loaded2(GPR,32) = gLD (i32) addr, #4 lval(GPR,32),hval(GPR,32) = COPIES val1, val2 low(GPR,32),high(GPR,32) = COPIES loaded1,loaded2 land(GPR,32) = gAND (i32) lval, low hand(GPR,32) = gAND (i32) hval, high and1(GPR,32), and2(GPR,32) = COPIES land, hand R0,R1 = COPIES and1, and2 tBX_RET R0<imp-use>,R1<imp-use>
Select
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Select
• (G)MachineInstr to MachineInstr • Loop until everything is selected • State expressed in the IR. • In-place morphing. • State machine.
foo: val1(GPR,32),val2(GPR,32) = COPIES R0,R1 addr(GPR,32) = COPY R2 loaded1(GPR,32) = gLD (i32) addr loaded2(GPR,32) = gLD (i32) addr, #4 lval(GPR,32),hval(GPR,32) = COPIES val1, val2 low(GPR,32),high(GPR,32) = COPIES loaded1,loaded2 land(GPR,32) = gAND (i32) lval, low hand(GPR,32) = gAND (i32) hval, high and1(GPR,32), and2(GPR,32) = COPIES land, hand R0,R1 = COPIES and1, and2 tBX_RET R0<imp-use>,R1<imp-use>
18
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Select
• (G)MachineInstr to MachineInstr • In-place morphing • State expressed in the IR • State machine • Loop until everything is selected
foo: val1(GPR,32),val2(GPR,32) = COPIES R0,R1 addr(GPR,32) = COPY R2 loaded1(GPR,32) = gLD (i32) addr loaded2(GPR,32) = gLD (i32) addr, #4 lval(GPR,32),hval(GPR,32) = COPIES val1, val2 low(GPR,32),high(GPR,32) = COPIES loaded1,loaded2 land(GPR,32) = gAND (i32) lval, low hand(GPR,32) = gAND (i32) hval, high and1(GPR,32), and2(GPR,32) = COPIES land, hand R0,R1 = COPIES and1, and2 tBX_RET R0<imp-use>,R1<imp-use>
NEW
18
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• (G)MachineInstr to MachineInstr • In-place morphing • State expressed in the IR • State machine • Iterate until everything is selected • Combines across basic blocks
Selectfoo: val1(GPR,32),val2(GPR,32) = COPIES R0,R1 addr(GPR,32) = COPY R2 loaded1(GPR,32) = gLD (i32) addr loaded2(GPR,32) = gLD (i32) addr, #4 lval(GPR,32),hval(GPR,32) = COPIES val1, val2 low(GPR,32),high(GPR,32) = COPIES loaded1,loaded2 land(GPR,32) = gAND (i32) lval, low hand(GPR,32) = gAND (i32) hval, high and1(GPR,32), and2(GPR,32) = COPIES land, hand R0,R1 = COPIES and1, and2 tBX_RET R0<imp-use>,R1<imp-use>
foo: val1(GPR,32),val2(GPR,32) = COPIES R0,R1 addr(GPR,32) = COPY R2 loaded1(GPR,32) = gLD (i32) addr loaded2(GPR,32) = gLD (i32) addr, #4 lval(GPR,32),hval(GPR,32) = COPIES val1, val2 low(GPR,32),high(GPR,32) = COPIES loaded1,loaded2 land(GPR,32) = gAND (i32) lval, low hand(GPR,32) = gAND (i32) hval, high and1(GPR,32), and2(GPR,32) = COPIES land, hand R0,R1 = COPIES and1, and2 tBX_RET R0<imp-use>,R1<imp-use>
NEW
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Selectfoo: val1(GPR,32),val2(GPR,32) = COPIES R0,R1 addr(GPR,32) = COPY R2 loaded1(GPR,32) = gLD (i32) addr loaded2(GPR,32) = gLD (i32) addr, #4 lval(GPR,32),hval(GPR,32) = COPIES val1, val2 low(GPR,32),high(GPR,32) = COPIES loaded1,loaded2 land(GPR,32) = gAND (i32) lval, low hand(GPR,32) = gAND (i32) hval, high and1(GPR,32), and2(GPR,32) = COPIES land, hand R0,R1 = COPIES and1, and2 tBX_RET R0<imp-use>,R1<imp-use>
foo: val1(GPR,32),val2(GPR,32) = COPIES R0,R1 addr(GPR,32) = COPY R2 loaded1(GPR,32) = gLD (i32) addr loaded2(GPR,32) = gLD (i32) addr, #4 lval(GPR,32),hval(GPR,32) = COPIES val1, val2 low(GPR,32),high(GPR,32) = COPIES loaded1,loaded2 land(GPR,32) = gAND (i32) lval, low hand(GPR,32) = t2ANDrr (i32) hval, high and1(GPR,32), and2(GPR,32) = COPIES land, hand R0,R1 = COPIES and1, and2 tBX_RET R0<imp-use>,R1<imp-use>
• (G)MachineInstr to MachineInstr • In-place morphing • State expressed in the IR • State machine • Iterate until everything is selected • Combines across basic blocks
NEW
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Selectfoo: val1(GPR,32),val2(GPR,32) = COPIES R0,R1 addr(GPR,32) = COPY R2 loaded1(GPR,32) = gLD (i32) addr loaded2(GPR,32) = gLD (i32) addr, #4 lval(GPR,32),hval(GPR,32) = COPIES val1, val2 low(GPR,32),high(GPR,32) = COPIES loaded1,loaded2 land(GPR,32) = gAND (i32) lval, low hand(GPR,32) = gAND (i32) hval, high and1(GPR,32), and2(GPR,32) = COPIES land, hand R0,R1 = COPIES and1, and2 tBX_RET R0<imp-use>,R1<imp-use>
foo: val1(GPR,32),val2(GPR,32) = COPIES R0,R1 addr(GPR,32) = COPY R2 loaded1(GPR,32) = gLD (i32) addr loaded2(GPR,32) = gLD (i32) addr, #4 lval(GPR,32),hval(GPR,32) = COPIES val1, val2 low(GPR,32),high(GPR,32) = COPIES loaded1,loaded2 land(GPR,32) = gAND (i32) lval, low hand(GPR,32) = t2ANDrr (i32) hval, high and1(GPR,32), and2(GPR,32) = COPIES land, hand R0,R1 = COPIES and1, and2 tBX_RET R0<imp-use>,R1<imp-use>
• (G)MachineInstr to MachineInstr • In-place morphing • State expressed in the IR • State machine • Iterate until everything is selected • Combines across basic blocks
NEW
NEW
18
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Selectfoo: val1(GPR,32),val2(GPR,32) = COPIES R0,R1 addr(GPR,32) = COPY R2 loaded1(GPR,32) = gLD (i32) addr loaded2(GPR,32) = gLD (i32) addr, #4 lval(GPR,32),hval(GPR,32) = COPIES val1, val2 low(GPR,32),high(GPR,32) = COPIES loaded1,loaded2 land(GPR,32) = gAND (i32) lval, low hand(GPR,32) = gAND (i32) hval, high and1(GPR,32), and2(GPR,32) = COPIES land, hand R0,R1 = COPIES and1, and2 tBX_RET R0<imp-use>,R1<imp-use>
foo: val1(GPR,32),val2(GPR,32) = COPIES R0,R1 addr(GPR,32) = COPY R2 loaded1(GPR,32) = t2LDRi12 (i32) addr loaded2(GPR,32) = t2LDRi12 (i32) addr, #4 lval(GPR,32),hval(GPR,32) = COPIES val1, val2 low(GPR,32),high(GPR,32) = COPIES loaded1,loaded2 land(GPR,32) = t2ANDrr (i32) lval, low hand(GPR,32) = t2ANDrr (i32) hval, high and1(GPR,32), and2(GPR,32) = COPIES land, hand R0,R1 = COPIES and1, and2 tBX_RET R0<imp-use>,R1<imp-use>
• (G)MachineInstr to MachineInstr • In-place morphing • State expressed in the IR • State machine • Iterate until everything is selected • Combines across basic blocks
NEW
NEW
NEW
18
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Selectfoo: val1(GPR,32),val2(GPR,32) = COPIES R0,R1 addr(GPR,32) = COPY R2 loaded1(GPR,32) = gLD (i32) addr loaded2(GPR,32) = gLD (i32) addr, #4 lval(GPR,32),hval(GPR,32) = COPIES val1, val2 low(GPR,32),high(GPR,32) = COPIES loaded1,loaded2 land(GPR,32) = gAND (i32) lval, low hand(GPR,32) = gAND (i32) hval, high and1(GPR,32), and2(GPR,32) = COPIES land, hand R0,R1 = COPIES and1, and2 tBX_RET R0<imp-use>,R1<imp-use>
foo: val1(GPR,32),val2(GPR,32) = COPIES R0,R1 addr(GPR,32) = COPY R2 loaded1(GPR,32) = t2LDRi12 (i32) addr loaded2(GPR,32) = t2LDRi12 (i32) addr, #4 lval(GPR,32),hval(GPR,32) = COPIES val1, val2 low(GPR,32),high(GPR,32) = COPIES loaded1,loaded2 land(GPR,32) = t2ANDrr (i32) lval, low hand(GPR,32) = t2ANDrr (i32) hval, high and1(GPR,32), and2(GPR,32) = COPIES land, hand R0,R1 = COPIES and1, and2 tBX_RET R0<imp-use>,R1<imp-use>
• (G)MachineInstr to MachineInstr • In-place morphing • State expressed in the IR • State machine • Iterate until everything is selected • Combines across basic blocks
NEW
NEW
NEW
18
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(G)MI Legalizer RegBank Select SelectIRTranslatorLLVM IR
19
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(G)MI Legalizer RegBank Select SelectIRTranslatorLLVM IR MI
19
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Summary
MI
(G)MI
Legalizer
RegBank Select
Select
IRTranslator
LLVM IR
20
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Summary
Legalizer
RegBank Select
MI
Select
(G)MI
IRTranslator
LLVM IR
20
![Page 72: Global Instruction Selection - LLVMllvm.org/devmtg/2015-10/slides/Colombet-GlobalInstructionSelection.pdf%res = bitcast i64 %and to double ret double %res }q foo: val = … VMOVDRR](https://reader034.vdocuments.site/reader034/viewer/2022042312/5eda1fbbb3745412b570cebd/html5/thumbnails/72.jpg)
Summary
Opt
Legalizer
RegBank Select
MI
Select
(G)MI
IRTranslator
LLVM IR
20
![Page 73: Global Instruction Selection - LLVMllvm.org/devmtg/2015-10/slides/Colombet-GlobalInstructionSelection.pdf%res = bitcast i64 %and to double ret double %res }q foo: val = … VMOVDRR](https://reader034.vdocuments.site/reader034/viewer/2022042312/5eda1fbbb3745412b570cebd/html5/thumbnails/73.jpg)
Summary
Legalizer
RegBank Select
MI
Select
(G)MI
IRTranslator
LLVM IR
20
![Page 74: Global Instruction Selection - LLVMllvm.org/devmtg/2015-10/slides/Colombet-GlobalInstructionSelection.pdf%res = bitcast i64 %and to double ret double %res }q foo: val = … VMOVDRR](https://reader034.vdocuments.site/reader034/viewer/2022042312/5eda1fbbb3745412b570cebd/html5/thumbnails/74.jpg)
Summary
Opt
Legalizer
RegBank Select
MI
Select
(G)MI
IRTranslator
LLVM IR
20
![Page 75: Global Instruction Selection - LLVMllvm.org/devmtg/2015-10/slides/Colombet-GlobalInstructionSelection.pdf%res = bitcast i64 %and to double ret double %res }q foo: val = … VMOVDRR](https://reader034.vdocuments.site/reader034/viewer/2022042312/5eda1fbbb3745412b570cebd/html5/thumbnails/75.jpg)
Summary
Legalizer
RegBank Select
MI
Select
(G)MI
IRTranslator
LLVM IR
20
![Page 76: Global Instruction Selection - LLVMllvm.org/devmtg/2015-10/slides/Colombet-GlobalInstructionSelection.pdf%res = bitcast i64 %and to double ret double %res }q foo: val = … VMOVDRR](https://reader034.vdocuments.site/reader034/viewer/2022042312/5eda1fbbb3745412b570cebd/html5/thumbnails/76.jpg)
Summary
Opt
Legalizer
RegBank Select
MI
Select
(G)MI
IRTranslator
LLVM IR
20
![Page 77: Global Instruction Selection - LLVMllvm.org/devmtg/2015-10/slides/Colombet-GlobalInstructionSelection.pdf%res = bitcast i64 %and to double ret double %res }q foo: val = … VMOVDRR](https://reader034.vdocuments.site/reader034/viewer/2022042312/5eda1fbbb3745412b570cebd/html5/thumbnails/77.jpg)
Summary
Legalizer ToolkitCan use
TargetHooks
Can tune
Hooks
Legalizer
RegBank Select
MI
Select
(G)MI
IRTranslator
LLVM IR
20
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Global ISel• Work at function scope
• Global
• Break down the process in passes • More flexible pipeline • Easier to understand/maintain • Shared code for fast and good paths
• Introduce new generic opcodes for MachineInstr • Fast • IR that represents ISA concepts better • No change to LLVM IR • Self contained machine representation MI
(G)MI
Legalizer
RegBank Select
Select
IRTranslator
LLVM IR
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1. Start of prototyping • Perform the translation • Lower the ABI • Complex instructions are not supported
2. Basic selector • Abort on illegal types • Selector patterns written in C++ • Simple bank selection
3. Simple legalization • Scalar operations • Some vector operations
End of prototyping
How Do We Get There?1. Rename the SDISel into LegacyISel
1
2
2
3
1
MI
(G)MI
Legalizer
RegBank Select
Select
IRTranslator
LLVM IR
MI
Legalizer
RegBank Select
Select
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Then What?• Productize on what we learnt
• Discuss timeline to remove:
• SDISel, FastISel
• CodeGenPrepare, ConstantHoisting
• ExeDepsFix, PeepholeOptimizer
• Present a status report next year23
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References
• Jakob’s initial proposal for global-isel: http://lists.llvm.org/pipermail/llvm-dev/2013-August/064696.html
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Questions?