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  • 8/21/2019 Gervasi Timing

    1/25

     Mark Sherwood and Associates All rights reserved Copyright JANUAR

    When Timing-Is-Everything …

    Charge Transfer Model for 

    Input Signaling & Referencing

    !ill "ervasi

    #echnology Analystw$gervasi%att&i'co$

    (w$gervasi%co$cast'net)

  • 8/21/2019 Gervasi Timing

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     Mark Sherwood and Associates All rights reserved Copyright JANUAR

    When Timing-Is-Everything …

    Agenda

    * Review traditional set+p hold ti$e

    * -.a$ine i$pact o/ signal slew rate

    * Co$pare single ended to di//erential

    * hat a&o+t non1$onotonic signals

    * 3ooking to the /+t+re* Call to action

  • 8/21/2019 Gervasi Timing

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     Mark Sherwood and Associates All rights reserved Copyright JANUAR

    When Timing-Is-Everything …

    Why a New Model?

    * 4aria&le 5re6+ency syste$s e.panding 7 5i.ed /re6+ency syste$s 8+st needed a

    yes9no answer on signal integrity 7 4aria&le /re6+ency syste$s need $ore:

    calc+lated &ased on availa&le data eye

     Availa&le operating /re6+ency ;

      < (re6+ired data eye = crap)

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     Mark Sherwood and Associates All rights reserved Copyright JANUAR

    When Timing-Is-Everything …

    Traditional Input Timing Model

    >N?U#

    Set+p @old

    C3CB

    C3CB

    #i$ing derating &y inp+t signal slew rate:

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     Mark Sherwood and Associates All rights reserved Copyright JANUAR

    When Timing-Is-Everything …

    !ro"lems with Traditional Model

    * Hoes not acco+nt /or di//erences &etween

    single ended and di//erential

    *  Ass+$es set+p hold re$ain &alanced* No analytical way to pro8ect derating

    * No g+idance to package developers

    * No $echanis$ to handle non1$onotonicsignal transitions

    * 3eaves i$portant picoseconds wasted

  • 8/21/2019 Gervasi Timing

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     Mark Sherwood and Associates All rights reserved Copyright JANUAR

    When Timing-Is-Everything …

    Charge Transfer Model #CTM$

    >N?U#

    Charge #rans/er #i$ing Model 7 All inp+ts have a slew rate dependent aspect t-I# and

    an independent aspect t>N# 7 S+$$ing t-I# = t>N# gives inp+t transition ti$e t#

     7 #ransition ti$e t# has $in and $a. val+es

     7 Hi//erential inp+t transitions inherently di//erent

    t>N#t-I#

    t#

     T h e  N e w 

     W a y

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     Mark Sherwood and Associates All rights reserved Copyright JANUAR

    When Timing-Is-Everything …

    %actors Affecting Transition

    * -.ternal /actors that are edge ratedependent 7 ?ackage parasitics 7 >np+t stage < characteristics incl+ding

    inp+t type sat+ration

    * >nternal /actors that are edge rate

    independent 7 >nternal loading $is$atch 7 n1chip ro+ting 7 ?rocess, voltage, te$perat+re

      t  &  '  T

      t  I  N  T

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     Mark Sherwood and Associates All rights reserved Copyright JANUAR

    When Timing-Is-Everything …

    Standards (ersus !roprietary

    * C#M was developed inside J-H-C /or HHR2

    * Standards re6+ire an envelope within which $+ltiple

    s+ppliers specs operate, there/ore:

     7 > +se 4R-5 as an acc+$+lation start threshold

     7 > +se 4>3AC and 4>@AC as sat+ration thresholds

     7 #hese do not represent all inp+t types, but 

     7 #hey do de/ine a standard way to de/ine the envelope

    * ?roprietary syste$s analyses co+ld +se real

    thresholds /or increased application speci/ic acc+racy

  • 8/21/2019 Gervasi Timing

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     Mark Sherwood and Associates All rights reserved Copyright JANUAR

    When Timing-Is-Everything …

    t'T for Slow Slew Rate) Single nded) simple model

    VREF

    VIHAC

     =

    VREF

     + VSAT

    VIHDC

    VILDC

    VILAC

    =

    VREF

     - VSAT

    t'T

     slew

     At 

      T 

     EXT 

    *2=

    tINT

    tT

    AT * Charge

    to Transition

  • 8/21/2019 Gervasi Timing

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     Mark Sherwood and Associates All rights reserved Copyright JANUAR

    When Timing-Is-Everything …

    t'T for %ast Slew Rate) Single nded) simple model

    VREF

    VIHAC

     =

    VREF

     + VSAT

    VIHDC

    VILDC

    VILAC

     =

    VREF

     - VSAT

    t'TtSAT

    ASAT * Charge

    to Saturation

    AA++ * Charge

    after Saturation

    AT * ASAT , AA++

    SAT 

    SAT T 

    SAT  EXT 

     A At t 

      )(   −+=

    (SAT * Saturation

    (oltage ffset

    tINT

    Internal factorstT

  • 8/21/2019 Gervasi Timing

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     Mark Sherwood and Associates All rights reserved Copyright JANUAR

    When Timing-Is-Everything …

    t'T for Slow Slew Rate) +ifferential) simple model

    VREF

    VIHAC

     =

    VREF

     + VSAT

    VIHDC

    VILDC

    VILAC

     =

    VREF

     - VSAT

    AT * Charge

    to Transition

    t'T tINT

    tT

  • 8/21/2019 Gervasi Timing

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     Mark Sherwood and Associates All rights reserved Copyright JANUAR

    When Timing-Is-Everything …

    t'T for %ast Slew Rate) +ifferential) simple model

    VREF

    VIHAC

     =

    VREF

     + VSAT

    VIHDC

    VILDC

    VILAC

     =

    VREF

     - VSAT

    AT * ASAT , AA++

    t'T tINTtT

  • 8/21/2019 Gervasi Timing

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     Mark Sherwood and Associates All rights reserved Copyright JANUAR

    When Timing-Is-Everything …

    Applying CTM to Setup & -old

    * Relate inp+t signals (data, address,

    co$$and) to re/erence (clock, stro&e)

    *  Assert t#$a. and t#$in characteristics*  Ass+$e inp+ts and re/erences $ay have

    di//erent inp+t slew rates

    * +tco$e is a $atri. o/ deratings

  • 8/21/2019 Gervasi Timing

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     Mark Sherwood and Associates All rights reserved Copyright JANUAR

    When Timing-Is-Everything …

    CTM Setup Time +efinition

    >N?U#

    Set+p

    C3CB

    C3CB

    Set+p ; t#$a. o/ inp+t 7 t#$in o/ re/erence

    t#$a.

    t#$in

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     Mark Sherwood and Associates All rights reserved Copyright JANUAR

    When Timing-Is-Everything …

    CTM -old Time +efinition

    >N?U#

    @old

    C3CB

    C3CB

    @old ; t#$a. o/ re/erence 7 t#$in o/ inp+t

    t#$in

    t#$a.

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     Mark Sherwood and Associates All rights reserved Copyright JANUAR

    When Timing-Is-Everything …

    -ow does this help.?

    #he Charge #rans/er Model gives a higher acc+racy /orset+p and hold relationships

    >t also provides a way to acc+rately descri&e derating/or inp+t slew rate

    Charge #rans/er Model gives a $ethod /or analyFing

    non1$onotonic transitions

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     Mark Sherwood and Associates All rights reserved Copyright JANUAR

    When Timing-Is-Everything …

    /ample0 ++R1 Input +erating Ta"les

    2'00'

    0'

  • 8/21/2019 Gervasi Timing

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     Mark Sherwood and Associates All rights reserved Copyright JANUAR

    When Timing-Is-Everything …

    +erating 2sing Charge Transfer 

    * Users contin+e to +se 4R-5 crossing /or single endedand crosspoint o/ di//erential pair /or $eas+re$ent

    * Herating ta&les correlate $eas+re$ent to re6+iredset+p hold ti$es

    * !oot1ti$eK slew rate calc+lations $ay &e needed,e'g' $od+les st+//ed and total loading

    ∴#he Charge #rans/er Model red+ces syste$develop$ent cost &y ena&ling $ore co$ple. ti$inganalysis

  • 8/21/2019 Gervasi Timing

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     Mark Sherwood and Associates All rights reserved Copyright JANUAR

    When Timing-Is-Everything …

    Non3Monotonic Transitions

    * 3ine re/lections in co$ple. syste$ loading or end1

    +ser con/ig+ra&le syste$s ca+se shelves or ring&ack,

    /or e.a$pleG

    Memory 

    Controller 

    Hata &+s

  • 8/21/2019 Gervasi Timing

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     Mark Sherwood and Associates All rights reserved Copyright JANUAR

    When Timing-Is-Everything …

    Charge Transfer Model for Non3Monotonic Transitions

    VREF

    VIHAC

     =

    VREF

     + VSAT

    VIHDC

    VILDC

    VILAC

    =

    VREF

     - VSAT

    t'T tINT

    tT

    Accumulated chargereaches m(3ps needed

    to trigger input

    Ring"ac4 hereshould not matter 

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     Mark Sherwood and Associates All rights reserved Copyright JANUAR

    When Timing-Is-Everything …

    Ring"ac4 "elow accumulation threshold

    VREF

    VIHAC

     = VREF

     

    + VSAT

    VIHDC

    VILDC

    VILAC

    =

    VREF

     - VSAT

    t'T

    A5

    A1

    A6

    Charge Accumulation *

    A5 7 A1 , A6

    tINT

    tT

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     Mark Sherwood and Associates All rights reserved Copyright JANUAR

    When Timing-Is-Everything …

    Ne/t 8eneration Models

    * CharacteriFe and co$&ine inp+t types

     7 here t-I# is the sa$e and only t>N# is di//erent

    * More co$ple. geo$etrical area calc+lations

    * More acc+racy in acc+$+lation sat+ration points

    * Non1linearities in charge acc+$+lation

    * Model /or gro+nd &o+nce

    * Model /or power s+pply noise

  • 8/21/2019 Gervasi Timing

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     Mark Sherwood and Associates All rights reserved Copyright JANUAR

    When Timing-Is-Everything …

    Summary

    * Charge #rans/er Model separates inp+t signalcharacteristics 7 Slew rate dependent

     7 Slew rate independent

    * Single ended and di//erential deratedi//erently

    * Matri. derating ta&les needed to handle C#M* Non1$onotonics can &e dealt with

  • 8/21/2019 Gervasi Timing

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     Mark Sherwood and Associates All rights reserved Copyright JANUAR

    When Timing-Is-Everything …

    Call to Action

    * -.tend >!>S $odels with C#M* Need logic analysis tools /or calc+lating

    charge acc+$+lation 7 Acc+$+lation threshold 7 Sat+ration threshold 7 Co$prehend set+p hold ti$ing derating

    * $41ps acc+$+lation area

    * 3ine +p or $ark t#($in) t#($a.)* Single ended vers+s di//erential acc+$+lation

    * 3ooking ahead 7 Algorith$ic acc+$+lation $odel

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     Mark Sherwood and Associates All rights reserved Copyright JANUAR

    When Timing-Is-Everything …

    Than4 9ou