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Digital Circuit Design
Gate-Level Minimization
Lan-Da Van (范倫達), Ph. D.
Department of Computer Science
National Chiao Tung University
Taiwan, R.O.C.
Fall, 2012
http://www.cs.nctu.edu.tw/~ldvan/
Lecture 3
Digital Circuit Design
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Outlines
The Map Method
Four-Variable Map
Five-Variable Map
Product-of-Sums Simplification
Don’t-Care Conditions
NAND and NOR Implementation
Other Two-Level Implementations
Exclusive-OR Function
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The Map Method
Boolean function
sum of minterms
sum of products (or product of sum) in the simplest form
a minimum number of terms
a minimum number of literals
The simplified expression may not be unique
Gate-level minimization refers to the design task of finding an optimal gate-level implementation of Boolean functions describing a digital circuit.
Logic minimization
algebraic approach: lack specific rules
Karnaugh map approach
a simple straight forward procedure
a pictorial form of a truth table
applicable if the # of variables < 7
A diagram made up of squares
each square represents one minterm
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Two-Variable Map
A two-variable map
four minterms
x' = row 0; x = row 1
y' = column 0; y = column 1
a truth table in square
diagram
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Three-Variable Map
Eight minterms
Gray code sequence
Any two adjacent squares in the map differ by only one
variable
e.g., m5 and m7 can be simplified
m5+ m7 = xy'z + xyz = xz (y'+y) = xz
yz
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Example 3.1
F(x,y,z) = S(2,3,4,5) = x'y + xy'
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Three-Variable Map
m0 and m2 (m4 and m6) are adjacent
m0+ m2 = x'y'z' + x'yz' = x'z' (y'+y) = x'z'
m4+ m6 = xy'z' + xyz' = xz' (y'+y) = xz'
yz
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Example 3.2
F(x,y,z) = S(3,4,6,7) = yz+ xz'
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Four adjacent squares
2, 4, 8 and 16 squares
m0+m2+m4+m6 = x'y'z'+x'yz'+xy'z'+xyz'
= x'z'(y'+y) +xz'(y'+y)
= x'z' + xz‘ = z'
m1+m3+m5+m7 = x'y'z+x'yz+xy'z+xyz
=x'z(y'+y) + xz(y'+y)
=x'z + xz = z
Three-Variable Map
yz
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F(x,y,z) = S(0,2,4,5,6)= z'+ xy'
Example 3.3
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Given F = A'C + A'B + AB'C + BC
Express it in sum of minterms => S(1,2,3,5,7)
Find the minimal sum of products expression => F=C+A’B
Example 3.4
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Four-Variable Map
The map 16 minterms
combinations of 2, 4, 8, and 16 adjacent squares
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Simplify the Boolean Function:
F(w,x,y,z) = S(0,1,2,4,5,6,8,9,12,13,14)=y'+w'z'+xz'
Example 3.5
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Simplify the Boolean Function:
Given F = ABC + BCD + ABCD + ABC
=> F = BD + BC + ACD
Example 3.6
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Systematic Simplification
Implicant – a product term of which if the function has the value 1 for all minterms.
A Prime Implicant is a product term obtained by combining the maximum possible number of adjacent squares in the map into a rectangle with the number of squares a power of 2 – remove any literal not a implicant.
A prime implicant is called an Essential Prime Implicant if it is the only prime implicant that covers (includes) one or more minterms.
Prime Implicants and Essential Prime Implicants can be determined by inspection of a K-Map.
A set of prime implicants "covers all minterms" if, for each minterm of the function, at least one prime implicant in the set of prime implicants includes the minterm.
Source: M. Morris Mano and Charles R. Kime, Logic and Computer Design Fundamentals.
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D B
C B
1 1
1 1
1 1
B
D
A
1 1
1 1
1
Example of Prime Implicants
Find ALL Prime Implicants
ESSENTIAL Prime Implicants
C
BD
CD
BD
Minterms covered by single prime implicant
D B
1 1
1 1
1 1
B
C
D
A
1 1
1 1
1
AD
B A
Source: M. Morris Mano and Charles R. Kime, Logic and Computer Design Fundamentals.
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Example of Prime Implicants
Find all prime implicants for:
A
B
C
D
1
13,14,15) ,10,11,12, (0,2,3,8,9 D) C, B, F(A, m S =
1 1
1 1 1 1
1 1 1 1 A
BC
BD
Source: M. Morris Mano and Charles R. Kime, Logic and Computer Design Fundamentals.
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Example of Prime Implicants
Find all prime implicants for:
Hint: There are seven prime implicants!
A
B
C
D
1 1 1
1 1
1 1 1 1
15) ,12,13,14, (0,2,3,4,7 D) C, B, G(A, m S =
Source: M. Morris Mano and Charles R. Kime, Logic and Computer Design Fundamentals.
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Prime Implicants Selection Rule
Find all prime implicants.
Include all essential prime implicants in the solution
Select a minimum cost set of non-essential prime
implicants to cover all minterms not yet covered:
Minimize the overlap among prime implicants as much as
possible.
Make sure that each prime implicant selected includes at
least one minterm not included in any other prime implicant
selected – avoid redundancy.
Source: M. Morris Mano and Charles R. Kime, Logic and Computer Design Fundamentals.
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Selection Rule Example
Simplify F(A, B, C, D) given on the K-map.
1
1
1
1 1
1
1
B
D
A
C
1
1
1
1
1
1 1
1
1
B
D
A
C
1
1
Essential
Minterms covered by essential prime implicants
Selected
Source: M. Morris Mano and Charles R. Kime, Logic and Computer Design Fundamentals.
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Consider
The simplified expression may not be unique
F = BD+B'D'+CD+AD = BD+B'D'+CD+AB
= BD+B'D'+B'C+AD = BD+B'D'+B'C+AB'
( , , , ) (0,2,3,5,7,8,9,10,11,13,15)F A B C D =
Simplification Using Prime Implicants
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Five-Variable Map
Map for more than four variables becomes
complicated. five-variable map: two four-variable map (one on the top of
the other)
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F = S(0,2,4,6,9,13,21,23,25,29,31)=A'B'E'+BD'E+ACE
Example 3.7
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Another Map for Example 3.7
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Relationship between # of Adjacent Squares and # of the Literals
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Product of Sums Simplification
Approach 1: Complement from minterms
Step 1: Simplify F' in the form of sum of products
Step 2: Apply DeMorgan's theorem F = (F')'
=> F': sum of products => F: product of sums
Approach 2: Duality from maxterms
Combinations of maxterms
M0M1 = (A+B+C+D)(A+B+C+D')
= (A+B+C)+(DD')
= A+B+C
CD
AB 00 01 11 10
00 M0 M1 M3 M2
01 M4 M5 M7 M6
11 M12 M13 M15 M14
10 M8 M9 M11 M10
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Given F = S(0,1,2,5,8,9,10)
Approach 1:
Step 1: F' = AB+CD+BD'
Step 2: Apply DeMorgan's theorem; F=(A'+B')(C'+D')(B'+D)
Approach 2: Think in terms of maxterms
Example 3.8
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Implementation of Example 3.8
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Consider the function defined in Table 3.2.
( , , ) (1,3,4,6)F x y z =
In sum-of-minterm:
( , , ) (0,2,5,7)F x y z =
In product-of-maxterm:
Taking the complement of F
( , , ) ( )( )F x y z x z x z =
Truth Table of Function F
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Truth Table of Function F
Consider the function defined in Table 3.2.
Combine the 1’s:
Combine the 0’s :
''),,(' zxxzzyxF =
''),,( xzzxzyxF =
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Don't-Care Conditions
The value of a function is not specified for certain
combinations of variables
BCD; 1010-1111: don't care
The don't care conditions can be utilized in logic
minimization
can be implemented as 0 or 1
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Given F(w,x,y,z) = S(1,3,7,11,15) and d(w,x,y,z) = S(0,2,5)
F = yz + w'x'; F = yz + w'z
F = S(0,1,2,3,7,11,15) ; F = S(1,3,5,7,11,15)
Either expression is acceptable
Example 3.9
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NAND Implementation
NAND gate is a universal gate
can implement any digital system
Two graphic symbols for a NAND gate
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Two-level Implementation
NAND-NAND = sum of products
Example: F = AB+CD
F = ((AB)' (CD)' )' =AB+CD
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( , , ) (1,2,3,4,5,7)F x y z = ( , , )F x y z xy x y z =
Example 3.10
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General Design Procedure
Procedure
1. Convert all AND gates to NAND gates with AND-inverter
graphic symbols.
2. Convert all OR gates to NAND gates with inverter-OR
graphic symbols.
3. Check all the bubbles in the diagram. For every bubble
that is not compensated by another small circle along the
same line, insert an inverter or complement the input literal.
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Multilevel NAND Circuits
Implementing F = A(CD + B) + BC using NAND gate
only
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Multilevel NAND Circuits
Implementing F = (AB +AB)(C+ D) using NAND
gate only
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NOR Implementation
NOR function is the dual of NAND function.
The NOR gate is also universal.
Two graphic symbols for a NOR gate
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Implementing F = (A + B)(C + D)E using NOR gate
only.
Two-level Implementation
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Implementing F = (AB +AB)(C + D) using NOR gate
only.
Multilevel NOR Circuits
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Other Two-level Implementations
Wired logic A wire connection between the outputs of two gates
Open-collector TTL NAND gates: wired-AND logic
The NOR output of ECL gates: wired-OR logic
( ) ( ) ( ) ( )( )
( ) ( ) [( )( )]
F AB CD AB CD A B C D
F A B C D A B C D
= = =
= =
AND-OR-INVERT function
OR-AND-INVERT function
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Nondegenerate Forms
Considering four types of goats: AND, OR, NAND, NOR,
16 possible combinations of two-level forms are
obtained.
Eight of them: degenerate forms = a single operation
The eight nondegenerate forms
AND-OR, OR-AND, NAND-NAND, NOR-NOR, NOR-OR, NAND-
AND, OR-NAND, AND-NOR
AND-OR and NAND-NAND = sum of products
OR-AND and NOR-NOR = product of sums
NOR-OR, NAND-AND, OR-NAND, AND-NOR = ?
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AND-OR-Invert Implementation
AND-OR-INVERT (AOI) Implementation
NAND-AND = AND-NOR = AOI
F = (AB+CD+E)'
F' = AB+CD+E (sum of products)
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OR-AND-Inverter Implementation
OR-AND-INVERT (OAI) Implementation OR-NAND = NOR-OR = OAI
F = ((A+B)(C+D)E)'
F' = (A+B)(C+D)E (product of sums)
simplified F' in products of sum
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Tabular Summary
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Example 3.11
Example 3-11
F' = x'y+xy'+z (F': sum of products)
F = (x'y+xy'+z)' (F: AOI implementation)
F = x'y'z' + xyz' (F: sum of products)
F' = (x+y+z)(x'+y'+z) (F': product of sums)
F = ((x+y+z)(x'+y'+z))' (F: OAI)
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Example 3.11
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Exclusive-OR Function
Exclusive-OR (XOR)
xy = xy'+x'y
Exclusive-NOR (XNOR)
(xy)' = xy + x'y'
Some identities
x0 = x
x1 = x'
xx = 0
xx' = 1
xy' = (xy)'
x'y = (xy)'
Commutative and associative
AB = BA
(AB) C = A (BC) = ABC
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Implement (x'+y')x + (x'+y')y = xy'+x'y = xy
Exclusive-OR Function
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Odd and Even Functions
ABC = (AB'+A'B)C' +(AB+A'B')C
= AB'C'+A'BC'+ABC+A'B'C
= S(1,2,4,7)
An odd number of 1's
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Logic Diagram of Odd and Even Functions
Logic diagram of odd and even functions
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Four-variable Exclusive-OR function
ABCD = (AB’+A’B)(CD’+C’D)
= (AB’+A’B)(CD+C’D’)+(AB+A’B’)(CD’+C’D)
Four-Variable Exclusive-OR Function
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Parity Generation and Checking
Parity Generation and Checking
a parity bit: P = xyz
parity check: C = xyzP
C=1: an odd number of data bit error
C=0: correct or an even # of data bit error
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Parity Generation and Checking
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Conclusions
From this lecture, you have learned the follows:
Four-Variable Map
Five-Variable Map
Product-of-Sums Simplification
Don’t-Care Conditions
NAND and NOR Implementation
Other Two-Level Implementations
Exclusive-OR Function