gate-level minimization gate-level minimization. outline 3.1 introduction 3.2 the map method 3.3...

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Gate-Level Minimization

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Gate-Level Minimization

Gate-Level MinimizationOutline3.1 Introduction3.2 The map method3.3 Four-variable map3.4 Five-variable map3.5 Product of sums simplification3.6 Dont care conditions3.7 NAND and NOR implementation3.8 Other two-level implementation3.9 Exclusive OR functionThe map method

Two-Variable Map

A

Three-Variable Map

Example 3.1

Three-Variable Map

Example 3.2

Three-Variable Map

Example 3.3

F(x,y,z) = (0,2,4,5,6)=z'+ xy'

Example 3.4

Four-Variable Map

Example 3.5

Example 3.6

Systematic Simplification

Example of Prime Implicants

Example of Prime Implicants

Example of Prime Implicants

Prime Implicants Selection Rule

Selection Rule Example

Simplification Using Prime Implicants

Five-Variable Map

Example 3.7F F= (0,2,4,6,9,13,21,23,25,29,31)=A'B'E'+BD'E+ACE

Another Map for Example 3.7

Relationship between # of Adjacent Squares and # of the Literals

Product of Sums Simplification

Example 3.8

Implementation of Example 3.8

Truth Table of Function F

Truth Table of Function F

Don't-Care Conditions

Example 3.9

NAND Implementation

Two-level Implementation

Example 3.10

General Design Procedure

Multilevel NAND Circuits

Multilevel NAND Circuits

NOR Implementation

Two-level Implementation

Multilevel NOR Circuits

Other Two-level Implementations

Nondegenerate Forms

AND-OR-Invert Implementation

OR-AND-Inverter Implementation

Tabular Summary

Example 3.11

Example 3.11

Exclusive-OR Function

Exclusive-OR Function

Odd and Even Functions

Logic Diagram of Odd and Even Functions

Four-Variable Exclusive-OR Function

Parity Generation and Checking

Parity Generation and Checking

Conclusions

The EndThe EndThe EndThe End