fundamental switch mode converter model developmentee00273/images/fundamental_smc_modeli… ·...

37

3

Fundamental Switch Mode Converter

Model Development

This chapter develops the fundamental models necessary to analyze theessential requirements of switch mode power supplies (SMPSs) as noted inChapter 2. The large signal continuous and discontinuous mode models forthe buck and the boost converters are developed. Then the continuous anddiscontinuous mode models are integrated into a single unified model foreach of the buck and boost converters. The unified buck–boost (conventionalflyback converter) and Cuk converter models are next developed. After thedevelopment of these models, an example analysis is provided to illustratethe ease and simplicity that this approach affords in analyzing the perfor-mance of SMPSs.

3.1 Buck and Boost Converter Continuous ModeLarge Signal Models

When a switch mode power converter is modeled, an electrical circuit equiv-alent model of the duty ratio controller must be created when the converteroperates in the continuous mode. From Middlebrook and Cuk,

1

an ideal (ACand DC) transformer equivalent model is conceived and shown in Figure 3.1.The flyback and Cuk converter continuous mode models are in essencecascaded versions of the buck and boost converters and will be dealt withlater.

Converting the ideal transformers to a system of dependent generatorsmakes the models more adaptable to most circuit simulation software.Figure 3.2 shows a SPICE model equivalent. The power converter largesignal continuous mode models are thus implemented in Figure 3.3. See Cukand Middlebrook

4

for more information.

DK_1137.book Page 37 Wednesday, June 15, 2005 11:49 AM

Copyright 2005 by Taylor & Francis Group, LLC

38

Practical Computer Analysis of Switch Mode Power Supplies

3.2 Buck and Boost Converter Discontinuous ModeLarge Signal Models

Now consider the discontinuous mode of operation. From Figure 3.4, theaverage discontinuous mode inductor current,

i

LD

, is expressed by:

(3.1)

FIGURE 3.1

Duty ratio controller ideal transformer.

FIGURE 3.2

Ideal transformer equivalent model.

a) Buck Converter

d C R

Ld’

C

R

+

vg

d : 1

..

L

b) Boost Converter

=

=vg

d

d’

L

C R

L

C

R

+

vg

1 : d

. .+

vg

+

iI

d dLDP= +2 2( )

i3,4

=

+

+1 : d

. .

1

2

3

4

1 3

2 4

F = d x i3,4

E = d x v1,2

VM = 0

i3,4



Fundamental Switch Mode Converter Model Development

39

For the buck converter,

(3.2)

FIGURE 3.3

Power converter continuous mode models.

FIGURE 3.4

Discontinuous mode inductor current.

a) Buck Converter

+

+F = d x iLC

E = d x vg

VM = 0

L

C

R

+

vg

v

iLC

b) Boost Converter

F = d’ x iLC

C

R

+

vg

+

+

E = d’ x v

VM = 0

Lv

iLC

Iv v dT

LPg S=

−( )

d2TPdTP

TP

iLDIP

0

DK_1137.book 9 Wednesday, June 15, 2005 11:49 AM


40


Also, for periodic volt-second balance across the inductor,

or

(3.3)

Substituting Equation 3.2 and Equation 3.3 into Equation 3.1 yields thedesired control equation for the buck converter,

i

LD

:

(3.4)

For the boost converter,

(3.5)

and for volt-second balance

(3.6)

Substituting Equation 3.5 and Equation 3.6 into Equation 3.1 yields thecontrol equation for the boost converter,

i

LD

:

(3.7)

The next step is to develop a large signal discontinuous mode model fromthe previous equations. Figure 3.5 shows buck and boost topologies.

The terms

i

LID

and

i

LOD

are as yet undefined. With the inductor currentstarting and returning to zero during each cycle, there is no cyclical energystorage in the inductor. Its properties as an inductive circuit element arenonexistent at the lower frequencies; therefore it does not appear in themodels.

d v v d vg( )− = 2

d dv v

vg

2 =−⎛

⎝⎜

⎞

⎠⎟

i dv

vv v

TLLD

gg

s= −2

2( )

Iv dT

LPg s=

dv d v vg g= −2( )

d dv

v vg

g2 =

−

⎛

⎝⎜⎜

⎞

⎠⎟⎟

i dvv

v vTLLD

g

g

S=−

⎛

⎝⎜⎜

⎞

⎠⎟⎟

2

2

DK_1137.book 0 Wednesday, June 15, 2005 11:49 AM



41

With this knowledge, the instantaneous or cyclical power into the converteris equal to the instantaneous power out.

(3.8)

For the buck converter,

(3.9)

(3.10)

and

(3.11)

For the boost converter,

(3.12)

(3.13)

FIGURE 3.5

Discontinuous mode large signal models.

iLDiLIDC

R

v

vg +

a) Buck Converter

iLODC

R

v

vg +iLD

b) Boost Converter

p pin out=

p v iin g LID=

p viout LD=

ivv

iLIDg

LD=

p v iin g LD=

p viout LOD=



42


and

(3.14)

Current

i

LID

is the correct input current for the buck converter and

i

LOD

isthe correct output current for the boost converter.

3.3 Buck and Boost Continuous and DiscontinuousMode Unified Models

Now combine the continuous and discontinuous mode models into oneencompassing unified model, which will emulate an actual converter goingfrom one conduction mode to the other as the critical inductor currentboundary is traversed. The schemes depicted in Figure 3.6 and Figure 3.7provide a simple and straightforward way of implementing this model.

A detailed explanation of this topology is now in order. For the moment,ignore the center components of Figure 3.6 consisting of VM2, D1, D2,

i

LID

,and F1. The discontinuous mode current,

i

LD

, is calculated for all prevailingconditions of

d

,

v

g

, and

v

according to Equation 3.4. If the voltage,

E

, issufficiently high to produce an inductor current larger than the value of

i

LD

,diode D3 will then conduct. (Diode D3 is modeled as an ideal diode with aforward voltage drop near 0 V. Section 3.10 discusses this further.) Theconverter is thus in the

continuous

mode with

i

L

>

i

LD

. D3 basically shorts outcurrent source

i

LD

, thus making it appear as though it is not in the circuit.

FIGURE 3.6

Buck converter combined continuous and discontinuous mode model.

iv

viLOD

gLD=

+

+

+

+V

D1

D2

iLID

iLD

E = d x vg

VM1 = 0V

VM2 = 1V F1 = d x iLF2 = ib

iL

L

ibvg

C

R

D3




43

This is appropriate because

i

LD

is a nonexistent fictitious quantity for

i

L

greater than any computed quantity greater than

i

LD

. If circuit conditionschange to lower

i

L

so that

i

L

wants to be less than

i

LD

, D3 will be reversedbiased and the actual inductor current will be

i

LD

. The converter is now inthe discontinuous mode with

i

L

=

i

LD

. Now consider the role of the components VM2, D1, D2,

i

LID

, and F1 thatwere ignored earlier. The circuit made from these components is necessaryto provide the proper input current that is seen as a load on the powersource

v

g

. The circuit is basically a current ORing circuit, with current

i

b

equal to the larger of the two currents F1 or

i

LID

. For example, if current F1 islarger than

i

LID

, nonideal diode D1 will conduct, effectively shorting out

i

LID

,and D2 is reversed biased with

i

b

=

F1. This is the continuous mode case withF2

=

i

b

=

F1

=

d

×

i

L

, which is the correct converter input current in thecontinuous mode. If current F1 decreases below the computed discontinuousmode current,

i

LID

, then

i

b

will be equal to

i

LID

, which is the correct discontin-uous mode current.

Voltage source VM2 is shown in Figure 3.6 as 1 V, but may be any arbitrarypositive value. When a value greater than zero is used for VM2, the voltageat the cathode side of diode D2 will have basically one of two values,depending on the converter conduction mode. This circuit may now also beviewed as a conduction mode detector circuit when monitoring the voltageat the D2 cathode.

Thus, the complete unified continuous and discontinuous mode modelfor the buck converter is shown in Figure 3.6. It can be recognized fromFigure 3.3 and Figure 3.5 that the buck and boost topologies are in essencethe duals of each other; therefore, it can be easily deduced that the modelshown in Figure 3.7 is the correct unified model for the boost topologyby applying the corresponding line of development as for the buck con-verter.

FIGURE 3.7

Boost converter combined continuous and discontinuous mode model.

+

V

F2 = ib

vg

C

R+ +

+

D1

D2

iLOD

iLD

E = d’ x vg

VM1 = 0V

VM2 = 1VF1 = d’ x iL

iL

L

ib

D3



44


3.4 Buck–Boost (Flyback) Converter ContinuousMode Large Signal Model

The buck–boost converter is in essence a cascaded combination of the buckand boost converters (Figure 3.1a and Figure 3.1b, respectively). Figure 3.8shows an equivalent representation of this combination. (See Cuk andMiddlebrook

4

for more detail on this.) Replacing the duty ratio controllingswitches with their equivalent circuit models as developed in Section 3.1,the equivalent continuous mode model is shown in Figure 3.9.

3.5 Buck–Boost (Flyback) Converter DiscontinuousMode Large Signal Model

From the inductor current

waveform of Figure 3.4, Equation 3.1, and thefollowing equations, the average discontinuous mode current,

i

LD

, is deter-mined from Figure 3.8.

(3.15)

FIGURE 3.8

Basic buck–boost (flyback) converter continuous mode topology.

FIGURE 3.9

Buck–boost (flyback) continuous mode model.

d C R

Ld’

vg

d

d’+

v

Iv dT

LPg s=

+

+F1 = d x iLC

E1 = d x vg

VM1 = 0

+vg

R

+

+

E3 = d’ x v

VM3 = 0

L

F3 = d’ x iLC

C

v

iLC




45

Also,

or

(3.16)

Substituting Equation 3.15 and Equation 3.16 into Equation 3.1 yields thedesired control equation for the flyback converter:

(3.17)

When the flyback converter is modeled only in the discontinuous mode,the average inductor current, i

LD

, as indicated in Equation 3.17 is not essen-tial, as shown in Figure 3.10. However, its necessity will be noted whendeveloping the unified model. The equations for

i

LID

and

i

LOD

are easily notedfrom Figure 3.4 and Equation 3.15 and Equation 3.16.

(3.18)

and

(3.19)

FIGURE 3.10

Flyback discontinuous mode model.

dv d vg = 2

d dv

vg

2 =

i d vv

vTLLD g

g s= +⎛

⎝⎜

⎞

⎠⎟2 1

2

iI

dLIDP=2

i d vTLLID gs= 2

2

iI

dLODP=2 2

i dv

vTLLOD

g S=⎛

⎝⎜⎜

⎞

⎠⎟⎟

22

2

iLD

v

iLIDvg +iLOD

C

R

(Transparent)



46P

ractical Com

puter Analysis of Sw

itch Mode P

ower Supplies

FIGURE 3.11Flyback converter continuous and discontinuous mode model.

V

= 4F i Ob

C

R+ +

+

4D

5D

i OL D

d = 2E ’ v x

MV 0 = 3 V

MV 1 = 4 V3F i x ’d = L

i Ob

+

+

+

+

1D

2D

i DIL

i DL

d = 1E v x g

MV V0 = 1

2MV V1 = F1 d = i x L= 2F i Ib

iL

L

i Ib

vg

5D

DK

_1137.book Page 46 Wednesday, June 15, 2005 11:49 A

M

Copyright 2005 by T

aylor & Francis G

roup, LL

C

Fundamental Switch Mode Converter Model Development 47

3.6 Buck–Boost Continuous and DiscontinuousMode Unified Model

Following the same unification procedure as that described in Section 3.3,the basic flyback unified model is shown in Figure 3.11. Note the necessityof including iLD here, although it was unnecessary when the discontinuousmode model was considered alone.

3.7 Cuk Converter Continuous ModeLarge Signal Model

The continuous mode Cuk converter is in essence a cascaded combinationof the boost and buck converters shown in Figure 3.1b and Figure 3.1a,respectively. This is true for the continuous mode, but not necessarily truefor the discontinuous mode. Figure 3.12 shows the equivalent representationof this combination. (See Cuk and Middlebrook4 for more details on this.)Shown in Figure 3.12 is the noninverting equivalent of the classical Cukconverter (Figure 1.8).

It is interesting to note from Cuk6 that the inductor currents iL1 and iL2 aresimultaneously both continuous or both discontinuous and that in the gen-eral case these currents do not individually become zero for the discontin-uous part of their cycles, but rather the sum of iL1 and iL2 becomes zero atthis point of discontinuity (see Figure 3.14). Replacing the duty ratio con-trollers with their equivalent circuit models as developed in Section 3.1, theequivalent continuous mode model is shown in Figure 3.13. The output partof the model may be inverted if desired to reflect the more classical negativeoutput.

FIGURE 3.12Basic boost–buck (Cuk) continuous mode topology.

d C2 R

L1d’

vg

d

+

v

d’

L2

C1

iL1 iL2



48 Practical Computer Analysis of Switch Mode Power Supplies

3.8 Cuk Converter Discontinuous Mode Large Signal Model

From the inductor current waveforms of Figure 3.14 and the following equa-tions, the average discontinuous mode inductor currents iL1D and iL2D aredetermined from the circuit of Figure 3.12:

(3.20)

FIGURE 3.13Boost–buck (Cuk) continuous mode topology.

FIGURE 3.14Cuk converter discontinuous mode inductor currents.

F1 = d x iL1

E1 = d x vC

VM1 = 0V

+vg

R

E2 = d’ x vC

L2

F2 = d’ x iL2

C

iL2

+

+

L1

+

+VM2 = 0V

v

iL1

C1

vC

iI

d d iL DP

11

22= + +( )

IP2

iL2D

IP1

0 V

iL1D

0 V

d2TSdTS

TS

+ i

- i




(3.21)

where

(3.22)

and

(3.23)

For cyclical volt-second balance across L1 and L2,

(3.24)

and

(3.25)

Eliminating vc from Equation 3.24 and Equation 3.25 yields

(3.26)

Now, combining Equation 3.20 through Equation 3.26 yields

(3.27)

and

(3.28)

From Cuk and Middlebrook,3

(3.29)

iI

d d iL DP

22

22= + −( )

Iv dT

LPg s

11

=

Ivd T

LPs

22

2

=

dv d v vg c g= −2( )

d v d v vc2 = −( )

d dv

vg

2 =

i v dv

vTL

iL D gg s

12

1

12

= +⎛

⎝⎜

⎞

⎠⎟ +

i v dv

vTL

iL D gg s

22

2

12

= +⎛

⎝⎜

⎞

⎠⎟ −

i iL L

L LL D

vgv=

−+21 2

1 2




and with cyclical input power equal to cyclical output power,

(3.30)

and

(3.31)

Substituting Equation 3.31 into Equation 3.25 and solving for iL1D yields

(3.32)

where

The discontinuous mode noninverting Cuk converter model is then simplyshown in Figure 3.15 with iL1D indicated by Equation 3.32 and iL2D indicatedby Equation 3.30.

3.9 Cuk Converter Continuous and DiscontinuousMode Unified Model

Again, following the same unification procedure as described in Section 3.3,the basic Cuk converter unified model is shown in Figure 3.16. Note that theoutput stage may be inverted for a positive or a negative output.

FIGURE 3.15Cuk converter (noninverting) discontinuous mode large signal model.

iL1DC

R

v

vg +iL2D

i iv

vL D L Dg

2 1=

i iL L

L LL D

vgv=

−+1

1 2

1 2

i v dTLL D gs

e1

2

2=

LL L

L Le =+1 2

1 2



Fundamental Sw

itch Mode C

onverter Model D

evelopment

51

FIGURE 3.16Cuk converter continuous and discontinuous mode model.

vC

F3 = d x ibO

C1

F2 = d’ x ibI

+

vg+ +

+

D1

D2

iL1OD

E1 = d’ x vC

VM1 = 0V

VM2 = 1VF1 = iL1

iL1

ibI

+

+

+V

D3

D4

iL2ID

E2 = d x vC

VM4 = 0V

VM3 = 1V F4 = iL2

iL2

ibO

C2

R

L1

iL1D

D5

iL2D

D6

L2

DK

_1137.book Page 51 Wednesday, June 15, 2005 11:49 A

M

Copyright 2005 by T

aylor & Francis G

roup, LL

C


3.10 Boost Converter Model Analysis Example

Now create a model of a boost converter as an example to illustrate the easeand simplicity of the technique. Consider the duty ratio controlled boostconverter of Figure 3.17 operating in the constant frequency mode of 75 kHz(a period of Ts = 13.33 µsec).

An equivalent unified PSPICE model is derived from Figure 3.7 and shownin Figure 3.18. The diode, DIDEAL, is modeled as an ideal diode with thecharacteristics shown in Figure 3.19. This ideal diode model uses VF = −1 µVas opposed to a desired value of zero because, in some applications, a zerovalue could be divided into other factors, thus causing the simulation tocrash. This model does not allow this situation and VF is small enough thatthe diode is considered ideal. The ideal diode is here simply generated bya dependent voltage generator and a table function. (See the circuit netlistsin Figure 3.22 and Figure 3.23.) In later chapters, netlists will show otherways of creating this ideal diode. If a simulation convergence problem exists,trying a different type of model creation may sometimes help.

The equations for iLD and iLOD are obtained from Equation 3.7 and Equa-tion 3.14, respectively.

(3.33)

FIGURE 3.17Duty ratio controlled boost converter example.

i dv

LD vvg

=−

⎛

⎝⎜⎜

⎞

⎠⎟⎟

0 0171

2.

0.3 A

0 A

d

d′

+

L390 µH

R(825 Ω, 75 Ω)

C24 µC

vg

LoadCurrent

Pulse

5 mSec




and

(3.34)

Care must be taken in this simulation that v does not drop below vg becausea division by zero may result in Equation 3.33 and cause the simulation tocrash. Although not used here, a LIMIT function may be used in the modelequation for GILD to prevent this if convergence trouble is encountered. (Seethe netlists in Figure 3.22 and Figure 3.23).

The steady state critical inductor current (average inductor current at theboundary between the continuous and discontinuous modes of operation)

FIGURE 3.18Boost converter PSPICE unified model.

VDAC1

+

VDDC0.55

9

+10 11

0

RD1

VD11

(d’)

F21

++ +

+

D1

D2

iLOD

E = d’ x v

VM1 = 0V

VM2 = 0VG1(d’ x iL)

iL

ib

L 390 µH

(iLD)5

8

VGDC11.25

VGAC

XD1DIDEAL

7GILD

v

6

4

3

2

1

0

R (825 Ω, 75 Ω)

ILOAD(Transient

Analysis Only)

C24 µF

+

+

iv

viLOD

gLD=




for this example occurs at

(3.35)

or

(3.36)

Three tests will be conducted on the model to reveal some of its charac-teristics. The first will show the AC response from the duty controller, d, tothe output voltage, v, with the converter operating in the continuous mode(R < RCRIT) for R = 75 Ω. Then, for the second test, the load resistor will beincreased from 75 to 825 Ω, placing the converter in the deep discontinuousmode and examining the AC response under that condition. The third testwill be to examine the effect on output voltage of a transient load current

FIGURE 3.19“Ideal” diode characteristics.

I

V0

VF = -1.0 µV

IV DT

LV S

CRITg s= =2

11 25 0 55 13 332 390

( . )( . )( . )(

µµHH

A)

.= 0 106

RV

D IV

ACRITCRIT

=′

= =250 45 0 106

524( . )( . )

Ω




pulse on the converter forcing it to move from the discontinuous mode(R = 825 Ω) to the continuous mode and back again with a load current pulseof 0.3 A lasting for 5 msec.

The results of these tests are shown in Figure 3.20 and Figure 3.21. Notethe characteristic right-half plane zero for the continuous mode in Figure 3.20.Note that the discontinuous mode AC response of Figure 3.20 is of consid-erably lower bandwidth with a single pole roll-off and also the absence of

FIGURE 3.20Boost converter AC analysis example.

FIGURE 3.21Boost converter load transient analysis example.

60

0d

100 Hz 1.0 KHzFrequency

10 KHz 100 KHz

4020

0−20

−60

−90d

−180d

−270d

P(V (1))

DB(V(1))

GEL

>>

Discontinuous Mode Gain (Rout = 825)

Continuous Mode Gain (Rout = 75)

Discontinuous Mode Phase (Rout = 825)

Continuous Mode Phase (Rout = 75)

40 V

30 V

20 V

0 A0 µ 5 mn 10 mn 15 mn

Time20 mn 25 mn 30 mn

GEL

>>

V(1)

I (ILOAD)

Continuous Mode Underdamped Ringing

?

?




the right-half plane zero. Now observe the results of the load transient testin Figure 3.21. Note that the predictable large signal result of the outputvoltage, v, varies considerably when the inductor current is less than itscritical value of 0.106 A. Also note the expected underdamped ringingaround the continuous mode output voltage value of 25 V.

Numerous other tests — possibly more practical ones — could be easilydevised and conducted on the model to examine easily any large signaltransient or small AC characteristic desired. For reference, the PSPICE™netlists for the AC and transient analysis are shown in Figure 3.22 andFigure 3.23, respectively.

Boost Converter AC AnalysisVGDC 8 0 DC 11.25VGAC 7 8 AC 0L 7 6 390UGILD 6 5 VALUE = (0.017)*PWR(-V(10),2)*(V(1)/((V(1)/V(7))-1))XD1 6 5 DIDEAL**Ideal Diode Model.SUBCKT DIDEAL 1 2EID 3 1 TABLE [V(3,2)] = (-1,1U)(0,1U)(1,1)DIO 3 2 D.ENDS*E 5 4 VALUE = V(11)*V(1)VM1 4 0 DC 0G1 0 3 VALUE = V(11)*I(VM1)GILOD 3 2 VALUE = V(7)/V(I)*I(VMI)D1 0 3 DD2 3 2 DVM2 2 0 DC 0F2 0 1 VM2 1C 1 0 24U*.PARAM RVAL = 1ROUT 1 0 RVAL.STEP PARAM RVAL 75 825 750*VD1 11 10 DC 1VDDC 9 10 DC .55VDAC 0 9 AC 1RD 11 0 1K*.MODEL D D IS = 1N.AC DEC 40 100 100K.PROBE.END

FIGURE 3.22 Boost converter AC analysis example netist.




3.11 Summary

This chapter has developed the fundamental conceptual computer modelsfor the four major pulse width modulated (PWM) power converter topol-ogies. Many unique converter topologies exist, but in most instances theycan be reduced to one in these four major categories. These models acceptinput power, vg, and PWM control, d, to provide output voltage, v, withthe controlling variable, d, controlled directly by some control signal. Theconverters, as depicted, are commonly known as “voltage mode” or “duty

Boost Converter Load Transient AnalysisVGDC 8 0 DC 11.25VGAC 7 8 AC 0L 7 6 390UGILD 6 5 VALUE = (0.017)*PWR(-V(10),2)*(V(1)/((V(1)V(7))-1))XD1 6 5 DIDEAL**Ideal Diode Model.SUBCKT DIDEAL 1 2EID 3 1 TABLE V(3,2) = (-1,1U)(0,1U)(1,1)DIO 3 2 D.ENDS*E 5 4 VALUE = V(11)*V(1)VM1 4 0 DC 0G1 0 3 VALUE = V(11)*I(VM1)GILOD 3 2 VALUE = V(7)/V(1)*I(VM1)D1 0 3 DD2 3 2 DVM2 2 0 DC 0F2 0 1 VM2 1C 1 0 24UROUT 1 0 825ILOAD 1 12 PULSE(0.3 1M 10U 10U 5M)VM3 12 0VD 1 11 10 DC 1VDDC 9 10 DC .55VDAC 0 9 AC 1RD 11 0 1K*.MODEL D D IS = 1N.TRAN 10U 30M.PROBE.END

FIGURE 3.23Boost converter load transient analysis example netist.




ratio-controlled” converters. These models may be used directly as shownin this chapter to obtain first-order analysis results for single output voltageSMPSs. In subsequent chapters, these models will be embedded withinother control schemes to allow for current mode control analysis alongwith more practical expansions. These include multiple outputs and mac-romodels of commercially available PWM integrated circuit controllers.



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