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Freescale Semiconductor General Business InformationFreescale™ and the Freescale logo are trademarks of Freescale Semiconductor, Inc. All other product or service names are the property of their respective owners. © Freescale Semiconductor, Inc. 2004

Freescale Integrated CommunicationsProcessors Presentation


Market share leader in communications processorsMarket share leader in communications processors• Over 185 million units shipped

Continuous innovation and growth• Proven PowerPC processor architecture

• Unsurpassed communications integration

Broad application across the industry• 350+ customers with 5000+ designs

• 10th anniversary of PowerQUICC

Freescale: The Leader in Communications Processors

Microprocessor Report: Analysts’ ChoiceBest High Performance Embedded Processor: MPC8560 PowerQUICCTM III February 2004


e700 Core1500-3000+ MHz

8 – 20W

603e200 – 600 MHz

0.5 -1.2W

PowerPC Core Evolution – Platform Scalability

High Integration

82xx FamilyPCI, SDRAM, CPM

SoCHigher CPU & I/OPerformanceApplication SpecificIntegration

e500400 – 1700 MHz

2.4 – 8 W85xx FamilyIntegrated SoC256K L2, RapidIO

Application SpecificHigher CPU & I/OPerformance

G4800 – 2000 MHz

6 – 15W74xx/745xSIMD256K on-chip L2External 2MB L3

Higher Frequency512K L2100% Pin & S/WCompatibilityMulti-Core

64-Bit PowerPC ISAHigher CPU & I/OPerformanceMulti-Core

e700 Core3000+ MHz

e300 Core667+ MHz

Fully compatiblewith G2/603e

e500 Core1500+ MHz

e600 Core2000+ MHz

Fully compatiblewith G4

e300 PlatformMPC83xx Series




Current Future Product CoreAvailability Plan PlatformsNomenclature


Scalable Performance, Integration & Connectivity

e500 Coree300 Core e600 Core e700 Core

Scalable Connectivity

Integration Structures:• Copper Line• Magenta/SkyBlue Line• OCeaN Integrated Fabric• Coherent System Bus

System Integration:• Bus Controllers• Timers• DMA• Arbiters• Bridges• Interrupt Controllers• GPIO

Memory Controllers:• DDR SDRAM• DDRII SDRAM• SDRAM• Flash, EPROM• SRAM, DRAM

Scalable Integration

Scalable Performance

Mixed Signal:• PLLs/DLLs• D/A, A/D• Clock Data Recovery• TIA, LDD

Network AccelerationInterconnectNetworking Protocols:

• Ethernet (10/100/1000)• Serial (Tx/Rx)• HDLC• T1/E1/T3/E3 (TDM)• ATM (AAL0,1,2,5, IMA)• IP (ML/MC-PPP, PPPmux)• BPON

Security:• Encryption• Authentication• Public Key• RNG• DES/3DES/SHA1

General Peripherals:• USB High/Full/Low speed• USB Full/Low Speed• I2C, DUART

Host Peripheral Bus:• PCI, PCI-X• PCI-Express• PCMCIA• 60x, MPX• Local Bus

System Fabric:• RapidIO• SERDES

Networking:• Utopia• GMII, MII, RGMII, TBI etc.• XAUI

PQ II

PQ II Pro

PQ III

PQ III(90nm)

86xx Integrated Platform

Sca

lab

le C

om

pat

ible

So

luti

on

s

Future PQ


MPC85XX130nm, 90nm533 MHz-1.5GHz e500 CPU333 MHz CPM333 MHz DDR Bus533-667 MHz DDR2 Bus

MPC83XX130nm, 90nm266-667 MHz e300 CPU333 MHz CPM333 MHz DDR Bus

MPC82XX0.29µm, 0.25µm, 130nm200-466 MHz 603e CPU208-300 MHz CPM66-133 MHz Bus

MPC8XX0.32um, 0.18µm50-133 MHz 8XX CPU/CPM40-80 MHz Bus

Time 2002 - 2003 2004 2005+

Per

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MPC860/855T

MPC82XX

MPC860

MPC8XX

MPC862/857T857DSL

MPC866/859T859DSL/852T

MPC8280/82758270

MPC85XX

MPC8560MPC8560

MPC8540MPC8540

Production

Execution

Proposed

MPC8241/8245

MPC8271/8272

MPC8343E

MPC8347EMPC8347E

MPC8349EMPC8349E

MPC8555E

MPC8541E

MPC885/875

MPC8260/8255

MPC8266/8265/82648255/8250

MPC8247/8248

MPC8548E

Future 83xx

Future 83xx

PowerQUICC™ Family Roadmap

MPC83XX

Future 85xx

Future 85xx


MPC8xx PowerQUICC IFamily Update

February 10, 2005

PowerQUICC I


MPC885133 MHz CPU/CPM80 MHz External BusATM, 2X10/100, Security, USB

MPC866/859/852T133 MHz CPU/CPM66 MHz External BusATM Enhancements

MPC862/857T100 MHz CPU/CPM66 MHz External BusATM Enhancements

MPC860/855T80 MHz CPU/CPM66 MHz External BusATM,10/100,HDLC

MPC85080 MHz CPU/CPM50 MHz External BusATM,10BaseT,HDLC, USB

2000 - 2002 2003 2004

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MPC857DSL

MPC862

MPC857T

MPC855T

MPC866

.18µm, 1.8V core,3.3V I/O

.32µm, 3.3V core,5V I/O

MPC860

MPC859

PowerQUICC™ MPC8xx Family Roadmap

MPC859DSL

MPC852T

MPC885

MPC880

MPC875

MPC870

MPC850MPC850


MPC866P – Block Diagram and Features

• Efficient architecture integrates an embedded 8XX core and CPM

• Support for one Fast Ethernet, PCMCIA (for connecting to wireless module, e.g. 802.11b, Bluetooth)

• Four Serial Communication Controllers

• Support for Ethernet, HDLC, ATM, two UARTs, and more…

• Powerful memory controller and system functions

• 0.18um Process Technology• Voltages: 1.8V Core, 3.3V I/O• Frequency: Up to 133 MHz• Power Consumption: 310mw

@133 MHz• Package: 357PBGA, 27x27mm,

1.27mm pitch• Samples and Production available

Communications Processor Module (CPM)

SC

C3

SC

C2

SC

C1

SC

C4

SM

C2

SM

C1

SP

I

I²C

32-bit RISC CPTimer

Baud RateGenerators

4 Timers

Parallel I/O

Serial DMA&

2 Virtual DMAs

8K DPRAM

Serial InterfaceTime Slot Assigner

Embedded MMUs

8KBD-cache

16KBI-cache

MPC8xx Core System Interface Unit (SIU)

Bus Interface Unit

Bus Arbitration

Memory Controllers

Interrupt Controller

PCMCIA

System Reset

Clock Synthesizer

DMAs

FIFOs

10/100Base-TMedia

MII

Fast EthernetController

DMAs

FIFOs

10/100Base-TMedia

MII

MPC866P


MPC866 Family Derivatives Matrix

Performance & Features132 MIPS at 100 MHz, 176 MIPS at 133 MHz310mW at 133 MHz! 110mw at 50 MHz!357-pin PBGA package, 852T is in 256-pin PBGA package866T, 866P, 859P, 859T available at 100 and 133 MHz only859DSL available at 50 and 66 MHz only852T available at 50, 66, 80 and 100 MHz only


MPC866ADS/MPC852TADS Development Systems

• MPC866ADS, MPC852TADS $2995.00 SRP

• MPC866ADS-KIT, MPC852T-KIT $3695.00 SRP

• MPC866, running up to 66 MHz bus frequency, mounted on ZIF

BGA socket.

• Also Supports MPC860 and MPC862 Families

• Board Control & Status Register - BCSR, Controlling Board’s

Operation.

• Ethernet 10BaseT port via SCC1

• Supports Fast IrDA (Upto 4 Mbps).

• Dual RS232 port with Low-Power Option per each port.

• T1/E1 connected to TDMB using external framer for serial

ATM.

• PCMCIA Socket

• Selectable clock source

• On - Board Debug Port Controller with ADI I/F.

• Optional Hard Reset Configuration burned in Flash.

• On-Board High Density Logic Analyzer connectors, supporting

fast connection to HP16500 logic analyzer.

• Soft / Hard Reset Push – Button


MPC866 QUICCstart Evaluation Board

• Freescale MPC866 processor – 50 MHz• RPX Bus provides direct access to the MPC866

bus• 16MB SDRAM (expandable to 128MB)• 8MB Flash (expandable to 32MB)• 1 – 10/100 BaseT Ethernet• 1 – 10 BaseT Ethernet• 2 – RS232 ports• PC/104 mechanical form factor (3.6 by 3.8 inches)• CD-ROM with schematics, reference, and monitor

documentation• PlanetCore on board monitor• DPI/BDM Run Control Interface• Linux BSP available• 30 day Codewarrior eval license• Power Supply & Cables• $495 SRP• Part number – CWDS866EVAL• www.metrowerks.com


MPC885 Family

• The MPC885 Family is a next generation extension to the PowerQUICC I Family

• New Features Include:• Additional Fast Ethernet Controller Block (2 x 10/100) with MII/RMII• Integrated Security• USB • External Bus speed up to 80 MHz

• The MPC885 Family consists of 4 new product to the existing PQ1 family• 870 – 2 10/100 Fast Ethernet Controllers, USB and 1 SMC• 875 - 2 10/100 Fast Ethernet Controllers, USB, 1 SCC, 1 SMC, and HW Encryption• 880 - 2 10/100 Fast Ethernet Controllers, USB, 2 SCC, 2 SMCs, and ATM• 885 - 2 10/100 Fast Ethernet Controllers, USB, 3 SCCs, 2 SMCs, ATM, and HW

Encryption

• Target applications include IAD’s, VPN routers, SOHO routers, Industrial Control and General Purpose Computing.


MPC885 – Block Diagram and Features


SC

C3

SC

C2

SM

C2

SM

C1

US

B

SP

I

I²C

32-bit RISC CPTimer

Baud RateGenerators

4 Timers

Parallel I/O

Serial DMA&

2 Virtual DMAs

8K DPRAM


Embedded MMUs

8KBD-cache

8KBI-cache

MPC8xx Core System Interface Unit (SIU)

Bus Interface Unit

Bus Arbitration

Memory Controllers


PCMCIA

System Reset

Clock Synthesizer

DMAs

FIFOs

10/100Base-TMedia

MII


DMAs

FIFOs

10/100Base-TMedia

MII/RMII

DMAs

FIFOs

10/100Base-TMedia

MII


DMAs

FIFOs

10/100Base-TMedia

MII/RMII

Security

• Efficient architecture integrates an embedded 8XX core, Security engine, and CPM

• Security Engine: AES, DES/3DES, SHA/MD5/HMAC

• Support for two Fast Ethernets (MII or RMII), PCMCIA (for connecting to wireless module, e.g. 802.11b, Bluetooth)

• Three Serial Communication Controllers

• Support for Ethernet, HDLC, ATM, two UARTs, USB and more…

• Powerful memory controller and system functions

• Voltages: 1.8V Core, 3.3V I/O• Frequency: 66/66 MHz, 80/80 MHz,

133/66 MHz• Power Consumption: 430mW @ 133

MHz• Package: 357 PBGA, 25x25mm,

1.27mm pitch• Samples and Production available

MPC885

SC

C4

/U

TO

PIA


MPC885 ADS Development System

• MPC885/MPC880, running up to 80 MHz bus frequency, mounted on ZIF BGA socket.MPC885 is superset part, and can be used to develop for 870, 875, 880 and 885.

• 4 MByte, Un-buffered, Synchronous Dram On-Board.

• 2 MByte Flash SIMM. Support for up to 8 MByte, 5V or 12V Programmable, with Automatic Flash SIMM identification.

• Board Control & Status Register - BCSR, Controlling Board’s Operation.

• Two Fast Ethernet Ports with MII and/or RMII interface support

• USB 2.0 Full/Low speed compatible interface• Ethernet 10BaseT port via SCC3• An infra-Red communication port is provided with

support for Fast IrDA (Up to 4 Mbps).• Dual RS232 port with Low-Power Option per each

port. • T1/E1 connected to TDMA framer for serial ATM.• ATM55 and ATM125 connected to UTOPIA/Adtech

Bus interface• EPP (Enhanced Parallel Port) Debug interface

Kit Includes:

Motherboard, WireTap, Power Supply, 30 day Code Warrior Eval License

SRP $2995


MPC875 QUICCstart Evaluation Board

• Motorola MPC875 processor – 120 MHz• 2 - 10/100M Ethernet Ports• 1 - USB Port• 1 - serial port (SMC)• 8MB flash• 16MB SDRAM• CD-ROM with design, reference, and complete

documentation• RedBoot on-board monitor• Linux BSP• WireTAP™ BDM/DPI Run Control• Power Supply & Cables• $595 SRP• Part number – CWDS875EVAL• www.metrowerks.com


MPC885 Security Core

• Data Encryption Standard Execution Unit (DEU)• DES, 3DES with two key (K1, K2, K1) or

three Key (K1, K2, K3)• ECB and CBC modes for both DES and

3DES

• Advanced Encryption Standard Unit (AESU)• Key lengths of 128, 192, and 256 bits.• ECB, CBC, and Counter modes

• Message Digest Execution Unit (MDEU)• SHA with 160-bit or 256-bit message di

gest , MD5 with 128-bit message digest• HMAC with all algorithms

• Supports IPSec, SSL/TLS, SRTP, and 802.11i protocol processing

• SW compatible with MPC184/MPC185 drivers

FIFO

DEU AESU

FIFO

FIFO

MDEU

Crypto Channel

Controller

8xx Bus /

IF Unit


MPC885 Family Derivatives Matrix

870 875 880 885Performance – CPU/CPM (MHz) 66, 80, 133 66, 80, 133 66, 80, 133 66, 80, 133 – External Bus (MHz) 66, 80, 66 66, 80, 66 66, 80, 66 66, 80, 66

– I Cache (KB) 8 8 8 8

– D Cache (KB) 8 8 8 8

Fast Ethernet Controllers (MII/RMII) 2 2 2 2

CPM Interfaces

– UTOPIA (ATM) 0 0 YES YES

– Multichannel HDLC 0 32 64 64

– SCCs 0 1 2 3

– USB 1 1 1 1

– SMCs 1 1 2 2

– I²C 1 1 1 1

– SPI 1 1 1 1

Integrated Security No YES! No YES!Package 256 PBGA 256 PBGA 357 PBGA 357 PBGASamples Now! Now! Now! Now!Production Now! Now! Now! Now!


MPC82xx PowerQUICC IIFamily Update

February 10, 2005

PowerQUICC II


MPC8280450 MHz CPU300 MHz CPM100 MHz External BusATM,10/100,HDLC,PCI,USB

MPC8272400 MHz CPU200 MHz CPM100 MHz External BusATM,10/100,PCI,USBSecurity

MPC8266300 MHz CPU208 MHz CPM83 MHz External BusATM,10/100,HDLC,PCI

MPC8260200 MHz CPU166 MHz CPM66 MHz External BusATM,10/100,HDLC

2001 2002 2003 2004

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MPC8264

MPC8266

MPC8265

MPC8255

MPC8280

130nm, 1.5V core, 3.3V I/O

.25µm, 1.8/2.0V core, 3.3V I/O

.29µm, 2.5V core,3.3V I/O

MPC8260

MPC8275

PowerQUICC II™ MPC82xx Family Roadmap

MPC8270

MPC8272

MPC8271

MPC8248

MPC8247

MPC8260

MPC8255

MPC8250



Features• 603e core with 16K inst & 16K data

caches• 64-bit 60x bus• 32-bit 33/66 MHz PCI or Local Bus• 3 FCCs supporting HDLC,

10/100 Ethernet, ATM• 4 SCCs, USB, 2 SMCs, SPI, I²C• 8 TDMs supporting up to 256 HDLC

channels for 8 x E1/T1 interfaces or ATM IMA + TC Layer

• Memory controller built from SDRAM, UPM, GPCM machines

Performance (CPU/CPM/Bus)• 450/300/100 MHz (480 TBGA)• 333/250/83 MHz (480 TBGA)• 1.5W @ full performance , 1.5V

Technology• 130nm, 3.3V I/O, 1.5 V Core• 480 TBGA, 37.5x37.5mm, 1.27mm pitch

Availability• General Samples: NOW• Production: NOW

60xBus

PCI/Local

SC

C3

SC

C2

SC

C1

SC

C4

SM

C2

SM

C1

US

B

SP

I

I²C

32-bit RISC CPTimer

Baud RateGenerators

4 Timers

Parallel I/O

MC

C2

MC

C1

FC

C3

FC

C2

FC

C1

Serial DMA&

2 Virtual DMAs

128 KI-MEM (ROM)


32K DPRAM32K I-RAM

Serial Interface

Time Slot Assigner

8 TDM Ports 3 MII/RMII 2 UTOPIA 8/16bit

FPU

TimersJTAG/COP

Classic G2 MMUs

PowerManagement

16KBD-cache

16KBI-cache

603e Core System Interface Unit (SIU)

60x Bus Interface Unit

60x-to-PCI Bridge

Bus Arbitration

Memory ControllersGPCM/UPM/SDRAM


Protection & Configuration

System Reset

Clock Synthesizer

60x-to-Local Bridge

TC Layer

MPC8280



Features• 603e core with 16K inst & 16K data

caches• 64-bit 60x bus• 32-bit 33/66 MHz PCI• 2 FCCs supporting HDLC,

10/100 Ethernet, ATM• 3 SCCs, USB, 2 SMCs, SPI, I²C• 2 TDMs supporting up to 64 HDLC

channels for 2 x E1/T1 interfaces • Memory controller built from

SDRAM, UPM, GPCM machines• Integrated Security - DES/3DES,

MD5/SHA-1, AES, RNG, PKE, ARC4

Performance (CPU/CPM/Bus)• 400/200/100 MHz• 300/200/100 MHz• 266/200/66 MHz (industrial temp

available)• 1.2W @ full performance , 1.5V

Technology• 130nm, 3.3V I/O, 1.5 V Core• 516 PBGA, 27x27mm, 1.00mm pitch

Availability• General Samples: NOW• Production: NOW

60xBus

PCI

SC

C3

SC

C1

SC

C4

SM

C2

SM

C1

US

B

SP

I

I²C

32-bit RISC CPTimer

Baud RateGenerators

4 Timers

Parallel I/O

FC

C2

FC

C1

Serial DMA&

2 Virtual DMAs

80 KI-MEM (ROM)


16K DPRAM4K I-RAM


2 TDM Ports 2 MII/RMII

FPU

TimersJTAG/COP

Classic G2 MMUs

PowerManagement

16KBD-cache

16KBI-cache

603e Core System Interface Unit (SIU)

60x Bus Interface Unit

60x-to-PCI Bridge

Bus Arbitration

Memory ControllersGPCM/UPM/SDRAM


Protection & Configuration

System Reset

Clock Synthesizer

Security

1 UTOPIA 8-bit

MPC8272


MPC8272 Security Core

• Public Key Execution Unit (PKEU) that supports the following:– RSA and Diffie-Hellman with programmable field size up to 2048-bits

– Elliptic curve cryptography, F2m and F(p) modes with programmable field size up to 511-bits

• Data Encryption Standard Execution Unit (DEU)– DES, 3DES with two key (K1, K2, K1) or three Key (K1, K2, K3)

– ECB and CBC modes for both DES and 3DES

• Advanced Encryption Standard Unit (AESU)– ECB, CBC, Counter, and CCM modes

– Key lengths of 128, 192, and 256 bits.

• Message Digest Execution Unit (MDEU)– SHA with 160-bit or 256-bit message digest ,

MD5 with 128-bit message digest

– HMAC with all algorithms

• ARC Four Execution Unit (AFEU)

• Random Number Generator (RNG)

• SW compatible with MPC184/

MPC185 drivers

Control

Bus Master /

Slave Interface

Crypto Channel

Crypto Channel

Crypto Channel

Crypto Channel

FIFO

MDEUAESU

FIFO

FIFO

FIFO

DEU

FIFO

PKEU AFEU

FIFO

FIFO

RNG

FIFO

Control

Bus Master /

Slave Interface

Crypto Channel

Crypto Channel

Crypto Channel

Crypto Channel

FIFO

MDEU

FIFO

MDEUAESU

FIFO

FIFO

AESU

FIFO

FIFO

FIFO

DEU

FIFO

FIFO

DEU

FIFO

PKEU AFEU

FIFO

FIFO

AFEU

FIFO

FIFO

RNG

FIFO

RNG

FIFO


PowerQUICC II™ Family130nm Derivatives Matrix

8247 8248 8271 8272 8270 8275 8280

Performance

– CPU (MHz) 266/300/400 266/300/400 266/300/400 266/300/400 266/333/450 266 333/450

– CPM (MHz) 200 200 200 200 200/250/300 200 250/300

– 60x/Memory Bus (MHz) 66/100 66/100 66/100 66/100 66/83/100 66 83/100

– Local Bus (MHz) NO NO NO NO 66/83/100 66 83/100

– I/D Cache (KB)

16/16 16/16 16/16 16/16 16/16 16/16 16/16

CPM Interfaces

– PCI (MHz) 66/33 66/33 66/33 66/33 66/33 66/33 66/33

– FCCs 2 2 2 2 3 3 3

• MII/RMII (Fast Ethernet) 2 2 2 2 3 3 3

• UTOPIA (ATM) 0 0 1 1 0 2 2

– Multichannel HDLC 64 64 64 64 128 128 256

– SCCs 3 3 3 3 4 4 4

– USB 1 1 1 1 1 1 1

– SMCs 2 2 2 2 2 2 2

– I2C/SPI 1 1 1 1 1 1 1

IMA/TC Functionality NO NO NO NO NO NO YES

Integrate Security NO YES NO YES NO NO NO

• Sample NOW NOW NOW NOW NOW NOW NOW

• Production NOW NOW NOW NOW NOW NOW NOW

• Package 516 PBGA 516 PBGA 516 PBGA 516 PBGA480 TBGA 516 PBGA

516 PBGA 480 TBGA


• Supports all PQ2 Offerings - HiP3/4/7 • Selectable Local Bus or PCI Bus in host mode

– 3 PCI slots (PCI 2.2 compliant)

• Memory (buffered on 60x bus)– 32 MB SDRAM (soldered on-board)– 8 MB Program Flash SIMM (up to 32MByte) – 8 KB EEPROM

• Peripherals – 155 Mbps ATM UNI on FCC1 with optional optical

I/f– Two 100/10-Base-T Ports on FCC2 and FCC3– USB Port– Dual RS-232 port residing on SCC1 and SCC2

• Integrated on-board command converter– Allows for a direct debugger connection– Connects directly to a PC parallel port

• WireTAPTM JTAG/COP Run Control• Offerings

– PQ2FADS-ZU (480 TBGA)– PQ2FADS-VR (516 PBGA)

PowerQUICC II Development System PQ2FADS

Kit Includes:


SRP $2995


MPC8280 QUICCStart Evaluation Board

• Freescale MPC8280ZU processor• 16MB 64 bit wide, SDRAM• 4MB Flash (expandable to 8MB)• 2 – 10/100 BaseT Ethernet• 2 – RS232 ports• PCI Bus Interface & PCI Card Form Factor

for Easy Use & Insertion into PCI slots• Stand Alone Operation or Integrated

Operation in PCI Slot• CD-ROM with design, reference, and

complete documentation• RedBoot on-board monitor• Linux BSP• WireTAP™ JTAG/COP Run Control• Power Supply & Cables• $895 SRP• Part number – CWDS8280EVAL• www.metrowerks.com


MPC8272 Development System MPC8272ADS

Kit Includes:


SRP $2995

• 155 Mbps optical ATM port or 10/100 Base-T Ethernet port on FCC1

• Supports 8-bit Multi-PHY UTOPIA Level 2 with UTOPIA ADTECH interface

• 10/100 Base-T Ethernet port on FCC2• Dual RS232 serial ports• USB compliant port• 3 PCI slots @ 3.3V/66MHz• Parallel port command converter• Logic analyzer (debug) connectors• Differences from PQ27FADS

– Pinout– 64MB SDRAM (60x bus) vs. 32MB – Only two FCCs (no support for two FE = ATM)– 8-bit UTOPIA vs. 8/16-bit UTOPIA – No local bus functionality


MPC8248 QUICCStart Evaluation Board

• Freescale MPC8248 processor, 100 MHz Bus

• 16MB 64 bit wide, SDRAM• 8MB Flash• 2x – 10/100 BaseT Ethernet• 1x – RS232 ports• PCI Bus Interface & PCI Card Edge

Connector (Agent Only)• USB Full Speed• Expansion Connectors• CD-ROM with design, reference, and

complete documentation• Linux and Precise/MQX BSP• WireTAP™ JTAG/COP Run Control• Power Supply & Cables• $895 SRP• Part number – CWDS8248EVAL• www.metrowerks.com


Freescale’s PowerQUICC II/III Processors:Extending Functionality Through Protocol Leadership

603e,e300 and e500 Processor Core(compatible with PowerPC ISA)

FDS, MSP, E-SS7, E2AAL2SSTED, Policer, E-MSP, ML/MC-PPP

AAL0 AAL1 AAL2 AAL5 IMA

Ethernet ATM HDLC SS7TC

Layer

MII UTOPIA TDM GPIO UART

•Software internetworking leadership with extensive multi-protocol support:

• 10/100 Ethernet• ATM• HDLC• Multi-Channel HDLC• IMA• Enhanced SS7 (E-SS7)• Fast Data Switching (FDS)• Multi Service Platform (MSP)• Enhanced MSP• Enhanced AAL2 (E2AAL2)• SSTED• ATM Policer• ML-PPP/MC-PPP


PQII and PQIII Microcodes – Available Now

• Fast Data Switching (FDS) Enables the automatic forwarding of data (ATM or Ethernet) from one FCC to one other FCC, without the need for software intervention. Typical applications: CO Switches, Gateways, Base Stations, Multi-Service Access Platforms, Network Edge

• Multi Service Platform (MSP)Gives customers the ability to handle ATM switching and enables QoS functionality on the PowerQUICC II as well as traffic management features such as billing, queuing, policing, address translation etc. – without host software intervention, significantly lowering the design cost for OEMs. Typical applications: DSLAMs, Access Line Cards, Edge Access Servers

• Enhanced SS7 (ESS7)Enhances the current SS7 (signaling protocol allowing different types of switches to communicate to each other) implementation by adding support for high speed SS7 channels at T1/E1 rates, as defined by ITU-T Q703 Annex A recommendation. Also adds support for the Japanese and Chinese high speed standards.

• Enhanced AAL2 (E2AAL2) - Providing QoS parameters in the host. Enhances the current AAL2 implementation by providing external TQD capabilities, enabling support for 64K VCs. Also supports AAL2 statistics gathering. Typical applications: Voice Switches, Voice Gateways.


PQII and PQIII Microcodes – Beta Versions

• SSTED – Alleviates the CPU from performing AAL2 packet error detectThe SSTED (Service Specific Transmission Error Detection sublayer) microcode builds on the E2AAL2 package, providing support for the next AAL2 layer (SSTED functionality) which adds the SSTED trailer and detects corrupted or lost Packet Data Units.

• ATM Policer – Polices the QoS to ATM cellsImplements the ATM forum’s TM4.1 Virtual Scheduling algorithm – Dual leaky bucket policing scheme– Programmable bundling of multiple VCCs– Guaranteed Frame Rate (GFR) Mode– Typical applications: Routers/Switches (apps where QoS needs to be enforced)

• Enhanced MSP (E-MSP)

Adds the following functionality to the existing MSP microcode:

– Simultaneous Early Packet Discard and Partial Packet Discard

– Enhanced OAM support– Enhanced APC to support PHYs with variable bit rate

– Dynamic channel add/delete

– Dynamic address compression

– Transparent VP switching support in CAM address lookup


3rd Party Custom Microcode Developers

• Arabella Systems– Develops custom microcode packages that can off-load critical functions from the PowerPC CPU-based software, enhancing system throughput.– Custom microcode packages will be integrated with Linux-based software solutions to create comprehensive, highly optimized software systems.

– www.arabellasw.com

• DoGav Systems– Provides various CPM fee based microcode patches for optimization.

– Fast Ethernet Shaper

– VLAN support

– Ethernet Cable Connect/Disconnect Recovery

– CPM Idle Slots

– FCC-Ethernet Time Stamp (dowloadable for free)

– www.dogav.com

• Flextronics – www.flextronics.com

• Windriver – www.windriver.com


Customer Presentation


Freescale: The Leader in Telematics Control Unit Processors

Over 90% of TCU’s Shipped are Based on a Over 90% of TCU’s Shipped are Based on a

Freescale ProcessorFreescale Processor

(Source: Telematics Research Group)(Source: Telematics Research Group)

MPC823e

MPC560

Introducing the MPC5200•Hi Integration/Hi Performance•Extended Temp/Low Power•Long Term Availability

MPC5200


mobileGT: What is it?

Cooperative alliance of key software vendors providing integrated and proven support on the MPC5200-based mobileGT platforms.

•Real Time Operating Systems•Java Virtual Machines•Voice Recognition Engines•Acoustic Echo Cancellation Technologies•Wireless Communications•Graphical Interface Technologies•Navigation software

mobileGT Total5200 Platform


Minimal time configuring key software on an I/O and resource rich platform . This enables:

•Rapid realization of prototypes and field trial units (weeks instead months)

•Easy connection to automotive networks including MOST, CAN and J1850 with on-chip and on-platform technologies

•Well-proven connectivity to key enabling hardware technologies including GPS, cellular, Bluetooth, WLAN and 3D graphics

•One-stop support for the processor, development platform and software including access and support of Freescale developed software I/O drivers

mobileGT: How Can it Help You?


MPC5200/mobileGT: What software is supported?

mobileGT Total5200Real Time Operating Systems•QNX•And others

Voice Recognition/Text to Speech/AEC•Clarity•Fonix•IBM Embedded Via Voice•ScanSoft VoCon3200•SpeechWorks Speechify Solo•Wavemakers

Graphics•eNGENUITY•Tilcon

Navigation•Navigon, etc.

Lite5200 EVBReal Time Operating Systems•QNX•And others

Wireless•Airbiquity•Extended Systems, StoneStreet One


8kB

DP

RA

M

Features603e series PowerPC® Core 16K Instruction and

16K Data CachesDual 32 Entry MMUs

High Speed DDR SDRAM interface256Mbyte addressing range per chip select (2

CS available), 32-bit wide Flexible multi-function external bus

PCI master v2.2, ATA v4 compatibilityBestComm I/O subsystem

Support for PSC, Ethernet, USB 1.1, PCI, ATA, I2C, AC97 & CODEC Interfaces, SPI, CAN

16kB internal SDRAM6 Peripheral Serial Controllers Configurable as

UART, AC97 & CODEC Interfaces, I2S8 Counter/Timers

BDLC-D J1850Superior I/O for Industrial Automation and

Automotive ApplicationsCAN, Serial, USB, J1850 (MOST® on Total5200 Development Board)

Power ManagementSleep and deep sleep modes. ~ 1W @ 400 MHz

Performance:~ 760MIPS (400MHz) at -40° C to 85 C

Package272 pin PBGA, 1.27mm pitch

BestComm

SmartDMA

XLBXLB

BestComm

SmartDMA

IPBIIPBIPCI Controller

ROM/SRAM

ATA/IDE Host Controller

JTAG

PCI Controller

ROM/SRAM

ATA/IDE Host Controller

JTAG

PSC1 PSC2 PSC3PSC1 PSC2 PSC3 J1850I2C

(Two)

CAN 2.0A/B

(Two)

I2C(Two)

CAN 2.0A/B

(Two)SPI

10/100BaseT

Systems Integration Unit

System Functions

Real Time clock

Chip Selects (6)

MemoryController(DRAM)

Interrupt Control

USB(Two)

Systems Integration Unit

System Functions

Counter/Timers/Real Time clock

Chip Selects (8)

MemoryController

DDR or SDR

SDRAM

Interrupt Control

USB(Two)

PSC4 PSC5 PSC6PSC4 PSC5 PSC6

IP BusIP Bus

DP

RA

M16

kBD

PR

AM

MPC5200 Block Diagram

PowerPC 603e Core

16KICache

32 EntryMMU

16KDCache

32 EntryMMU

FPU

400 MHzPowerPC 603e Core

16KICache

32 EntryMMU

16KDCache

32 EntryMMU

FPU


760 MIPS

FPU

DDR MemorySupport

BestCommDMA

ATA

PCI

Ethernet

USBx2

UARTs,SPI

AC97

I2S J1850

CANx2I2C

64MBFlash

64MBSDRAM

MOST

GPUAudio

Subsystem

Total5200 Development Platform

MPC5200•CD ROM•DVD•HDD

•Bluetooth•802.11•Cellular

•GPS, Gyro•Navigation

•Audio DSP

•Radio•SDAR

•Camera Sensors

Add on Modules

+12V

mobileGT Hardware Architecture


mobileGT Software Architecture

Audio

CameraSensors

GPS/Gyro

Bluetooth 802.11 CellularCD/DVD

HDDDisplay

POSIX Compliant RTOS

Middleware (Database, Audio Mgt, etc)

Voice

Recogn

ition

Ech

o C

ancellation

Wireless

Stack

s

G

raph

ics/HM

I B

rowser

Navigation

S

W/

Datab

ases

A

ud

io/Vid

eo C

odecs

GraphicsFLASH

File System

I/O(Serial, USB,

CAN, etc)TCP/IP

Java Virtual MachineAnd Classes

OSGi/SMF

Frameworks

UIML

mobileGT Hardware Platform

CarNtwk

Add-onHardwareModules

HW DevptPlatform

SoftwareDrivers

RTOS

Java/OSGi

Applications/Middleware

mobileGT Software Architecture


Simplified Total5200 Block Diagram

MPC5200

Audio

64MBFlash

LCDCtl

UARTS

MOST

12VTransc

RS232Transc

2 CANTransc

2 USBTransc

10/100Transc 64MB

SDRAM

IrDATransc A

TA

PC104+

CP

LD

3V/5

V

LocalPlus

PC

I

eBu

s

AC’97

I2C


400MHz Total5200 Development Platform• Base unit - 1 DIN Form Factor• 120VAC or 11-14VDC• 64MB SDRAM, 64MB Flash• PC104+(PCI), ATA• 2 CAN, MOST, 2 USB, I2C• 9 UARTs• LCD controller w/ VGA & S-Video• 10BaseT Ethernet• Audio Inputs/Outputs supporting Mic, Bluetooth, Radio, Phone &

Speaker.

Total 5200 Graphics Unit• Detachable, Graphics Touchscreen,• Reconfigurable buttons

Evaluation Software/Tools• QNX Momentics and QNX Neutrino BSP • IBM WebSphere/ J9 Java Virtual Machine with QNX• Metrowerks CodeWarrior and Linux BSP • dBUG - low level debugger & boot loader

Details for Total5200 Development Platform

Mic

1

Lin

e1 (

DS

P)

Mic

2

RS-232

Lin

e2 (

MP

3)

Lin

e3 (

Vid

eo

)

Rad

io

L

Rad

io

R

Blu

eto

oth

™

Pho

ne

Lo

udsp

eak

er

, R

Lo

udsp

eak

er

, L

Hea

dp

hon

e

USBEthernet

CRT

S-Video

BigFoot

1

2

Available NOW


Details for Lite5200 EVB

400 MHz Lite5200 Board

• 160mm x 133mm

• 64MB SDRAM, 16 MB Flash

• PCI, ATA

• CAN (2), USB, I2C (2)

• 1 UART

• 10/100 Ethernet

• All additional MPC5200 I/O available on header connector

• No MOST®, LCD Controller, Graphics Display,

Audio Subsystem• No Integrated 12V Power Support

Lite5200 Software• CodeWarrior 30-day Eval Seat• dBUG - low level debugger & boot loader• Support for QNX and others.

Available NOW


Total5200 Development Platform $5,000•Total5200 Hardware•Complete Total5200 startup CD including QNX drivers, utilities,

and IBM WebSphere/J9 •30 day evaluation copy of QNX Momentics•Freescale P/N: MPCSYS5200EVAL

Lite5200 Evaluation Board Kit $995•Lite5200 EVB Hardware•Evaluation Copies of CodeWarrior, Platform Creation Suite and CodeWarrior

for Embedded Linux•Support for QSSL Momentics/QNX and others. •Metrowerks WireTAP® and Green Hills Slingshot® Probes included•P/N CWMPCEVB5200

MPC5200 Total5200 and Lite5200 Ordering Information


MPC83xx PowerQUICC II ProFamily Update

February 10, 2005

PowerQUICC II PRO


Extends PowerQUICC processor roadmap• Extends PowerQUICC I and PowerQUICC II Families

Powered by the new e300 PowerPC Core

Provides new high-performance functionality• DDR SDRAM• Hi-Speed USB • 10/100/1000 Ethernet • Dual PCI capability• Next generation communications engine

Based on SoC design methodology• Single Architecture for the entire PowerQUICC II Pro family• Easier and faster to develop additional SoC-based family members

targeting emerging markets• SemiCustom IC platform

PowerQUICC II Pro™ Family Goals


New enhanced core (e300) features:• 32-bit PowerPC Classic architecture• Superscalar (3 IPC)• 32KB I/D caches (8 way) with Parity • Classic PPC MMUs• Double precision FPU• On-chip debug support (JTAG/COP)

Power Management• Dynamic power management on decode• Low power static design• Nap and doze and sleep modes

Performance• 667 MHz (1261 MIPS)• 533 MHz (1007 MIPS)• 400 MHz (756 MIPS)

New features:• 32Kbyte Instruction and 32KbyteData

8-way set associative Cache with Parity

• Added performance features (extensions)

• Up to 667MHz operation

• 130nm technology (1.2V operation)

PowerQUICC II Pro™ PowerPC e300 Core

CompletionUnit Dispatch

Unit

BranchUnit

IntegerUnit

GenRegFile

Load/StoreUnit

I MMUD MMU

32K Data Cache 32K Inst. Cache

Bus Interface Unit

Coherent System Bus (CSB)

32bAddress

64bData

GenRe-

name

FloatingPointUnit

FPURegFile

Enhanced version of the 603e PowerPC core used in previous generation PowerQUICC II


MPC8349E – Block Diagram and Features

Features• Integrated e300 core processor

400-667MHz 32K I/D cache

• Memory Controller 32/64-bit DDR 266/333MHz

• Two 10/100/1000 Ethernet MACs• 2x32-bit or 1x64-bit PCI

Up to 66 MHz PCI 2.2, PCI Arbiter Master & Agent mode support

• Local Bus• Integrated QUICC Security - DES/3DES,

MD5/SHA-1, AES, RNG, PKEU, RC4• Two Hi-Speed USB ports

1 port Host, Device, or On-The-Go 1 port Host

• Multi-channel DMA controller• DUART, Dual I²C, Interrupt, GPIO, SPI

Technology• 0.13µm, 1.2V core, 3.3V I/O• Temp Range: 0°C-85/105°C, -40°C-105°C• 672 TBGA – 35x35 mm, 1mm pitch• Estimated ~1.3W @533MHz

Availability• Alpha Samples Now• General Samples Q2 2005• Production Q3 2005

DuartDual I2CTimersGPIOSPI

e300 core32KB

D-Cache32KB

I-Cache

DDRControllerLocal Bus

10/100/1000Ethernet

PCI

10/100/1000Ethernet

USBHi-Speed

Host Device

InterruptController

QUICCSecurity

MPC8349E

DM

APCI


MPC8349E Family Features Comparison

MPC8349E MPC8347E MPC8343ECore e300 e300 e300

CPU Speed Up to 667MHzUp to 667MHz (TBGA)Up to 400MHz (PBGA)

Up to 400MHz

L1 I/D Cache 32KI/32KD 32KI/32KD 32KI/32KD

Memory Controller 64/32 bit DDR 64/32 bit DDR 32 bit DDR

Local bus Yes Yes Yes

PCI2-32Bit up to 66MHz OR

1-64bit up to 66MHz1-32Bit up to 66 MHz 1-32Bit up to 66 MHz

Ethernet 2-10/100/1000 2-10/100/1000 2-10/100/1000

USBHi-Speed

Host, Device, & OTGHi-Speed

Host, Device, & OTGHi-Speed

Host, Device, or OTGQUICC Security E version only E version only E version only

UART Dual Dual Dual

I2C Dual Dual Dual

SPI Yes Yes Yes

Int. Controller Yes Yes Yes

Est. Core Power ~1.3W @ 533MHz ~1.1W @ 400MHz ~0.8W @ 266MHz

Package 672 TBGA (35x35) 1mm pitch672 TBGA (35x35) 1mm pitch 620 PBGA (29x29) 1mm pitch

620 PBGA (29x29) 1mm pitch

Initial Samples Q1-05 Q1-05 Q1-05

General Samples Q2-05 Q2-05 Q2-05


MPC8349E Family QUICCstart Development Board (QS)

QUICCstart Features• MPC8349E processor @533MHz• 256MByte DDR-1 333MHz w/ECC• 64-Bit PCI Edge Connector (3.3V & 5V)• Two RJ-45 G-Ethernet ports• USB2.0 High Speed Device/Host/OTG

port• Dual RS232 ports• Local Bus Interface with

• 8Mbyte Flash (expandable)• Board Control and Status Registers

(BCSR) in FBGA• Riser Connectors to Platform I/O Board• JTAG Debug Port• I2C port with

• 256Kb EEPROM• Real-Time Clock (RTC)• SODIMM SPD EEPROM

• PCI add-in standard card form factor (321x106mm2)

MPC8349E

300-pin FCI Riser Connector

Bus Switch for Voltage Clamp

RJ-45

TSEC2, USB, I2Cx2, UARTx2, Buffered Local Bus

CLOCK

RJ-45 10

POWER Supply

ULPI Mini-AB recept

A. Latch

32bit

FLASH 8MB 16bit

1.2V Core

2.5V DDR

1.25V DDR

3.3V Com

I2C1 Bus

EEPROM 256Kb

RTC

LEDs

COP 16-pin

RTC Back

LBI

32/64-bit PCI Universal Edge Connector

SODIMM DDR 256MByte @ 333MHz

RJ-45 D. Buffer

A. Buffer

USB2.0 Transceiver

From JTAG

I2C


LL L R 5V IN

LL, R part 2 SPD

EEPROM x2

BCSR

Config DIP-Switch

10/100/1000

Ethernet PHY

Double RS232

From IO Board

The QUICCstart board can be used• Standalone (5V external power supply)• PCI add-in Card (PC powered)• Plugged into Platform I/O board (PIB) (powered by PIB)

Available with Silicon$1395 SRP (MPC8349E-QS-SKT)


MPC8349E Family Application Development Board (FADS)

8349E FADS Additional Features:• PCI Host mode (w/ PCI PMC card)• 2nd USB Port (w/ USB PMC card)• Optical Ethernet phyPlatform I/O Board Features:• AdvancedTCA form factor• 4 PMC slots• 1 x 10/100/1000 Ethernet• 4 x 10/100 Ethernet • Two PMC for ATM modules with

ADTEC connectors. • One PMC for USB• One PMC for SLIC-SLAC module

card.• Expansion connectors for TCOM &

CE signals. • Logic analyzer connectors for all CE

signals• $2495.00 SRP (MPC83XX-PIB)

83xx Platform I/O Board (PIB)

PMC 1 PMC 2 PMC 3 PMC 4

TCOM/ECOM

8349E QUICCstart Board (QS)

The FADS is comprised of a 8349E QUICCstart board + 83xx Platform I/O Board + PCI PMC card

MPC8349E


Bus Switch for Voltage Clamp

RJ-45

TSEC2, USB, I2Cx2, UARTx2, Buffered Local Bus

CLOCK

RJ-45 10

POWER Supply

ULPI Mini-AB recept

A. Latch

32bit

FLASH 8MB 16bit

1.2V Core

2.5V DDR

1.25V DDR

3.3V Com

I2C1 Bus

EEPROM 256Kb

RTC

LEDs

COP 16-pin

RTC Back

LBI

32/64-bit PCI Universal Edge Connector

SODIMM DDR 256MByte @ 333MHz

RJ-45 D. Buffer

A. Buffer

USB2.0 Transceiver

From JTAG

I2C


LL L R 5V IN

LL, R part 2 SPD

EEPROM x2

BCSR

Config DIP-Switch

10/100/1000

Ethernet PHY

Double RS232

From IO Board

Available Q205$3795 SRP (MPC8349E-FADS)


MPC85xx PowerQUICC III Family Update

February 10, 2005

PowerQUICC III


603e Core

e500 Core

G4 Core

MPC74xx Series





MPC85xx Series

MPC82xx Series

e700 Core3000+ MHz

32/64-bit

e300 Core667+ MHz

32-bitFully compatible

with 603e/G2

e500 Core1500+ MHz

32-bit

e600 Core2000+ MHz

32-bitFully compatible

with G4

Common SoC PlatformsScalable Performance - Low to

High

Key features:• Integrated L1/L2 Cache

– 32K Instruction & Data – Up to 512K L2– L1/L2 Hardware Coherency– L2 configurable as SRAM

• Added performance features (extensions)

• Planned >1GHz operation• 130nm & 90nm technology

PowerQUICC III PowerPC e500 Core

Freescale’s e500 core is aimed at embedded applications e500 is a high-performance core• e500 provides key embedded functionality• Cache locking, fast interrupt response, fault robustness, performance monitoring


PowerQUICC III SoC Platform Architecture

Multi-core Ready

Hierarchical on-chip buses

• Memory Coherency (in HW)

• Support Out-of-order Transfers:

Accesses to slow peripherals do not

block DDR memory accesses.

e500 Coherency Module

• Only coherent I/O traffic Snooped

up to Processor(s)

• CPU access of L2-cache

concurrent w/ Non-coherent I/O

transfers to/from memory.

• Speculative Reads from CPU(s) to

DDR only when Queue empty.

Switch fabric supports peer-

to-peer traffic concurrent w/

CPU & I/O memory accesses.

128bit Read

128bit Write

64bit Read

L2Cache /SRAM

e500 Core

32K I-Cache

32K D-Cache

IP-Bus Buffers

e500 core

32K I-Cache

32K D-Cache

Potential

e500 Cores

32K I-Cache

32K D-Cache

Memory Coherency Module

Local

Bus

CPM

DUART

I2C 10/100Enet

CustomIP

GigabitEthernetGigabit

Ethernet

Dual PCIPCI-X

PCI Express

CustomIP

DM

A

Rap

id IO

64b DDR/ DDR2 SDRAM

Controller

Qu

eue

Potential64b DDR/

DDR2 SDRAMController

Qu

eue


MPC8560

e500 Core• 667 MHz up to 1 GHz

• 32K L1 I-Cache, 32K L1 D-Cache

• 256K unified L2 cache

CPM• Specialized RISC 333 MHz• 3 Fast Communication Channels (FCC):

ATM -> OC-3, 10/100 Mbit/s Ethernet, E3/T3 HDLC/transparent operation

• 2 Multi-channel Communications Controller 256 channels of HDLC/transparent

• Time Slot assigner channels 8 physical links of up to 16 Mbps or 2 channels of T3/E3

• 4 Serial Communication Channels (SCC) HDLC, HDLC bus, transparent mode, UART, Bisync,

Appletalk/Localtalk

• 8 channel ATM TC layer

• SPI, I2C

2x10/100/1000 MAC (MII/GMII/TBI/RGMII/RTBI)

DDR Memory Bus - (2.5V I/O)• 133-166MHz bus (266-333MHz data rates)

Local Bus - (3.3V I/O)• 32-bit local bus with memory controller

• Muxed address/data

• PCI-X - (3.3V I/O)– 32-/64-bit PCI/PCI-X with int. PCI

arbiter

• RapidIO– 8-bit interface, LVDS I/O 500 MHz

• 0.13um Process Technology

• 783 FC-PBGA Package (Flip Chip on PBGA)

MPC8560

GigabitEthernet

GigabitEthern

et

Rapid IO

Perf Mon

DUART2x I2CTimers

Local

BusOpenPI

C

Coherency Module

DM

A

64b DDR/ SDRAM

Controller

PCI

PCI-X

256KL2

CPM

e500 core

32K I-Cache

32K D-Cache


MPC8540

e500 Core• 667 MHz up to 1 GHz

• 32K L1 I-Cache, 32K L1 D-Cache

• 256K unified L2 cache

2x10/100/1000 MAC (MII/GMII/TBI/RGMII/RTBI)

1x10/100 (MII)

DUART

DDR Memory Bus - (2.5V I/O)

• 133-166MHz bus (266-333MHz data rates)

Local Bus - (3.3V I/O)• 32-bit local bus with memory controller

• Muxed address/data

PCI-X - (3.3V I/O)

• 32-/64-bit PCI/PCI-X with int. PCI arbiter

RapidIO

• 8-bit interface, LVDS I/O 500 MHz

Technology • 0.13um Process Technology

• 783 FC-PBGA Package (Flip Chip on PBGA)

MPC8540 Rapid IO

DM

A

PCI

PCI-X

Perf Mon

DUART2x I2CTimers

GigabitEthernet

GigabitEthern

et

10/100Ethernet

Local

BusOpenPI

C

Coherency Module

64b DDR/ SDRAM

Controller

256KL2

e500 core

32K I-Cache

32K D-Cache


MPC8555E

e500 core (up to 833 MHz)• 0.13um bulk technology

• 32KB Level 1 Caches

• 256KB L2 Cache

Features• Up to 333 MHz 64b DDR SDRAM

• 2x 10/100/1000 Ethernet Controllers

• 2x 32bit / single 64b PCI

• DUART, I2C

• Integrated QUICC Security

CPM (as in MPC8272)• 3 SCCs, USB, 2 SMCs, SPI, I2C

• Two FCCs supporting ATM (up to 55 Mbps) or 10/100 Ethernet

• 2x 8bit Utopia Level-2 interface

• 2 TDMs supporting up to 64 HDLC channels for 2 x E1/T1 interfaces

Samples: NOW

Production: 1Q05

MPC8555E

Local

BusOpenPI

C

Coherency Module

64b DDR/ SDRAM

Controller

256KL2

e500 core

32K I-Cache

32K D-Cache

Perf Mon

DUART2x I2CTimers

GigabitEthernet

GigabitEthern

et

CPM

DM

A

32b/64bPCI

32 b

PCI

QUICCSecurity


MPC8541E

e500 core (up to 833 MHz)• 0.13um bulk technology• 32KB Level 1 Caches• 256KB L2 Cache

Features • Up to 333 MHz 64b DDR SDRAM• 2x 10/100/1000 Ethernet

Controllers• 2x10/100 Ethernet Controllers,

SPI, and I2C using CPM• 2x 32bit / single 64b PCI• DUART, I2C• Integrated QUICC Security

Samples: NowProduction: 1Q05

MPC8541E

Local

BusOpenPI

C

Coherency Module

64b DDR/ SDRAM

Controller

256KL2

e500 core

32K I-Cache

32K D-Cache

QUICCSecurity

DM

A

32b/64bPCI

32 b

PCI

Perf Mon

DUART2x I2CTimers

GigabitEthernet

GigabitEthern

et

CPM Lite

(Ethernet SPI, I2C

only)


Easy Software Migration Path from Existing Freescale Security Device Drivers

MPC8555 and MPC8541 Security Core Block Diagram

On-ChipSystem

InterfaceControl

FIFO

crypto-channel

PKEU DEU AESU AFEUMDEU RNG

crypto-channel

crypto-channel

crypto-channel

FIFO

FIFO

FIFO

FIFO FIFO

FIFO FIFO


MPC8555E and MPC8541ESecurity Core Features

Protocols supported:• IPSec: VPN

• SSL/TLS: VPN/server

• iSCSI/FCIP: storage

• SRTP: real-time media

• IKE: public key

• 802.11i: wireless LAN

Public Key features:• RSA: 80 - 2048 Bit Modulus

• Elliptic Curve Cryptography – F(2m) & F(P) modes

– 55-511 Bit Field Size

Authentication• MD-5, SHA-1, SHA-256

• All with HMAC

Bulk data encryption:• DES/3DES – 56/112/168 bit keys

– ECB, CBC modes

• AES: 128/192/256 bit keys– ECB, CBC, CCM, and CTR modes

• ARC-4: 40 to 128 bit keys

Hardware Random Number Generator

Master/slave interface • 64 bit, up to 166 MHz

Concurrent processing on all the modules


PowerQUICC III Product Status

• MPC8560 and MPC8540MPC Qualification NOWProduction NOWReference Boards NOW1GHz Samples NOW

• MPC8541E and MPC8555EGeneral Sampling NOWMPC Qualification NOWProduction Ramping NOWReference Boards NOW1GHz Samples NOW

• Freescale’s ongoing commitment: higher levels of integration & performance – see our 90nm Roadmap


Power measurements shown are with VDD = 1.2V, TA= 70 ° C / TJ= 105 ° C

PowerQUICC III Processor Power


PQIII Family Feature Matrix


PQIII Next Generation 90nm Products


PowerQUICC III 90nm Platform

Enhanced e500 core

32KBI-Cache

32KBD-Cache

512KBL2


EthernetGigabitEthernetGigabit

Ethernet

32b

PCI /

64b

PCI-X

Perf MonDUART2x I2CTimers

LocalBus OpenPIC Coherency Module

DM

A

QUICCSecurity

64b DDR/ DDR2 SDRAM

Controller

SRIO

/PC

I-Exp

ress

32b PCI


PowerQUICC III Platform ExtensionsOptimized to Satisfy Evolving Customer System Requirements

• High-performance e500 PowerPC core complex scaling from 800 MHz up to 1.5GHz, initial offerings up to 1.33GHz

• Enhancements include:

• 36bit physical addressing

• Double precision floating point support

• - 512KB L2 Cache

• - Configurable as Cache or SRAM with 64KB block granularity

• - I/O transaction can be stashed into L2 cache regions

• Superior levels of memory bandwidth• Double the internal bandwidth with buses running at up to 667MHz clock rate• Legacy support for DDR1 and next-generation memory interfaces

DDR2/FCRAM1/FCRAM2 up to 333MHz clock rate/667MHz data rate w/ECC• Freescale’s 90 nanometer (nm) silicon-on-insulator (SOI) copper

interconnect process technology


• Functional enhancements

• Four on-chip three-speed Ethernet controllers (Enhanced TSEC) supporting 10- and 100-Mbps, and 1-Gbps Ethernet/802.3 networks with MII, RMII, GMII, RGMII, RTBI, and TBI physical interfaces.

•IP header checksum and TCP/UDP payload check sum acceleration

•Advanced QoS features

•8/16b FIFO-mode

• Integrated QUICC Security with support for DES, 3DES, MD-5, SHA-1/SHA-2, AES, RSA, RNG

• Kasumi encryption algorithm, used in 3G wireless security

• XOR acceleration used in storage applications for error correction

• High-speed Interfaces while maintaining legacy interface support

• x4/x1 Serial RapidIO

• x8/x4/x2/x1 PCI-Express

• 2x 32b-PCI or 1x 64b-PCI(X)

PowerQUICC III Platform ExtensionsOptimized to Satisfy Evolving Customer System Requirements


MPC8548E Product Solution for Networking, Telecom and Wireless Infrastructure

• e500 PowerPC core (1.2-1.5GHz)• 90nm• Initial offerings up to 1.33GHz• 512KB L2 Cache w/ ECC• 36bit physical addressing

• System unit• 64b DDR/DDR2/FCRAM1/FCRAM2 up

to 333MHz clock rate or up to 667MHz data rate w/ECC (initial offerings up to 533MHz data rate)

• 4x 10/100/1000 w/Checksum Offload, QoS, header parsing, packet classification and 8/16b FIFO-mode (up to 3.2Gbps)

• 2x 32b-PCI or 1x 64b-PCI(X)• DUART, 2x I2C, Timers• Integrated QUICC Security (up to

1Gbps)•Support for Kasumi algorithm

• High-speed interfaces• x4,x1 Serial RapidIO (20Gbps)• Or x8,x4,x2,x1 PCI-Express (32Gbps)• Or x4 Serial RapidIO and x4 PCI-

Express (36Gbps)• Local Bus - (3.3V I/O)

• 32-bit for SDRAM/ Boot Flash/ CompactFlash card

MPC8548E

e500 core

32KBI-Cache

32KBD-Cache

512KL2


EthernetGigabitEthernetGigabit

Ethernet

32b P

CI /

64b

PCI-X

Perf MonDUART2x I2CTimers

LocalBus

OpenPIC

Coherency Module

DM

A

QUICCSecurity

64b DDR/ DDR2 SDRAM

Controller

Ser

ial R

apid

IO/

PCI-Ex

pre

ss

32b PCI

Samples: 2Q05Production: 1Q06


Hardware Acceleration to Layer 4

Optimizes CPU performance on TCP/IP• TCP/IP checksum offload Rx + Tx

• IPv6 support in hardware

QoS support for 16 hardware queues (8 Rx + 8 Tx)• Customizable per-packet filing/filtering

• 802.1p, IP TOS, Diffserv classification

• Support for weighted fair queuing

• TCP/UDP port-based flows

• Assist firewall through IP/TCP/UDP reject

• Ethernet preamble sorting and insertion

FIFO I/F to ASICs + (R)GMII/(R)MII/(R)TBI• 8/16-bits @ OC-48 rates (200MHz)

Layer 2 features• VLAN insertion and deletion per frame

• 16 exact-match MAC addresses

Code compatible with PowerQUICC III™

10/100/1GMAC

TCP/IPOffload

Quality ofService Tx

FIFO

DMAGig-E Controller 1

10/100/1GMAC

TCP/IPOffload


FIFO


10/100/1000MAC

16b FIFOInterface

TCP/IPOffload

Quality ofServiceRx

FIFO2kB

TxFIFO10kB

64b DMAGig-E Controller 3

10/100/1000MAC

16b FIFOInterface

TCP/IPOffload

Quality ofServiceRx

FIFO2kB

TxFIFO10kB



PQIII Ethernet Based Products


MPC8548E QUICC SecurityExpanded and Improved Protocol Support

Control

Internal

Bus

Interface

(master/

slave)

Crypto

Channel

Crypto

Channel

Crypto

Channel

Crypto

Channel

FIFO

DES

3DES

FIFO

Public

Key

SHA-1

SHA-2

MD5

FIFO

FIFO

ARC4

FIFO

FIFO

RNG

FIFO

AES

FIFO

In Snoop

Out Snoop

Control

Internal

Bus

Interface

(master/

slave)

Crypto

Channel

Crypto

Channel

Crypto

Channel

Crypto

Channel

Crypto

Channel

Crypto

Channel

Crypto

Channel

Crypto

Channel

FIFO

DES

3DES

FIFO

FIFO

DES

3DES

FIFO

Public

Key

SHA-1

SHA-2

MD5

FIFO

SHA-1

SHA-2

MD5

FIFO

FIFO

ARC4

FIFO

FIFO

ARC4

FIFO

FIFO

RNG

FIFO

AES

FIFO

FIFO

AES

FIFO

In Snoop

Out Snoop

FIFO

ARC4

FIFO

FIFO

KEU

FIFO

Kasumi Execution Unit (KEU)

Supports the following algorithms:

•F8 , F9 as required for 3GPP

•A5/3 for GSM and EDGE

•GEA-3 for GPRS

Processing latency for 64B packet estimated to be 3.3 x 10-7. Raw performance 1.5Gbps.

Improved SSL support

Single pass SSL processing

Support for SSL 3.0 MAC (Message Authentication Code)

Note:

Freescale’s inclusion of Kasumi acceleration does not provide pass through licensing to wireless infrastructure manufacturers. The user of Kasumi functionality must obtain a license from Mitsubishi prior to implementing these algorithms.

2x Increase in Raw Performance!


Next-Generation Gigabit Access Controller

Optimizes CPU performance on TCP/IP• TCP/IP checksum offload Rx + Tx• IPV4 / IPv6 support in H/W

QoS support for 16 H/W queues (8 Rx + 8 Tx)• Customizable per-packet filtering/filing to 64

logical receive queues• 802.1p, IP TOS, Diffserv classification• Support for weighted fair queueing• TCP/UDP port-based flows• Assist firewall through IP/TCP/UDP reject• Ethernet preamble sorting and insertion

FIFO I/F to ASICs + (R)GMII/(R)MII/(R)TBI• 8/16-bits @ OC-48 rates and above

Layer 2 features• VLAN insertion and deletion per frame• 16 exact-match MAC addresses

Code compatible with PQ-III Gigabit Ethernet controllers

10/100/1GMAC

TCP/IPOffload


FIFO


10/100/1GMAC

TCP/IPOffload


FIFO


10/100/1000MAC

TCP/IPOffload


FIFO10kB


10/100/1000MAC

16b FIFOInterface

TCP/IPOffload

Quality ofServiceRx

FIFO2kB

TxFIFO10kB



The RapidIO Fit

Serial Local Bus(10+ end-points)

Switched Interconnect

Parallel Local Bus

Fabric (50K+ end-points)

PCI-X

PCIExpress

ASI

Ethernet

RapidIO

LAN/WAN (billions of end-points)

IPv4/IPv6, 48-bit MACaddress

Hundreds of classes, millions of flows, end-to-end flow control, interworking

Message passing, architectural/ topological independence, one flow, protocol tunneling

Serialized Input/Output Transactions/DMA

Parallel Input/Output Transactions/DMA

Interconnect Use Characteristics


MPC86XXe600 Single/Dual Core Update

February 10, 2005


Sequencer Unit

CompletionUnit

Instruction Fetch Branch Unit

BHT /BTIC

GPR IssueAltiVec™ Issue FPR Issue

DispatchUnit

CFX SFX0 SFX1

CO

MP

LE

X

SIM

PL

E

AltiVec™ Engine

PE

RM

UT

E

SFX2

FPRs

RenameBuffers

FPULSU

GPRs

RenameBuffers

32KBInstruction

Cache

VRs

RenameBuffers

32KBData

Cache

FL

OA

T

e600 PowerPC® Core Block Diagram

32-bit PowerPC® processor architecture • Millions sold

• All software-compatible

Improvements• L2 cache increase to 1MB

• L2 with ECC

• AltiVec™ out-of-order transactions

• Addition of a second cacheable store miss

SMP support• MESI cache coherence

• InterventionBus Interface

Unit

Unified L2 Cache

1MB


MPC7447A

Higher Performance – Highest EEMBC benchmarks to date• 1420MHz to the embedded specification and

reliability requirements• 1167MHz at 1.1 core voltage at 9.3 watts• 600MHz at 1.1 core voltage at 5.2 watts

Lower Power – Enhanced thermal power management• Ability to de-rate core voltage from 1.3 to 1.0 volt.• Dynamic Frequency Switching enables software

control of frequency – 40-45% power savings• Temperature Sensor Diode allows the monitoring of

junction temperature for management of system power

Cost-effective – A true “drop-in” high performance processor


MPC7448

Compatibility• Software compatible with 7447A• Pin-to-pin compatible with 7447A

Apps note AN2656 describes how to handle differences in power supplies and bus multipliers

New Features• L2 increased to 1MB• L2 optionally protected by ECC with SECDED• MPX bus up to 200MHz• Out-of-order Altivec instructions supported• Increased flexibility for dynamic frequency shifting

Performance, Power• Specification N Spec L Spec• Frequency (GHz) 1.4 - 1.5 1.7 - 1.8• Voltage 1.0 1.1• Power (W, typ) <10 15

Technology• 90nm 9LM-Cu CMOS-SOI• Package: 360 HiCTE BGA

Schedule• Alpha: Dec 04• Engineering samples: Q1-05• Production: Aug 05


0 200 400 600 800 1000

500.6 (with AltiVec)

41.4

46.7

135 (with AltiVec)

819.8

245.1IPmark™

TCPmark™

Netmark™

Telemark™

®

MPC7447A Processor Benchmarks

• IPmark and TCPmark reflect new Networking Version 2.0 scores• AltiVec optimized benchmarks show up to 12 time faster processing• Telemark score with AltiVec outperforms TI C64-720 DSP with optimized C


Comparing Telecom Optimizations

0 100 200 300 400 500 600 700

TMS320C6416-720

TMS320C6416-720_opt

TMS320C6416-720_assy

MPC7447-1.3G

MPC7447-1.3G_AltiVec

MPC7447-1.3G_NewAV

MPC7447-1.3G_AVassy

"Out-of-the-box" Freescale G4+

"Out-of-the-box" TI DSP

C-only optimizations

Assembly optimizations

Original C-only AltiVec optimizations

Improved C-only AltiVec optimizations

Assembly AltiVec optimizations

4.3X

11X

13X

0.5X

Details at www.eembc.org

Comparing Telecom Optimizations

0 100 200 300 400 500 600 700

TMS320C6416-720

TMS320C6416-720_opt

TMS320C6416-720_assy

MPC7447-1.3G

MPC7447-1.3G_AltiVec

MPC7447-1.3G_NewAV

MPC7447-1.3G_AVassy

EEMBC Telemark™

"Out-of-the-box" Freescale G4+

"Out-of-the-box" TI DSP

C-only optimizations

Assembly optimizations

Original C-only AltiVec optimizations

Improved C-only AltiVec optimizations

Assembly AltiVec optimizations

4.3X

11X

13X

0.5X


Vectorized Standard C Libraries

One of many useful features of AltiVec is 128 bit wide bus between Register and L1 Cache• 4x more that for Scalar Unit….

…which means that if used properly it can offer greater I/O capabilities for some standard C library functions like….• memcpy

• bcopy

• memset (bzero)

• memmove

• strlen, strcmp, strcpy

…which are normally just linked in at the final stage of compilation• ld dhry21a.o dhry21b.o –l c:/sw/libmoto/libmotoVec.a -l c:/gcc/lib/gcc-lib/powerpc-eabisim/2.95.2/libgcc.a -o

vec_dhry21.elf


Power-Efficient Processing

Applications emerging that can take advantage of thread parallelism

Requires higher performance• Double the cores

• Double the speed

Per

form

ance

Time

Po

we

r

Po

we

r

Po

we

r

Dual core is much lower power

Relative Perf/Watt:

1

Relative Perf/Watt:

< 1

Relative Perf/Watt:

<< 1

Dual core has much better performance per wattSingle

Core2x F1

SingleCoreF1

DualCoreF1

Pe

rf

Pe

rfo

rma

nce

Pe

rfo

rma

nce

Both can have performance close to that of 2x a single core at F1

2x core

2x frequency


to this…

High Performance with Integrated Connectivity Within Embedded Power Budgets

Problem: Clock frequency doesn’t solve the problem within power budget

Solution: Combine• Dual e600 PowerPC® cores

Dual-processor performance Altivec™ extensions Fast L2 caches Symmetric multiprocessing

• PowerQUICC™ integration High internal bus speed Low chip counts Low memory latency

… in a single device

From this…

Performance

Integration

744x 744x

System Controller

PowerQUICC™

MPC8641D


MPC8641D1MBL2

(ECC)

e600 core32KB

D-Cache32KB

I-Cache

MSS

Qu

eu

e

64b DDR/ DDR2 SDRAM

Controller

1MBL2

(ECC)

e600 core32KB

D-Cache32KB

I-Cache

MSS

GigabitEthernet

GigabitEthernet

16b FIFO

8b FIFO 8b FIFO

GigabitEthernet

GigabitEthernet

16b FIFO

8b FIFO 8b FIFO

MPICLocal Bus

Perf MonTrace Buffer

DUART2x I2CTimers

DMA

MPX Bus

MPX Coherency Module

Qu

eu

e

64b DDR/ DDR2 SDRAM

Controller

SRIO 1x/4x OR

PCI Exp x1/2/4/8

PCI Exp x1/2/4/8

MPC8641D – Dual-Core PowerPC® Processor

• Dual e600 PowerPC® cores >1.5GHz

• Dual DDR2 memory controllers

• 4x GbE controllers

• RapidIO fabric: 1x/4x SRIO

• Local I/O interfacesDual x1/x2/x4/x8 PCI

Express

• Multiprocessor interrupt controller

• Local Bus

• Power (typical): 15–25W

• 10-yr reliability at 105°C Tj

• 90nm fabrication process


MPC86411MBL2

(ECC)

e600 core32KB

D-Cache32KB

I-Cache

MSS

Qu

eu

e

64b DDR/ DDR2 SDRAM

Controller

GigabitEthernet

GigabitEthernet

16b FIFO

8b FIFO 8b FIFO

GigabitEthernet

GigabitEthernet

16b FIFO

8b FIFO 8b FIFO

MPICLocal Bus

Perf MonTrace Buffer

DUART2x I2CTimers

DMA

MPX Bus

MPX Coherency Module

Qu

eu

e

64b DDR/ DDR2 SDRAM

Controller

SRIO 1x/4x OR

PCI Exp x1/2/4/8

PCI Exp x1/2/4/8

MPC8641 – Single-Core PowerPC® Processor

• Pin-to-pin compatible with MPC8641D

• Single e600 PowerPC® core>1.5GHz

• Dual DDR2 memory controllers

• Ethernet controllers• RapidIO fabric: 1x/4x SRIO• Local I/O interfaces

Dual x1/x2/x4/x8 PCI Express

• Multiprocessor interrupt controller

• Local Bus• Power (typical): 10–15W • 10-yr reliability at 105°C Tj• 90nm fabrication process


Memory Controllers

Dual memory controllers• At least 333MHz clock rate,

667MHz data rate

• 64 bits (72 bits with ECC)

• 4 banks

• Support for up to 4Gb devices, x8, x16, x32 configurations

• Up to 4GB DIMMs per bank

• Up to 16GB per controller

• Low-latency read path

• Power conservation modes

Flexible address mapping• Each controller owns a block of

memory

• Page- or cache-line interleaving

Memory Controller

MCMMemory Controller

MPC8641D


RapidIO for Fabric Connectivity

In-the-box interconnect• Chip-to-chip, board-to-board, backplane

Greater efficiency than box-to-box protocols

• Physical layer defined for backplane interconnection

~80–100 cm + 2 connectors (serial)

• Both memory-mapped and packet-based transactions

Extensible• Layered architecture

Point-to-point packetized architecture• Low overhead• Variable packet size• Maximum 256 byte PDU• SAR support for 4K-byte messages• Hardware error recovery

Implementation• 1x or 4x serial, to 3.125 Gbaud, 2.5Gb/s per lane• RapidIO Interconnect Specification version 1.2• Read/write bridged between PCI Express port

RIO SwitchRIO

SwitchPCIe ASICPCIe ASIC

ATCA 3.5


PCI Express for Local Connectivity

• PCI Express 1.0a compatible• Supports x1, x2, x4 and x8

link widths @ 2.5 Gbaud, 2.0Gb/s

Auto-detects number of connected lanes

• Selectable as root complex or endpoint at initialization

• Root complex inbound support for MSI and INTx

• Endpoint support for outbound MSI

• Reads/writes carried across ports

• 256 byte maximum payload size

BridgeBridge

Peripheral Endpoint

Peripheral Endpoint

Peripheral Endpoint

Peripheral Endpoint

Peripheral Endpoint

Peripheral Endpoint

Peripheral Endpoint

Peripheral Endpoint

e600

Root Complex/ Endpoint

Root Complex/ Endpoint

e600


Multiprocessing Configurations

Symmetric Multiprocessing• Homogenous OS support

• High-performance option

• Software transparency

• Cores share address space for OS and data

Asymmetric Multiprocessing• Heterogeneous OS support

• Two separate OS or two copies of one non-SMP OS

• Collapse two processors into one

• Task offload or division of labor

• Operating systems, data reside in different address spaces

Core 0 Core 1

OS, shared

user data

Private data

Private data

Core 0 Core 1

shar

ed

use

r d

ata

OS, Private

data

OS, Private

data

Memory Map Overlap


MPC8641 and MPC8641D Statistics

MPC8641 MPC8641D

Processor Single e600 PowerPC® Classic, > 1.5GHz, 2.3MIPS/MHz

Dual e600 PowerPC® Classic, > 1.5GHz, 2.3MIPS/MHz

Caches (per processor)

L1: 32kB I/D

L2: 1MB with ECC

Memory Controller Dual 64b DDR2, 667MHz with ECC

Fabric Interface Serial RapidIO, 1x/4x at up to 2.5Gb/s per lane

Local I/O Interface Dual PCI Express, x1/x2/x4/x8, 2.0Gb/s per lane

Power and supplies 10–15W, 1.0V and 1.1V 15–25W, 1.0V and 1.1V

Reliability 10 years at 105C

Technology 90nm silicon-on-insulator (SOI) process

Package 960-pin HiTCE ceramic, 33x33mm

Availability Samples 2H-05, production 1H-06


Summary

Freescale has leveraged its expertise in building high-performance PowerPC® processors and highly integrated communications processors to design the MPC8641D Dual-Core Processor

The MPC8641D delivers:• A power/performance point targeted at embedded requirements• A level of integration yielding multiple benefits:

Chip count reduction High memory bandwidth Low memory latency Flexible I/O options

• An excellent solution for networking, telecom, storage, industrial/military, printing, and embedded computing applications

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