TM

November 2013

TM 2

• SmallCell intro

• Freescale Small-Cell SoC Portfolio

• BSC913x product overview

• LTE L1 Software Architecture

• Demo information

• Summary

3 TM

• What is SmallCell?

− Wireless access points that operate in licensed spectrum (operator-managed)

− Provide improved cellular coverage, capacity and applications

• Why small Cells?

− Consumer demand for data services is growing unabated, with penetration of smartphones exceeding 40% in many countries and over 300 million being shipped annually. A large ecosystem of application vendors has emerged, reliant on “always on”, high speed, low-latency wireless connectivity.

− The volume of data is continuing to grow rapidly: Cisco predicts that the volume of wireless data will exceed that of wired data by 2015

− Solution - spectrum re-use

Source:www.smallcellforum.org

4 TM

• @20 MHz cell capacity (DL\UL) is –

144\72 mbps

• For a given area the throughput is

N(number of cells in the

region)xCap(cell capacity).

• In this example 15 cells 2160 \1080

mbps

5 TM

• If smaller cells with same

capacity are used the

overall capacity in the

area increases

• In this example we

introduced Frequency

reuse to central cell

• Overall capacity at this

cell increased by a factor

of 4

6 TM

Source:www.smallcellforum.org

7 TM

• Cost, physical size and range are the three dominant factors that define a small cell.

• LTE is expected to be the biggest driver for small cells.

• Most important reasons for deploying small cells are

1. Increase capacity (urban)

2. Increase coverage (rural)

3. Cover high-traffic public areas (urban+)

Femto cells deployments history

92 million small cells by 2016

8 TM

45 nm 28 nm 28 nm

• 32-100 users

(LTE (FDD, TDD), WCDMA) & multimode

• 2x4 MiMO

• 2x e500 and 2x SC3850;

MAPLE-B2P acceleration

• 8-16 users

(LTE (FDD, TDD), WCDMA, CDMAx) & multimode

• 2x2 MiMO

• 1x e500 and 1x SC3850; MAPLE-B2F acceleration

• Thousands of users

• Supports multiple standards

• Based on common architecture:

QorIQ Qonverge platform

Pico SoC BSC9312

Femto SoC PSC9131

Macro SoC B4860

9 TM

Tested Integration

Commercial LTE L1 Software

Reference Board Design

BSC913x SoC Partner L2 / L3 Stack

Complete LTE Femto/Pico

Solution

10 TM

Single Chip Femto Basestation • SMB Femtocell up to 16 users – BSC9131

• Multimode

Multi Standard Architecture • Standards support: LTE (Rel. 9), WCDMA (Rel. 99/7/8)

• LTE – 20 MHz single sector -100 Mbps / DL 50 Mbps UL

• HSPA+ - 5 MHz single sector 42 Mbps / DL 11 Mbps UL

• Processing Layers: PHY-MAC-RLC-PDCP-NTP

• Enabled with 2x2 MiMO

• 2G/3G Sniffing and GPS Support

SoC Architecture • PowerTM e500 Core subsystem (800 MHz – 1 GHz)

• Starcore SC3850 Core subsystem (800 MHz – 1 GHz)

• MAPLE-B2F Baseband Accelerators Platform

• eTVPE – Turbo/Viterbi Decoder

• DEPE – Turbo Encoder w/ rate match

• CRCPE – CRC check & insertion

• FTPE – FFT/DFT

• PDPE, PUPE

• UMTS Chiprate

• Security engine - IPSec, Kasumi, Snow-3G

• Secured boot

• Single DDR3 Controller 32b 800MHz

• IEEE1588 v2, NTP

• USB 2.0

• 2x Ethernet RGMII and IEEE1588v2

• 3x JESD207/ADI/MAXPHY RF transceiver interfaces

Multicore Fabric

MAPLE-B2F

Baseband

Accelerators

LTE/UMTS/CDMA2K

DMA Security

Engine

v4.4

Power™

e500 Core

D-Cache I-Cache 32 KB 32 KB

Starcore

SC3850 DSP Core

D-Cache I-Cache

512 KB

Backside

L2 Cache 32 KB 32 KB

JE

SD

207/A

DI/

MA

XP

HY

US

B 2

.0

32-bit

DDR-3

800MHz 256 KB L2 cache

Clocks/Reset

I2C

SPI

GPIO

DUART Ethernet

1GE IEEE 1588

1GE

11 TM

Single Chip - Pico Basestation • Standards support: LTE (Rel. 8/9), WCDMA

(Rel. 99/7/8/9), 802.16e

• Bandwidth: 20MHz or 2x 10 MHz

• 100 LTE or 64/96 HSPA/AMR active users

• Multimode support

• LTE throughputs: 150Mbps DL / 75Mbps UL

with 2x4 ant.

• HSPA+ throughputs: Dual carrier - 84MbpsDL

/23Mbps UL

• WiMAX 802.16e: up to 50Mbps DL/13Mbps UL

• 2G/3G Sniffing and GPS Support

• Secured Boot & Trust Architecture support

• Proc. Layers: PHY-MAC-RLC-PDCP-Transport

Architecture • Dual PowerTM e500mc core (1 GHz/1.2 GHz)

• Dual Starcore SC3850 DSP (1 GHz/1.2 GHz)

• MAPLE-B2P Baseband Accelerators Platform

• Security engine - IPSec, Kasumi, Snow-3G

• Dual DDR3/3L, 32b,1.333GHz, w/ ECC

• IEEE1588 v2, NTP

• USB 2.0

• 4 SerDes lanes, combining:

• 2x Ethernet 1G SGMII

• 2x CPRI v4.1 @ 6.144G antenna

interface

• 1x PCIe @ 5G x2 lanes

• Quad JESD207/ADI RF transceiver interfaces

• NAND/NOR Flash controller, eSDHC, USIM

• I2C, eSPI

• Package – FCPBGA, 23mmx23mm, 0.8mm

Multicore Fabric

32 KB

Shared

M3

Clocks/Reset

2x I2C

SPI

GPIO

DUART

Power™

e500 Core

D-Cache I-Cache 32 KB 32 KB

32-bit

DDR-3

1.3GHz

Shared 512 KB L2 cache

32-bit

DDR-3

1.3GHz

Coherency module

Starcore

SC3850 DSP Core

D-Cache I-Cache 32 KB 32 KB

512KB L2 cache

x2

MAPLE-B2P

Baseband

Accelerators

LTE/UMTS /WiMAX

DMA Security

Engine

v4.4

US

B 2

.0

CP

RI 4

.1

x2

Ethernet

1GE

SGMII

IEEE 1588

4 - lanes SerDes

1GE PCIe

JE

SD

207/A

DI

x4

IFC

USIM

eSDHC

12 TM

• For Pico\Femto devices (PSC9131\2) Freescale provides “turn-

key” Certified solution for the LTE TDD\FDD eNB

− Higher layers (L2\L3) are implemented by third party partners.

− End-to-end in-house L1 stack implementation

− WCDMA and LTE NMM cell search supporting SON standard

• Various customers are in implementation and integration

stages with Freescale’s Small Cell products

13 TM

SDOS

DL

ctrl PDSCH

PUSCH

Data

PUSCH

CQI

PUSCH

RSP

RACH

PUCCH

1/1a/1b

PUCCH

2/2a/2b

SRS Meas.

L1 / L2 Interface

RT Scheduler Framework Antenna IF Man

Reduced Scheduling Overhead

• Run-to-completion scheduler with deterministic scheduling intervals

• Reduced cost for runtime decisions as worst case sequence is always scheduled

• Simplified multicore aware scheduler engine

Simplified Control Layer

• Removed overhead of multiple control and translation layers

• L2 FAPI messages are directly parsers by each component

• Zero memcopy for L2 ctrl / payload

Seamless MAPLE Access

• Components access MAPLE directly through SDOS

• No additional communication layer

14 TM

• High data rate shared channel operations on MAPLE:

− DL-SCH/PCH on DEPE

− PDSCH on PDPE + eFTPE

− PUSCH descrambling and demodulation on PUPE

− UL-SCH on eTVPE+PUPE

• Remaining UL channels and signals on StarCore:

− PUSCH

StarCore support on Equalization (opt for 9132) and CE

− RACH and Sounding with DFT / FFT support on MAPLE

− PUCCH

− Addional measurements

• Remaining low data rate control channels on StarCore:

− Data encoding and mapping for first control symbols (CFI, HI, DCI, PCFICH, PHICH, PDCCH) excl. IFFT

− BCH / PBCH

DL

UL

Data Control

DL-SCH PCH BCH MCH

PDSCH PBCH PMCH

CFI HI DCI

PHICH PDCCH PCFICH

UL-SCH RACH

PUSCH PRACH

UCI

PUCCH

+ DL synchronization signal on StarCore

SRS

SC3850

MAPLE

15 TM

• L1 scheduling follows run-to-

completion model.

• The component definition and

scheduling is driven by memory

footprint optimization.

• The scheduling scheme is tailored

for the worst case load.

• Each component is statically

tiggered based on the symbol

intervals

• The FAPI control information will

determine which components are

actually executed in each subframe

• RACH processing is spread out

over the subframe with filtering

operations every symbol.

Sym Id Tasks

0 FAPI_Parser (N), PUCCH_Copy (N-1), EQU(N-1)

1 RACH_TDP(N), PUSCH_EDF(N-1),

PUCCH_F1(N-1), PUCCH_F2(N-1)

2 RACH_TDP(N)

3 RACH_TDP(N)

4 RACH_TDP(N), RSP(N)

5 EQU(N), SRS_AP(N-1)

6 2xRACH_TDP(N)

7 RACH_TDP(N), PUCCH_Copy(N), EQU(N)

8 RACH_TDP(N), PDSCH(N+1), PDCCH(N+1)

9 SRS_UM(N-1)

10 2xRACH_TDP(N)

11 RACH_TDP(N), RSP(N)

12 RACH_TDP(N), RACH_FDP(N), EQU(N),

RACH_DPP(N)

13 FAPI_Indications(N)

16 TM

• Designed to make the planning, configuration, management

and optimization of mobile radio access networks simpler and

faster

• Newly added base stations should be self-configured in line

with a "plug-and-play" paradigm

• Freescale supports L1 sniffing (NMM) for both LTE and

WCDMA standards

17 TM

• FAPI defines 4 relevant interfaces for the LTE L1:

− P4 for all network listening operations (radio sniffing)

− P5 for L1 mode control (start, stop etc)

− P7 for the main data path

− P8 for diagnostics

18 TM

• FAPI defines 4 PHY states:

− IDLE: PHY is ready to be configured for

a certain deployment

− CONFIGURED: PHY is configured and

ready for reconfiguration or for subframe

operation

− RUNNING: PHY is in running state.

Every TTI, the PHY receives UL and DL

subframe requests that configure all

operations within this coming TTI.

− NMM: Network listening mode. The PHY

is ready to listen to other radio signals

for measurements.

• The FAPI spec supports the

implementation of a stateless PHY where

all user information is stored on the L2

19 TM

• The L1/L2 interface follows

the FAPI standard

• Some minor changes were

added for performance

optimization (padding,

payload pointers)

• Additional vendor specific

fields are used for advanced

measurements and

additional control options

• The FAPI messages are

mapped on a set of

interprocessor

communication channels

(IPC) that handle all

communication between the

cores

20 TM

• L1/L2 Wireshark Trace

− All FAPI events are sent to a host and can be analyzed using the

Wireshark tool

− Same information is logged in DDR memory for post mortem debug

• Offline analysis of DDR trace

− Logs of all real time events

− Uses CodeWarrior tools to read from memory

− Primarily used in lab environment

• Debug Print Agent: Runtime trace on debug host

− Extracts and displays the trace information on the host while target

is running in real time.

21 TM

• 3GPP Release 8 standard compliancy

• Band support

5 / 10 / 15 / 20 MHz support

Support for band 1,7,13. Can easily be extended to other bands without L1 changes

• Downlink 2x2 MIMO Support

• Localized and Distributed PDSCH, Localized PUSCH

• Downlink Control Channel Support (PDCCH, PHICH, PFICH, BCH,SSH)

• All PUCCH Formats (1/1a/1b/2/2a/2b)

• Sounding channel support

• Handover and Measurements Support

• Closed Loop Power Control (PUCCH, PUSCH)

• FAPI Compliant (Partial and Full Reconfiguration)

• Cell Search support for LTE

• Interoperability with Test and Commercial UEs (PanTech, FFA, Signalion, AeroFlex)

22 TM

UE eNB

Ethernet

LTE UE 1 Laptop with

commercial

net stick

CW PC CodeWarrior for L1

BSP Linux PC Load code, setup RF

Core Network

LTE EPC Core network simulator

Band 7

RF card

BSC9132

HW

Acceleration

SC3850

LTE

L1

e500v2

LTE

L2/L3

LTE UE 0 Laptop with

commercial

net stick

TM 23

• The BSC913x provides an architecture for a scalable and

efficient implementation of the eNode-B functionality on a single

chip

• Along with the SoC, Freescale offers a commercial LTE L1

software that is designed to make best use of the available

hardware functionality

• The L1 functionality can be treated as a black box controlled

through an API that follows the Femto API recommendations

• Freescale has integrated the L1 with L2/L3 stacks from 3rd party

partners to enable end-to-end system testing

TM