FPGA Based Implementation of Sinusoidal PWM for InductionMotor Drive Applications

Farzad Nekoei, Yousef S. KavianFaculty of Engineering, Shahid Chamran University, Ahvaz, Iran

y.s.kavian@scu.ac.ir

Abstract:The rapid advances in very large scale integration (VLSI) technology lead to implement modern high speed digitalcontrollers with excellent performance, compared to traditional analog control systems. The field programmable gatearray (FPGA) devices provide programmable system-on-chip (SoC) environments for designing powerful ASICcontrollers with dedicated architectures. This paper presents a FPGA-based digital controller proposed to controlinduction three-phase motor drives using a single SPARTAN ٣ chip, XC٣S۴٠٠-۵I-PQ٢٠٨, from Xilinx, Inc. Thesinusoidal pulse width modulation (SPWM) method is realized on FPGA to generate controlling switching pulses forinsulated-gate bipolar transistors (IGBTs) in drive system implementing a Verilog hardware description language(HDL) code. The experimental and simulation results demonstrate the efficiency of FPGA-based solutions forimplementing dedicated SPWM controller for induction motor drive systems.

Keywords: Field Programmable Gate Array, Sinusoidal PWM, Hardware Description Languages, Verilog,Induction Motors, Drive.

١. IntroductionThe induction motors are mainly employed inindustrial processes as actuators and final elements dueto their desirable performance features [٢ ,١]. Designand implementation of digital controllers for drivesystems is a challenging issue for employing inductionmotors in industries. The digital signal processors(DSPs) have been mainly utilized by engineers andresearchers for controlling induction motors [٣, ۴].Nowadays, the field programmable gate array (FPGA)chips are quite mature for the industrial electronic andcontrol applications caused by fast progress in verylarge scale integration (VLSI) technology [۵]. Fratta etal [۶] provided a comparative analysis among DSP andFPGA-based control capabilities in PWM powerconverters. In [٧] Simulink-based modeling andsimulation of FPGA-based variable-speed drivesystems was presented. Chen and Lin implemented theFPGA-based ultrasonic motor servo drive [٨]. Real-time FPGA-based high speed motion control wasproposed by Yau et al. in [٩]. Fung et al. [١٠] presentedFPGA-based adaptive back-stepping fuzzy control fora micro-positioning Scott-Russell mechanism. Bomarimplemented a micro-programmed control in FPGAs[١١]. Kung and Tsai proposed a FPGA-based speedcontrol IC for PMSM drive with adaptive fuzzy control[١٢]. FPGA implementation of an embedded robustadaptive controller for autonomous omni-directionalmobile platform was presented by Huang and Tsai[١٣]. Kung et al. realized a motion control IC for X-Ytable on FPGA [١۴].Therefore FPGAs are successfully used forimplementing induction motor drives due to providing

programmable system-on-chip (SoC) environments byincorporating the programmability of programmablelogic devices (PLDs) and the architecture of gatearrays. The FPGAs [١۵] consist of thousands of logicgates and some configurable logic blocks (CLBs)which make them an appropriate solution forprototyping the application-specific integrated circuit(ASIC) controllers with dedicated architectures forspecified applications. The circuits and algorithms canbe developed in the hardware description languageslike VHDL [١۶] and Verilog [١٧] which are technologyindependent.Monmasson et al. [١٨] reviewed the FPGA-baseddesign methodologies for industrial control systems.Naouar et al. surveyed FPGA-based current controllersfor AC machine drives [١٩]. They concludedimproving the quality of the regulated current in ON-OFF current controllers, proportional-integral (PI)current controller, and predictive current controller dueto reduction of the execution time delay from thepossibility offered by FPGAs.Although the FPGA-based digital designs have somemerits than microprocessor circuits, pointed inliterature, including programmability, rapidprototyping, fast time-to-market, embedding processor,low power consumption, low cost and higher densityfor the implementation of the digital systems. But theconcurrent operation, ASIC controller design andsimultaneously processing are the main reasons ofauthors for employing FPGA for implementinginduction motor derives.The rest of the paper is organized as follows. Section ٢presents a synoptic architecture of FPGA-based drive

system for ٣-phase induction motor followed by adescription of sinusoidal PWM. The realization ofSPWM on FPGA, the Verliog-based modules and thesimulation results achieved by ISE for each module arepresented in section ٣. The experimental set up andpractical results are described in section ۴. Finally thepaper is concluded in section ۵.

٢. FPGA Based Motor Drive Solution

The main parts of the FPGA-based solution for acmotor drive applications are described in this section.Figure ١ shows a synoptic of the proposed drive systemwhich consists of FPGA control board and motordriver board. The FPGA control board provides theswitching signals for insulated-gate bipolar transistors(IGBTs) of inverter block using sinusoidal PWM. Theswitching frequency, the dead time of IGBTs and thephase selection are managed by FPGA. The FPGAcontrol board includes an intellectual property (IP) corefor managing digital interfaces by ADC modules andother digital measurements. The motor driver boardconsists of three main modules which are inverterblock, power system and analog to digital converters.

٢.١ The Insulated Gate BipolarTransistors (IGBTs)The power electronic drive includes ۶-puls ٢-level

IGBTs for voltage-source converter. The IGBTs [٢٠]are used in switched mode for drive applications wherethe forward characteristic of the IGBT can berepresented by a linear substitute characteristic [٢١],shown in figure ٢.

)t(I.R)T(V)t(V CCECECEsat (١)

where CER is the device on-state resistance and)T(VCE is the collector-emitter threshold voltage.

Another important characteristic of an IGBT forelectronic drive is the timing chart for switchingoperation of the device during turn-on and turn-off,respectively.

)t(IC

)T(VCE )t(VCE

CER

Fig. ٢ The linear characteristic of a typical IGBT inswitching mode

٢.٢ The Sinusoidal Pulse WidthModulation (SPWM)

In SPWM approach a sine wave is employed asreference signal which is compared to a triangularcarrier signal to provide High-Low pulses , shown infigure ٣. The output signal, sV , is high when theamplitude of reference signal, rA , is greater than thatfor carrier signal , cA , otherwise is low.

cr

cr

s

AA,Low

AA,HighV (٢)

The modulation index is defined asc

r

AAM . By

changing modulation index from ٠ to ١ the outputvoltage changes from ٠ to sV which could be used forvoltage control of motor.

CarrierRefrrence Vs

sVFig. ٣ The High-Low pulse generation by SPWM

approach.

offt

Fig. ١ Synoptic of the FPGA based drive system

٣. FPGA Realization of SPWM

This section describes the practical aspects ofrealization the SPWM based drive approach on FPGA.A Verilog HDL code was implemented into sixmodules which are instantiated in an IP core.

٣.١ The SINE module

This module generates a discrete sine wave byproviding ۶٠ samples of a sine wave from ٠ to ٣۶٠degrees. The frequency of sine wave varies between٢٠HZ to ۶٠Hz, i.e. HZ۶۰,۲۰f , and SINE module

refreshes itself eachf۶۰

۱ second. Figure ۴ shows the

behavior of SINE module for providing discretesamples of sine waves.

Fig.۴ Providing discrete samples of sine waves by SINEmodule

٣.٢ The PWM moduleThe outputs of SINE are connected to PWM module toprovide pulse width modulation signals. The PWMmodule consists of an up/down counter which countsfrom ٠ to ٢۵۵, then changes its direction and counts

until ٠ inf۶۰

۱ second, where f is frequency of the

SINE module. The clock pulse of PWM module is ۵١٢times faster than f. The up/down counter makes atriangle wave that is used as carrier signal. The voltageof motor and consequently the speed of motor could beadjusted by modulation index (M). Figure ۵ shows thepulse width modulation signals provided by PWMmodule.

Fig. ۵ The pulse width modulation signals provided byPWM module.

٣.٣ The DEAD-TIME ModuleIn power circuit there are ۶ insulated-gate bipolartransistors (IGBTs) where each phase needs twoIGBTs. Practically the IGBTs have dead timescalled dt for switching from high to low which isaround s۱ . This time is considered for preventing ofsending both high and low signals to IGBTs in the

same time which damages the power circuit. TheDEAD-TIME module receives PWM outputs andprovides s١ delay time for turning IGBTs, shown infigure ۶.

Fig. ۶. The s١ delay time provided by DEALY module

٣.۴ The PHASE-CNTR ModuleThis module enables each phase when the previous

one is in ١٢٠ degrees position. Figure ٧ shows thephase enabling by the proposed module in appreciatetime.

Fig. ٧. Phase enabling by PHASE-CNTR module

٣.۵ The DIRECTION ModuleThe outputs of the DEALY module are connected tothe DIRECTION module for changing motor rotationdirection shown in figure ٨.

Fig. ٨. The changing motor rotation direction

٣.۶ The FREQ_DIVIDER moduleThis module provides the frequencies that are neededfor SINE and PWM modules from oscillator signal.The motor speed could be controlled by changing theoutput frequency of FREQ_DIVIDER module. Thismodule can adjust motor frequency from ٢٠HZ to۶٠HZ. Figure ٩ shows different clock generation byFREQ_DIVIDER module.

Fig. ٩. Different clock generation by FREQ_DIVIDERmodule

۴. Experimental ResultsThis section presents the results of implementation theSPWM approach on FPGA for ٣-phase inductionmotors drive. The experimental set up consists of twomain parts; the FPGA controlling board for providingswitching pulses and the power circuit board. Thecharacteristics of the motor were given in Table ١. Thedigital control system was implemented on SPARTAN٣; chip number XC٣S۴٠٠-۵I-PQ٢٠٨, from Xilinx Inc.The Xilinx ISE ١٠.١ Web-Pack edition was used forsynthesized the Verilog programs.

Table ١. The characteristics of the motor

KW HZ RPM V A

٠.٣٧ ۵٠ ٢٨٠٠ ٢٢٠ Δ /٣٨٠ Y ١.٩ Δ /١.١ Y

Figure ١٠ shows the internal architecture of theproposed FPGA implementation of motor drive IC.The internal circuit block diagram comprises the mainmodules to perform the function of the SPWM fordrive the IGBTs, generate the frequency, collect theresponse data, and communicate with external devices.

Figures ١١(a) and ١١(b) show the switching signals thatwere exerted to each phase IGBTs and the signalswhich were exerted to a low pass filter with C=١٠٠nfand R=١٠KΩ, respectively. As shown in figure ١١(a)the switching pulses of one leg IGBTs in the invertercircuit are not high and low in the same time.Furthermore, the frequency and the amplitude of thesepulses could be adjusted by FPGA for controlling thespeed of motor.

Fig. ١١(a). The switching signals for each phase IGBTs

Fig. ١١(b). The switching signals after low pass filter

Fig. ١٠.The block diagram of IC

۵. ConclusionIn this paper, the successful digital design andimplementation of a programmable Sinusoidal PWMcontrol IC for induction motor drives have beendemonstrated. The FPGA technology has beenemployed for implementing the Sinusoidal PWMcontrol IC using hardware description languageVerilog approach. The simulation and experimentalresults verified the effectiveness of implemented ASICSPWM control IC with dedicated architecture. Theproposed SPWM IC can generate a wide range ofPWM output voltages and frequencies which could beapplied for motor speed control. The proposed FPGA-based digital control scheme is flexible, low cost, andhigh performance for induction motor driveapplications.

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