flexible electrical and software programmable transceiver...
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27 October, 2001 1
Flexible Electrical and SoftwareProgrammable Transceiver
(FEAST)
Dr. Bradley J. BazuinAssistant Professor
Western Michigan UniversityDept. Of Electrical and Computer Engineering
MSGC Seed Grant
27 October, 2001 2
IntroductionCommunications systems have experienced rapid advancement due tothe demand created for mobile and local wireless communications devices.
Reliable, small, low cost consumer communication products..Cost effective infrastructure to provide local competition or provide new telecommunication installations.
Evolving signal formats support higher capacity and more stringent bandwidth restrictions and requirements.
Historical formats: AM, FM, PSK, FSK, SSB, VSB, QAM, AMPS.Modern formats: NAMPS, GSM, CDMA, DSSS, frequency hop, etc.Developing formats: 4th generation wireless, theoretically optimized signals.
Device and component technologies have been been driven to support the commercial demand.
RF and microwave devices for wireless voice and data access.Digital components to support advanced signal structures and formats.
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Technical OpportunitiesDefine and develop architectures, algorithms, techniques, prototypes, and software programming for both hybrid and new communications transceivers and systems.
“Software radios.”Hybrid transceivers that are capable of processing multiple defined signal formats, either sequentially or simultaneously, using one common set of components.New communications systems that develop theoretically optimized signal formats that make use of the full available bandwidths, mitigate for projected channel impairments including multipath, provide capacity on demand, and improve performance and security through coding and encryption techniques.
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Seed Grant ResearchProvide the nucleus and resources to define, develop, and demonstrate an initial prototype of the flexible, electrical and software programmable transceiver (FEAST) for wireless communications.
IBM Compatible
RF to IFReceiver
A to DConvert
DigitalDown-
Converter
DigitalSignal
Processor
Digital Up-Converter
D to AConvert
IF to RFTransmit
Comm. Tower
Satellite
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Historic space and aerospace communications.Voice and data receivers and transmitters are customized for each frequency band, modulation format and operational tasks.Multiple transceivers of each type must be installed for redundancy.
FEAST technology will enable a wide range of communication and/or data signals to be received and transmitted using a common, reprogrammable, open architecture system.
With antenna switching, multiple FEAST provide flexible assignments and reassignments as required.Programmability allows the use of variable signal formats based on the required data transfer rates, useable bandwidth, path loss, linkmargins, and processing gains.Using a single, common design, a pool of FEAST systems can provide spare transceivers for increased communication system redundancyand reliability.
NASA Benefits
Satellite dish
Satellite
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Rapid Prototyping ComponentsAcquire development and evaluation modules of key components. Design and develop necessary circuitry, interfaces and cabling.
CustomPrototypeReceiver
AD6640S/PCBADC Evaluation
Module
AD6620S/PCBDigital
DownconverterEvaluation Module
TI320C6701DSPEvaluation Module
Crystal Oscillator40-65 MHz
IBM PCCompatible
Host
AD6622S/PCBDigital Upconverter
with DACEvaluation Module
CustomPrototype
Transmitter
Monitor
Keyboard
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RF Receiver and Transmitter
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Receiver and Transmitter Block Diagrams
Original RF design for high dynamic range
Pre-selector IF Filter
LO
1 2 3 4 5 6
LO
7
LowpassFilter
8 9
RF to IF Converter IF Filter IF to BB Converter Antialiasing
Atten.
10
Amp Amp Amp Amp
RF FilterIF Filter
LO
1 2 3 4 5 6
LO
7
LowpassFilter
8 9
BasebandFilter IF FilterBB to IF Converter IF to RF
Atten. Atten.
10
Filtered Preamp
AmpAmpAmp
27 October, 2001 9
Receiver/Transmitter Components
Total RF component costs of $1,628.50 (WMU Matching Funds)Receiver $576.60, Transmitter 496.65, Cables/Misc $555.25
Item # Quantity Type Company Make Model/PN Price Total Price1 1 Low Noise Amplifier (LNA) Mini-Circuits ZFL 1000LN 89.95$ 89.95$ 2 1 Amplifier Mini-Circuits ZFL 1000 79.95$ 79.95$ 3 5 Amplifier Mini-Circuits ZFL 500 69.95$ 349.75$ 4 2 Mixer Mini-Circuits ZFM 3 61.95$ 123.90$ 5 2 Mixer Mini-Circuits ZFM 5X 59.95$ 119.90$ 6 2 Voltage-Controlled Oscillator Mini-Circuits ZOS 200 119.95$ 239.90$ 7 2 High Pass Filter Mini-Circuits SHP 400 38.95$ 77.90$ 8 2 Low Pass Filter Mini-Circuits SLP 21.4 34.95$ 69.90$ 9 2 Low Pass Filter Mini-Circuits SLP 30 34.95$ 69.90$ 10 1 Attenuator Kit Mini-Circuits K1-SAT 109.95$ 109.95$ 11 2 Splitter Mini-Circuits ZFRSC 2050 59.95$ 119.90$ 12 4 Terminator Mini-Circuits STRM 50 9.45$ 37.80$
TOTAL COST 1,488.70$
Item # Quantity Type Company Make Model/PN Price Total Price1 10 SMA(M) to SMA(M) Jameco 161293 2.25$ 22.50$ 2 10 SMA(F) to BNC(M) Jameco 153453 2.25$ 22.50$ 3 10 SMA Bulk Head Jameco 153285 2.25$ 22.50$ 4 2 SMA Cable Ass. (0.5 ft.) Jameco CSMA05 169800 3.75$ 7.50$ 5 10 SMA Cable Ass. (1 ft.) Jameco CSMA1 163854 3.49$ 34.90$ 6 2 SMA Cable Ass. (2 ft.) Jameco CSMA2 153381 4.25$ 8.50$ 7 2 SMA Cable Ass. (4 ft.) Jameco CSMA4 153390 4.95$ 9.90$ 8 2 SMA Cable Ass. (6 ft.) Jameco CSMA6 159450 5.75$ 11.50$
TOTAL COST 139.80$
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Digital Signal Processing Modules
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ADC and DDC Block Diagram
DDC Processing Block Diagram
ADC and DDC Modules
ComplexNCO
CICFilter-
Decimator
FIRFilter
OutputFormat
RateSettings Coef. RAM Control
Real ADCData Input
ComplexSerial Data
Output
Programming Interface
Data Latch
Header
DDCAD6620
DataLatch
DataLatch
FIFO16k
DataLatch
Outputto pDSP
Transceiver
PCPrinter
Port
ADCAD6640
ReferenceClock
IF SignalInput
Buffer
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SoftCell DDC Monitor and Control
Spectrum Centered at 860 MHz
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Receiver-to-DDC Spectrum Analyzer
Data Latch
Header
DDCAD6620
DataLatch
DataLatch
FIFO16k
DataLatch
Transceiver
ADCAD6640
ReferenceClock
IF SignalInput
Buffer
IBM Compatible
PrinterPort
915 MHz Center Frequency
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DUC and DAC Block Diagram
DUC Processing Block Diagram
DUC and DAC Module
Data Latch
Header
AD6620
CrystalOscillator
SIO Inputfrom pDSP
Controller
PC ComPort
AD9754
AnalogOutput
BufferAmp
ComplexNCO
CICFilter-
Interpolate
Interpolat-ing (1-8)FIR Filter
SerialInput
Format
RateSettings
Coef. RAMand RateControl
SerialCh A
Outputto DAC
SerialCh B DUC Channel B
Sum
SerialCh C DUC Channel CSerialCh D DUC Channel D
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Programmable Digital Signal ProcessorTI 320C6701 pDSP
167MHz Clock Rate, 1 GFLOPSVelociTI™ Advanced Very Long Instruction Word (VLIW)
• Eight Parallel Highly Independent Functional1MBit On Chip SRAM
• 512KBit Internal Program/Cache• 512KBit Dual Access Internal Data
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TI320C6701 Evaluation Module
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Digital Processing Components
TI pDSP TI Grant to ECEAD6640S/PCB $150AD6620S/PCB $495AD6622S/PCB Analog Devices DonationPC Host WMU ECE Dept
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Real-Time Software DevelopmentTI Code Composer Studio development environment
Include basic operations: C-code development, Compiler, Linker, Monitor, Debug SupportTools with tutorials for getting started with the EVM
• Interfacing, simple algorithms, monitoring values, control, programming style, and simple audio input/output.
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FEAST Software Architecture
Focus was on McBSP and DMA real-time data acquisition and distribution
AudioLine-In
AudioLine-Out
Audio Codec
DDR DXR
DMA0
McBSP0Serial Port
AudioDMA ISR
ReceiverDDC Output
TransmitDUC Input
DDR DXR
DMA1
McBSP1Serial Port
BasebandDMA ISR
Demodulation
Audio InMemory
Audio OutMemory
BasebandIn
Memory
BasebandOut
Memory
ModulationCommandand Control
Display andStatus
Main Program Loop Routines
W atch DogTimeout
W atchDog ISR
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FEAST Project Results & BenefitsStudent Research Activities
FEAST senior capstone design projectAdditional work through MSGC undergraduate grantsCurrent Masters student continues work
Additional Student Wireless Research and DevelopmentSenior project using RF command and controlSenior project developing a localized DGPS systemGraduate project developing a Bluetooth monitoring station using FPGAs and ARM processor
Course Reference and DemonstrationsECE560 reference design for RF receivers and transmitters. Hands-on observation of the local RF spectrum, identification of spectral band characteristics, and observation of current modulation formats.
Formative Stage Research ProjectsOFDM/DMT generation, processing and analysis for 3G and 4G cellular telephonyChaotic Carrier CommunicationsA four channel receiver for spatial beamforming, interference mitigation and direction finding
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AcknowledgementMy personal thanks to those supporting this work:
Michigan Space Grant Consortium Seed GrantMSGC WMU representative: Dr. Frank SeveranceWestern Michigan University
• ECE Dept. Chair Dr. Hossein Mousavinezhad• WMU research office• Mr. David Florida
Interested and motivated students, including:• Cazzie Williams, Jonathan Barber, and Garett Spalo (the first group!)
Dr. H. Mousavinezhad and Dr. Abdel-Qader providing the TMS320C6701 development station, including a PC, TI tools and a development card. Partial support for these components was provided by the National Science Foundation’s Course, Curriculum and Laboratory Improvement Program under grant DUE-9952512 and from Texas Instruments. Wireless Infrastructure Group of Analog Devices, Ms. Leslie Adams, donation of the AD6622S/PCB evaluation module to the project. BAE Systems Division, Gaithersburg, Maryland, Mr. Mike Cholewczynski, donation of an RF spectrum analyzer and synthesized RF signal generator.
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Flexible Electrical and SoftwareProgrammable Transceiver
(FEAST)
Dr. Bradley J. [email protected]
Western Michigan UniversityDept. of Electrical and Computer Engineering