field emission from integrated planar graphene edges

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Naval Research Laboratory Washington, DC 20375-5320 NRL/MR/6851--19-9941 Field Emission from Integrated Planar Graphene Edges DISTRIBUTION STATEMENT A: Approved for public release, distribution is unlimited. Dr. Jonathan L. Shaw Electromagnetics Technology Branch Electronics Science and Technology Division John B. Boos Key W Corporation Hanover, MD Dr. Byoung-Don Kong Pohang University of Science and Technology Pohang, KOR November 18, 2019

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Page 1: Field Emission from Integrated Planar Graphene Edges

Naval Research Laboratory Washington, DC 20375-5320

NRL/MR/6851--19-9941

Field Emission from Integrated PlanarGraphene Edges

DISTRIBUTION STATEMENT A: Approved for public release, distribution is unlimited.

Dr. Jonathan L. Shaw

Electromagnetics Technology BranchElectronics Science and Technology Division

John B. Boos

Key W CorporationHanover, MD

Dr. Byoung-Don Kong

Pohang University of Science and TechnologyPohang, KOR

November 18, 2019

Page 2: Field Emission from Integrated Planar Graphene Edges

i

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Field Emission from Integrated Planar Graphene Edges

Dr. Jonathan L. Shaw, John B. Boos*, and Dr. Byoung-Don Kong**

Naval Research Laboratory4555 Overlook Avenue, SWWashington, DC 20375-5320 NRL/MR/6851--19-9941

ONR/NRL 6.1

DISTRIBUTION STATEMENT A: Approved for public release distribution is unlimited.

*Key W Corporation, 7740 Milestone Parkway, Suite 400, Hanover,MD 21076-2292**Pohang University of Science and Technology, 77 Cheongam-ro, Hyogo k-dong, Nam-gu, Pohans, Gyeongsangbuk-do, South Korea

UnclassifiedUnlimited

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34

Dr. Jonathan L. Shaw

(202) 767-9205

18-11-2019 NRL Memorandum Report

Field emission GrapheneVacuum transistor Energy distribution

1G52

Office of Naval ResearchOne Liberty Center875 North Randolph Street, Suite 1425Arlington, VA 22203-1995

1 Oct. 2017 - 30 Sept. 2019

UnclassifiedUnlimited

We demonstrated field emission from graphene edges integrated with gate and drain electrodes on a common dielectric substrate. We alsodemonstrated field emission current densities over 1mA/mm, limited by issues unrelated to the field emission process. This work is a first steptoward building an integrated vacuum transistor using vacuum transport parallel to the substrate surface. Such a device could overcome theperformance limitations caused by semiconductor transport while maintaining the size, weight, fabrication technology, and cost of solid-statedevices. As a vacuum transport device, it could operate in high temperature and high radiation environments.

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Page 4: Field Emission from Integrated Planar Graphene Edges

CONTENTS

1 Introduction 3

1.1 Objective 3

1.2 Motivation 3

2. Approach 5

2.1 Device Geometry 9

2.1.1 Target Geometry 10

2.1.2 Symmetric Design 11

2.1.3 Asymmetric Design 11

3 Experiments 12

3.1 Fabrication Process 12

3.1.1 Symmetric Design 12

3.1.1.1 CVD graphene 12

3.1.1.2 RGO 13

3.1.2 Asymmetric Design 14

3.2 Emission measurements 17

3.2.1 Emission test equipment 17

3.2.1.1 Vacuum chamber 17

3.2.1.2 Electronics 18

3.2.1.3 Emission measurement methods 18

3.3 Raman measurement 19

3.4 Emission measurements 21

3.4.1 Symmetric devices 21

3.4.1.1 CVD graphene devices 21

3.4.1.2 Reduced graphene oxide devices 23

3.4.2 Asymmetric devices 23

3.4.2.1 Devices processed with XeF2 24

3.4.2.2 Devices processed with SF6 ICP 29

4 Summary and Conclusions 31

Publications 32

iii

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EXECUTIVE SUMMARY

During this work, we demonstrated field emission from graphene edges integrated with gate and

drain electrodes on a common dielectric substrate. We also demonstrated field emission current densities

over 1mA/mm, limited by issues unrelated to the field emission process. This work is a first step toward

building an integrated vacuum transistor using vacuum transport parallel to the substrate surface. Such a

device could overcome the performance limitations caused by semiconductor transport, while maintaining

the size, weight, fabrication technology, and cost of solid-state devices. As a vacuum transport device, it

could operate in high temperature and high radiation environments.

This report presents research conducted by Dr. Jonathan Shaw (6851), J. Brad Boos (6853), and Dr.

Byoung Dong Kong (6853). Jeff Mittereder, Doe Park, Connie Kornegay, John Lowe, and Spence Albright

provided technical support. Dr. Glenn Jernigan (6880) provided reduced graphene oxide films. Dr. Jeremy

Robinson (6870) provided transferred CVD graphene and helped perform Raman spectroscopy.

E-1

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E-2

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1

FIELD EMISSION FROM INTEGRATED PLANAR GRAPHENE EDGES

1 INTRODUCTION

1.1 Objective

Our objective was to prove that using field emission from a graphene edge is a viable means to

create vacuum electrons for use in a vacuum-transport device such as a transistor with all electrodes

integrated on a common dielectric substrate. Specifically, we set out to build structures with planar

graphene edges integrated with gate and drain electrodes and demonstrate field emission from the integrated

graphene edges.

1.2 Motivation

Loss-free electron transport in vacuum has several advantages over solid-state transport; for

example, device designs not possible using solid state transport, electron velocities approximately 10-100

times higher than typical saturation velocities (at 10-1000eV), and greater freedom to use robust materials.

Traditional vacuum devices are bulky, heavy, and expensive relative to solid state, but these issues are not

intrinsic to the device physics. Device designs very similar to solid-state devices in size and weight require

integrating all electrodes including the source (vacuum cathode). All vacuum devices require a vacuum

cathode, i.e. a means of injecting electrons into vacuum. The cathodes commonly use the physical

mechanism of thermal emission, and require temperatures near 900oC to operate. Such hot cathodes

consume power and are difficult to micro-fabricate and integrate with other micro-fabricated elements of

the vacuum devices. This is one of the main reasons why the physical size of vacuum devices has improved

only to a limited extent over several decades.

Field emission cathodes using vertical emitter tips have received attention as a possible replacement

for thermal emission cathodes in vacuum electronic devices. One of the most successful types of vertical

field emission cathodes use carbon nanotubes. Empirical evidence shows that carbon nanotubes are not

nearly as likely to initiate vacuum arcs as are other materials such as Mo or Si. We believe arcs and emission

instability result from charging at emission surfaces coated with dielectric materials, e.g. due to oxidation.

Carbon nanotubes are much less likely to experience these issues because carbon oxides are volatile at room

temperature. Graphene, being chemically identical to carbon nanotubes, shares this property. Other

important shared properties include high thermal and electric conductivity and high tensile strength. One

drawback of carbon nanotubes is the heat transport from the emitting apex to the substrate is poor, due to

their very large length/diameter ratio (many hundreds or a few thousands). Graphene’s 2D geometry

provides relatively high thermal transport.

Another innovation in vacuum electronic device design is the use of sheet beams rather than round

(pencil) beams. Sheet beams allow the total beam current to scale with the sheet width without increasing

space charge. Field emission from graphene edges naturally creates a sheet beam. Reducing the dimensions

of a device and employing high electric fields also increases the current density where space charge

becomes problematic. In fact, preliminary models indicate space change begins to affect the field emission

current from graphene edges at densities near 1A/mm, depending on the initial energy of the emitted

electrons.

___________Manuscript approved October 3, 2019.

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(a)

(b)

(c)

(d)

Figure 1. (a) Schematic diagram of a possible vacuum transistor structure using field emission from a planar graphene edge. (b)

Equivalent circuit model of a generic field effect transistor (using either solid state or vacuum transport) (c) equation for fMAX

derived from the circuit model. (d) Plot of the maximum frequency of oscillation (fMAX) as a function of transconductance for a

typical vacuum transistor similar to the structure shown, vs. a typical GaN FET.

0.01 0.1 1 10 100 1000

0.01

0.1

1

10

Vacuum FET

f ma

x (

TH

z)

gm (mS/mm)

GaN

source

drain gate field plate

dielectric substrate

VS

VD

gm(V

i)

RG

CGS

Vi

RDSV

g

CGD

𝑓𝑚𝑎𝑥 =𝑔𝑚

2𝐶𝐺𝑆

1

√𝑅𝐺𝑅𝐷𝑆

+ 𝑔𝑚𝑅𝐺𝐶𝐺𝐷𝐶𝐺𝑆

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A generic sketch of an envisioned vacuum transistor appears in figure 1(a). A circuit model of a

generic field effect transistor (FET) appears in Figure 1(b). The maximum frequency of oscillation (fMAX)

is the frequency where the power gain drops to 1. At lower frequencies f, the power gain is (fMAX/f)2. Figure

1(c) shows the equation for fMAX derived from the equivalent circuit. Calculated values of fMAX for a vacuum

FET vs. a solid state FET appear in Figure 1(d). The vacuum transistor has a tremendous performance

advantage when the transconductance (gm) is at least a reasonable fraction of the values achieved in solid-

state devices. The temperature rise in the channel caused by scattering during solid-state transport limits

the practical transconductance, and much of the inherent performance is lost to the parasitic capacitance

and low voltage gain. Vacuum transistors typically have lower transconductance (possibly limited by space

charge), but enjoy much lower parasitic loss, much higher voltage gain, much higher temperature limits,

and much lower sensitivity to stray charge (typical of radiation damage).

The properties of vacuum transport lead directly to most of the performance advantages of vacuum

transistors. For example, the distance the electrons need to travel within a device (the transit distance) must

be short enough to complete the transit within a fraction (1/2π) of the period of oscillation. Interactions

between the electrons and the semiconductor limit the electron velocity (to approximately 2x105 m/s),

which limits the transit distance. The transit distance multiplied by maximum electric field the

semiconductor can tolerate without breakdown limits the drain voltage. Unwanted electrostatic interactions

between the electrodes increase with smaller transit distances. Using vacuum as the transport medium

relaxes all these limits. The high electron velocity allows proportionally larger distances between the

electrodes, reducing the capacitances CGD and CGS. Eliminating the relative dielectric constant associated

with some of the semiconductor and insulator materials also reduces the capacitances, and eliminates some

of the major sources of solid-state device failure (thermal runaway and radiation effects). Vacuum transport

also allows device designs that improve performance, for example using the field plate to focus the beam

and decouple the drain and source.

Previous vacuum device designs using field emission cathodes use vertical geometries, where sharp

structures protrude vertically from a substrate and produce electrons directed normal to the substrate

surface. This geometry suffers from two issues, one being the difficulty in creating a fully integrated device

(lateral emission provides the obvious solution). The other issue is that over 90% of the charge induced on

the field emitter electrode is located on the substrate or other supporting structures rather than at or near the

emission sites, creating un-necessary capacitance. In contrast, about half of the total charge appears very

close to the emission site of a lateral edge. This of course reduces the parasitic capacitance; plus it can also

improve the device reliability by reducing the density of stored energy near the emission site (the stored

energy is available to feed a local vacuum arc or other short).

2 APPROACH

We fabricated integrated graphene edge devices and performed measurements to prove that it is

possible to induce field emission from the graphene edge by applying voltage between the integrated

electrodes and the graphene source. Our main experimental tools were electron energy measurements and

current-voltage measurements including three-terminal measurements. We designed and built the device

geometry, fabrication process, and measurement tools needed.

To help explain our approach to proving that field emission occurred, a diagram of the energy vs.

distance near a graphene edge appears in Figure 2. A field emission process typically creates electrons near

the Fermi energy of the source electrode, which is typically several eV below the vacuum energy (the

vacuum level minus the Fermi level is the work function ϕS). In contrast, electrons generated thermally or

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via photo- or secondary emission have energies near or above the vacuum energy. Thus, one way to prove

that an electron was field-emitted is to measure its energy relative to the Fermi level of the emission site.

Experimentally, we control only the Fermi level in the wire making contact to the source electrode.

If the source electrode is metallic, any interface potentials are typically negligible (to first order). But since

our source electrode is graphene, there is a possibility that significant potentials might appear at the metal-

graphene contact or within the graphene.

In general, such potentials will increase with the current passing through the interface, so we can

identify such potentials by repeating the energy measurements at varying interface current densities. (An

interface potential necessarily exists at the interface between the vacuum and the solid emitter, such that

the potential barrier is not perfectly abrupt. The usual practice of approximating the interface potential

energy with the image charge potential is clearly an over-estimate at the graphene edge and so the reduction

in barrier height will be less than usual for graphene.)

Electron emission at energies well above those provided by the Fermi distribution (more than

several kT above EF) can occur. The energy needed to produce this hot electron emission comes from the

external circuit, which causes field emission from an initial energy significantly below EF (injecting a hot

hole). When a free electron near EF falls into the empty state, it releases energy. Another free electron

(initially near EF) can absorb the energy directly. The blue and red arrows in Figure 2 illustrate the process.

The probability of such energy exchange is low, so the intensity of the hot electron emission is typically

much lower than the primary emission. However, scattering is weak in graphene, so once an electron

becomes excited (“hot”), it remains at high energy for a longer time than in ordinary materials and so is

more likely to be field-emitted. The presence of the hot electron emission tail (for example extending to

EF+1eV) is direct proof that emission occurred from initial states at least equally far below EF.

Commercial energy analyzers are available for measuring electron energies. However, using this

type of equipment to measure emission from integrated devices with lateral emission is new and novel (to

our knowledge), so we were not sure such measurements would be practical.

We analyzed the current-voltage (I-V) characteristics as a backup approach. We were able to

distinguish field emission current from other vacuum emission processes by noting the presence of a

threshold voltage for detection of emission current in a plot of the current vs. voltage. That is, a plot of the

field emission current vs. applied voltage should show zero current (or the noise current) from zero to some

threshold voltage. The minimum threshold voltage is the work function of the drain electrode ϕD. This

follows because the vacuum potential must fall below the initial energy of the electrons, and the vacuum

energy is ϕD above the drain voltage (as shown in Figure 2). Typically, the threshold voltage will be larger

than ϕD since field emission does not occur with significant probability unless the barrier potential is small

(blue area in figure 2), approximately 10 eV-nm or less. If the source electrode is very sharp, the electron

density (and adjacent electric fields) tend to concentrate near the sharp asperities; this effect is sometimes

called “geometrical field enhancement” and can cause field emission when the applied drain-source voltage

is lower than would be required if both electrodes were flat. Note that if the drain electrode is not flat, the

field near the source is lower than it would have been for a flat drain.

Literature reports of field emission (e.g. from micro-fabricated structures) commonly plot the I-V

measurements as ln(I/V2) vs. 1/V. The Fowler-Nordheim (FN) equation predicts that such a plot should

create a straight line. However, the derivation of the FN equation makes many simplifying assumptions

that do not apply to graphene, such that the quadratic (V2) pre-exponential term may be closer to linear or

constant. Since we do not know what the I-V curve should look like, we plot the data as ln(I) vs. 1/V. Such

plot should be straight at low current and voltage but might show curvature at higher voltages. The FN

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5

derivation starts with the Jefferies-Wentzel-Kramers-Brillouin (JWKB) approximation, which assumes the

tunneling problem is essentially a 1D travelling wave penetrating a barrier (the emitting surface is planar).

This assumption is never strictly true but provides nearly correct answers when the dimensions relevant to

tunneling are very small compared to the dimensions of the source electrode. In the case of field emission

from graphene, the opposite is true: the graphene thickness is very much less than the barrier thickness, so

there is no reason to assume the FN equation is correct. There result several physical issues: The field is

not constant within the barrier as assumed in FN. The image charge potential does not describe the interface

potential (because the surface is not flat). In addition, because graphene is not a metal (as assumed in FN),

the density of states at the graphene edge is not constant and may not be large relative to the electric field

charge. Some of the initial electrons may be standing waves rather than travelling waves.

The graphene density of states is a combination of edge states and sheet states (or possibly hybrid

states or edge-related defect states). The sheet states delocalize over many of the carbon π bonds that extend

above and below the sheet surface, their density changes linearly with energy above and below the Dirac

energy ED. At zero field and without doping, the Fermi energy is at ED, but it can move up or down to

accommodate charge such as caused by adsorbed atoms or electric field. At the graphene edge, the atomic

geometry forms a combination of “armchair” and “zig-zag” terminations. In theory, the “zig-zag”

termination creates an edge state near the Dirac energy at each pair of atoms, whereas the “armchair”

termination does not. Since the edges we create are not likely to have a preferred termination, the density

of edge states is approximately one for every two hexagonal unit cells (each about 0.2nm), or about

2.5x109/m. This density is a lower limit; a higher density of edge states can occur due to defects or if the

edge is not straight. The charge density associated with field emission is ~5-10x109/m, so it is possible that

most of the field emission current will come from either edge states or sheet states. That is, edge states

might accommodate all the charge associated with the electric field, or additional charge may accumulated

in sheet states. If charge accumulates in sheet states, the Fermi energy will rise above the Dirac energy.

(The accumulation energy EA = EF-ED is shown in Figure 2). If EA becomes significant, tunneling will

occur primarily from the sheet states near EF, since the tunneling probability at EF will be much larger than

at ED (the zig-zag edge state energy). On the other hand, the density of edge states might be significantly

higher if point defects such as adsorbed non-carbon atoms, carbon vacancies, or foreign atoms on carbon

sites exist near the edge. In that case, a large fraction of the total edge charge might reside in edge states.

Such states might come and go due to specific processing steps or post-processing conditions (including

field emission).

If the source electrode behaves like a metal, a numeric solution can provide the exact electric field

near the edge. Numeric solutions can also provide the interface potential (analogous to the image charge

potential), although the interface potential is much smaller for graphene than flat surfaces.

We also built three-terminal devices as means of showing that field emission occurred. The electric

field at the source electrode is a linear combination of the electric fields generated by the gate and drain, so

the emission current should be a function of both the gate and drain voltages. The gate and drain potentials

affect the fields inside the dielectric and across the dielectric surface in a very different way than they affect

the graphene edge, such that we can distinguish surface or bulk leakage from field emission. This is

especially true for surface currents; the gate electrodes on the dielectric surface block the path of any source-

drain surface current. If photoemission or thermal emission caused the source current, the field would have

a much smaller effect on emission current.

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6

Figure 2. Vacuum energy vs. distance from a graphene edge, where the electric field falls off within the tunneling distance.

The green shaded area represents electrons in sheet states; the red shaded area represents electrons in edge states. Accumulation

in the graphene conduction band can move the Fermi energy above the Dirac energy by an accumulation energy EA. The

electric field reduces the normal work function of the graphene edge EA. Emission from states below the Fermi energy creates

holes at that energy, electronic energy created when the holes are filled can be transferred to other electrons, which can be field

emitted relatively easily (causing hot electron emission).

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7

2.1 Device Geometry

Numerical analysis of a particular device geometry can help estimate the voltage range needed to

reduce the tunnel barrier (allowing emission). We performed numerical analysis of the graphene edge

devices using the commercial trajectory solver “Lorentz” purchased from Integrated Engineering Software.

This program offers the option of using the boundary element method to solve for potentials in space. This

method is more computationally efficient than the finite element method when the range of geometric

dimensions is large, as is typically the case in field emission devices. The large dimensional range

necessarily occurs because a field emitting edge must have a very small radius of curvature in order to

create a sufficiently high electric field, whereas the distance between electrodes needs to be much larger in

order to sustain the required voltages. For edge emission, the scale issue is particularly severe because

edges do not concentrate the field nearly as much as tips, requiring very sharp edges.

In Figure 3, drawing (a) shows potential contours over a geometry where two graphene edges are

separated by 500nm and 200V is applied to the drain and zero applied to the gate relative to the source; the

blue lines are calculated electron trajectories. The trajectories arch up over the drain electrode in this case

(VG=0). Figure 3(b) shows a set of calculated equipotential contours near the edge. The calculation assumes

an abrupt interface between a metal and vacuum and work function equal to 4.5eV. (In fact the potential

barrier is rounded near the interface, increasing the tunneling probability relative to the calculation. We

did not calculate the rounding.) We set the drain-source voltage as 200V in order to reduce the calculated

width of the potential barrier to about 1.5nm, a typical value where field emission occurs. A plot of the

(a)

(b) (c)

200

0

500 nm

0.0 0.5 1.0 1.50

1

2

3

4

5

graphene

U (

eV

)

x (nm)

3 V/nm

Figure 3. (a) A device geometry similar to one of the devices we fabricated, including a set of equipotential contour lines. (b) A

set of potential contours at 1V increments near the graphene edge. The contours are not equally spaced, and the distance between

contours increases with the angle with respect to horizontal. (c) A plot of the vacuum potential along a horizontal line at the emitter

edge (assuming an abrupt transition at the surface). The potential does not change linearly with distance.

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potentials within the tunnel barrier appear in (c), the straight line representing a constant field of 3V/nm

appears for comparison.

2.1.1 Target geometry

An example vacuum transistor design appears in Figure 4(a). This design uses vertically symmetric

gate and field plate electrodes to extract and focus the electron beam to form a roughly collimated sheet

beam that can move parallel to the substrate surface for tens of microns. The upper and lower parts of the

gate and field plate are at the same voltage; this assumes that in practice columns made from the same

conducting material would support the top portion and connect the two parts electrically. The field between

the gate and field plate creates a parallel beam when the field plate potential is near 0.2 VG; for example,

(b) shows a set of nearly parallel trajectories. In practice, the beam collimation will not be this perfect

because the initial energy of the field emitted electrons spans a finite range. The time it takes an electron

to move from the emission site to the lowest potential in the trajectory (near the center of the field plate)

determines the transit time, since electrons that move past that point will move on to the drain regardless of

the gate voltage. The transit time will be less than 1ps (allowing operation at 160GHz) if the distance

between the upper and lower halves of the gate and field plate is 1 micron, the field plate is 5 microns long,

and the drain potential is 20V. The focused beam is deflected upward after exiting the field plate by the

asymmetric field caused by extending the lower part of the field plate slightly past the upper part. The

deflection increases with drain voltage, such that the beam travels further to the right as the drain voltage

is increased. The beam can move many microns away without striking the substrate surface, such that the

drain can be far from the other electrodes. The remote drain placement allows high drain-source voltages

and dissipates waste heat far from the other electrodes. The field plate screens the source from the electric

field created by the drain. The horizontal dimension of the field plate would usually be 2-5x the distance

between the inside surfaces; shorter field plates length screens less effectively, but also reduces the transit

(a)

(b)

Figure 4. (a) Cross section view of a possible vacuum transistor design with excellent drain-source isolation, high power

handling, high maximum drain-source voltage, and low gate capacitance. The drain-source isolation results from the field

plate electrode, which screens the electric field created by the drain from the source. The field plate electrode focuses the

electron beam and allows the beam to transit many microns to the drain electrode. (b) An illustration of nearly parallel beam

calculated for an optimal case.

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9

distance (and transit time). The drain-source isolation provides transistor characteristics with excellent

current saturation (the current is nearly independent of drain voltage), or very high output resistance (RDS

in Figure 1(b)). The large value of RDS increases fmax.

As a starting point, we fabricated devices with two basic geometries as shown in Figure 5. The

first design (a) has symmetric source and drain electrodes fabricated from graphene. The second design (b)

has only one electrode made from graphene (asymmetric). The device designs are simple enough to allow

fabrication in the time available as well as provide results that prove field emission occurred and

demonstrate a minimal emission current density.

2.1.2 Symmetric design

The symmetric design uses the same layout as a transistor design developed at NRL in the past. It

also starts with a layer of graphene on a bare substrate, which is the usual approach in the fabrication of

solid-state devices. The design includes a gate electrode, such that the total field at the graphene edge is

the sum of the electric fields created by the gate and drain. The gate also bisects the dielectric surface

between source and drain. This helps us distinguish surface leakage current from field emission current.

For example, if we find that the source current increases when the gate voltage increases but the drain

voltage is constant, then leakage between gate and drain cannot explain the measured current.

The symmetric design is easy to build, but it is not a good design for device function. It is difficult

to create large gaps on the substrate surface between the source, gate, and drain, such that it is difficult to

put large voltages across the electrodes without causing surface currents. The power dissipated at the drain

is limited because the portion of the drain nearest the source is not in contact with the substrate (reducing

the thermal conductivity), whereas much of the electron beam power is likely to be dissipated in the same

region. As a result, the drain temperature is likely to increase significantly even at low beam current. In

addition, the electron beam can strike the undercut surface of the substrate below the drain. Note however

that it is possible to deflect the electron beam above and well past the drain edge by placing a low voltage

on the gate; for example the trajectories shown in Figure 5(c).

2.1.3 Asymmetric design

(c) (d)

Figure 5. General design of the two device types fabricated. (a) and (c) show the symmetric design; (b) and (d)

show the asymmetric design, (c) and (d) show calculated electron trajectories.

200

0

500 nm

Figure 1. A scale drawing of the asymmetric device showing the electron trajectories.

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The asymmetric design appears in Figure 5(b) and (d); a rendered image appears in Figure 6(a).

This design incorporates several features that allow higher emission current. The drain is in full contact

with the substrate, providing higher thermal transport into the substrate relative to the symmetric design. A

set of metal wires cantilevered over the undercut volume support the graphene. A fourth electrode located

downstream of the drain provides an additional method to alter the electron trajectories.

A major weakness of the asymmetric design is that applying positive gate-source voltage creates a

vertical field near the graphene edge, pulling both the graphene and the emitted electrons down toward the

electrodes and substrate. The ratio of the vertical height of the graphene relative to the lateral distance to

the other electrodes, as well as the ratio of the drain to gate voltage helps determine the electron trajectories

and how many electrons strike the gate vs. the drain.

3 EXPERIMENTS

3.1 Fabrication Process

We prepared several wafers using the symmetric design, including one using CVD graphene and one using

reduced graphene oxide.

3.1.1 Symmetric Design

3.1.1.1 CVD graphene

The fabrication process we used to prepare the first wafer started by growing a graphene film by

chemical vapor deposition (CVD) on copper foil and transferring the graphene to a silica substrate using

PMMA and wet transfer (growth and transfer courtesy of Jeremy Robinson, code 6870). We deposited

SiO2 on the graphene using electron beam deposition from a SiO2 source. The SiO2 coating protects the

graphene from photoresist used the following steps; photoresist is known to react with graphene such that

it is difficult to remove completely. (Unfortunately, we found the coated graphene surface was not smooth,

possibly due to poor adhesion and stress in the coating.) Next, we patterned metal source and drain contacts

over the graphene using contact lithography, leaving about 10 microns between the contacts. We used

electron beam evaporation to deposit the metal. We used 20nm of titanium as an adhesion layer followed

immediately by 60 nm of gold. We removed the resist using acetone and isopropanol as common in lift-

off lithography. Next, we applied PMMA resist and used electron-beam lithography to expose the resist in

a line about 500nm wide between the source and drain. The e-beam dose determined the exact width of the

line. After developing the resist, an oxygen plasma removed the graphene from the exposed area. Then

exposure to HF vapor for one hour removed the silica in the exposed area and undercut the remaining

graphene on both sides. With the resist still in place, we evaporated Ti/Au to create a gate electrode on the

substrate between the source and drain. Finally, an acetone soak followed by a supercritical rinse removed

the PMMA resist. We employed the supercritical rinse to prevent surface tension from drawing the

graphene to the substrate. After removing the resist, we discovered that the source and drain contacts (not

the gate) were partially delaminated. We surmised the delamination resulted from the HF vapor etch

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11

dissolving the Ti layer responsible for adhesion. Some of the devices remained useable. We were not able

to image the graphene using either optical microscopy or scanning electron microscopy.

3.1.1.2 Reduced graphene oxide

We modified the fabrication process to avoid the long HF vapor etch to fabricate a second wafer.

First, we coated a sapphire wafer with 400nm of Ge. Then Glenn Jernigan (code 6880) deposited a thin

Figure 6. (a) Rendered 3D image of the asymmetric device design. The graphene is supported from the side by metal

beams cantilevered over the edge of an undercut (sacrificial) layer (Ge). (b) A 3D optical image of a fabricated device,

reconstructed from many 2D images obtained at a set of image-objective distances (Keyence).

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layer of reduced graphene oxide (RGO) over the Ge. The RGO deposition process starts by spinning on a

slurry of graphene oxide in water and alcohol. The slurry dilution left about 2 monolayers, i.e. the number

of graphene layers typically varies from 1-3. High temperature annealing in UHV removed most of the

oxygen. We repeated the steps of the previous process on the RGO: coat the graphene with SiO2, pattern

Ti/Au contacts, create slots in resist using e-beam lithography, and remove the exposed RGO using oxygen

plasma. Then, we removed some of the Ge by exposing the wafer to XeF2 vapor (avoiding HF). As before,

a Ti/Au deposition created the gate, then an acetone soak and supercritical rinse removed the PMMA resist.

We found that the XeF2 left some Ge in random places as well as an invisible residue that increased surface

leakage currents.

3.1.2 Asymmetric Design

In order to minimize the fraction of the beam current that strikes the gate electrode, we tried to

reduce the gate length as much as possible. Ideally, we would have used electron-beam lithography;

however, at the relevant time it was too difficult to use the tool (NSI), so we elected to use non-contact

optical lithography. We used the GSA stepper in 6850, which has a rated resolution of 1 micron. The

transparent substrate caused some issues with the optical lithography because some of the light passes

through the resist and enters the substrate. When at first we used a substrate with both the top and bottom

sides polished, most of the light that entered the substrate also passed out through the bottom side, resulting

in long exposure times. We found that the wafers appear very similar when viewed from the top or bottom,

causing mistakes. For these reasons, we changed to wafers polished on only one side. For these wafers,

the light that enters the wafer is scattered from the rough bottom interface and causes additional resist

exposure in a poorly defined area. This issue was manageable by accurately calibrating the exposure time,

however variations in the grind and scattering at the back surface reduced device yield. In some cases we

applied an anti-reflection coating (ARC) to reduce exposure due to scattered light. We found that applying

the coating to both the bottom and top surfaces improved the lithography.

The resist is an important factor in optimizing the lithographic resolution. Specifically, we needed

to control the undercut such that the resist strips separating the gate from the source and drain do not wash

off during development. To improve our control of the developer, we changed to another two-layer resist

developed in two different chemicals. The bottom layer was 2 micron thick PMMA pre-exposed (no

pattern) with 365nm deep UV light. The top layer was positive resist (Shipley 1805). After exposing and

developing the top resist layer in standard sodium hydroxide developer, we developed the PMMA by

immersing in xylene. We were able to avoid excessive undercut by timing the Xylene development.

We first patterned Ti/Pd contacts on sapphire wafers. We used the Mantis e-beam deposition tool

(6850) for the metal deposition. We found that the metal adhesion was poor in some areas when we used

only the usual ex-situ oxygen plasma step to remove the resist residue left by the developer. To improve

adhesion, we also exposed the substrate to atomic oxygen using an atom source incorporated into the Mantis

chamber. The atom source (called MATS) is an inductively coupled plasma contained within a quartz

envelope having perforations at one end. A schematic diagram of the process appears in Figure 7. Ions

generally do not pass through the perforations since it becomes charged, but neutrals do pass through and

strike the substrate. We ran the plasma source at 400 watts and 0.5 standard cubic centimeters per minute

(SCCM). Mantis claims the gas flux leaving the source is about 50% atoms in this condition. Exposing

the substrate for 5 minutes helped promote adhesion; longer exposure times harden the resist unnecessarily

while shorter times are less effective.

We also used the MATS atom source to improve the dielectric coating. Operating the MATS

source at 400W RF power while admitting N2 at 0.5 (sccm) creates an atomic nitrogen flux of several

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monolayers per second at the wafer surface. We produce a coating by first establishing the flux of atomic

nitrogen, then opening a shutter to provide about 0.2 nm/s of SiO2 from the electron-beam-heated source.

The coating produced this way is smooth and adheres well, whereas SiO2 films deposited without the N

atom flux were rough. We presume the film is an oxy-nitride but we have not done any characterization.

We speculate that partial decomposition during e-beam evaporation may leave the pure SiO2 film oxygen

deficient resulting in internal stress. The devices we have tested to date have only the pure SiO2 films

rather than the oxy-nitride.

After patterning the metal contacts on the substrate surface, we coated the wafers with 500 nm of

Ge using e-beam deposition. We later discovered that the Ge and Pd react at the interface. In a later process

revision, we coated the Pd with 20 nm of oxy-nitride before depositing the Ge. We also coated the Ge with

silicon oxy-nitride to prevent Ge surface oxidation and interactions with the next layer. After coating with

Ge and oxy-nitride, we patterned a metal layer on top of the Ge. The pattern creates a set of narrow wires

(shaped like teeth or fingers) that end up supporting the graphene after it is undercut. We sent these wafers

to Graphenea (in Spain) for transfer of single layer graphene. Upon return, we coated the graphene layers

with more SiO2. We then patterned resist to protect the graphene where desired, and removed the graphene

and Ge.

We tested several ways of removing the Ge. Ge etches in wet hydrogen peroxide solution, but the

H2O2 tends to remove (de-adhere) the resist. We also tried etching the Ge in a nitric acid solution, but the

acid left a surface residue on the wafer causing device leakage. We used XeF2 gas, but the etching was not

uniform. In addition, the XeF2 can form fluorine-carbon bonds that reduce the electric conductivity of

graphene. We finally settled on using the fluorine plasma tool in 6850 (STS) with SF6 gas. The SF6 plasma

etches Ge very rapidly. The STS tool allows independent control of RF power applied to an inductively

coupled plasma (ICP) and a capacitance-coupled plasma (CCP). At low power, the ICP causes relatively

isotropic etching and the CCP causes mainly vertical etching. Using high CCP power can cause sputtering

in addition to chemical etching; for example, it will remove graphene and thin oxides. We applied power

to both the CCP and ICP to remove the Ge including the graphene and oxide layers, then exposed the wafer

for additional time using low power ICP to create the undercut.

Figure 7. Schematic diagram of the simultaneous flux of SiO2 from an electron beam evaporator and an atomic

nitrogen source.

SiO2

N2

N

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We used HF vapor to remove only the SiO2 or oxy-nitride layers without getting the wafer wet

(which can cause the graphene to adhere to the substrate). We purchased a tool (Idonus) that holds the

substrate at a slightly elevated temperature (we used 50oC) while it is exposed to a pool of 49% HF in water

at room temperature. It is necessary to heat the wafer in order to prevent the HF vapor from condensing on

the surface.

(a)

(b) (c)

Figure 8. (a) Rendered image of the vacuum chamber showing the microscope objective, wire probes, and energy analyzer.

(b) Photograph of the completed chamber. The large object in the upper left is the energy analyzer. The microscope

objective fits above a quartz window inside a custom re-entrant tube on a 4.5” CF positioned vertically above the center

of the spherical chamber. The microscope camera is near the top of the image above the center of the chamber. Four of

the probe manipulators are visible in (b). An additional low magnification camera with zoom lens provides a view of a

large part of the specimen and the probe wires. A monitor for display of the low magnification camera is on the left. A

vibration-isolated table supports the chamber. (c) An image of a device as captured by the microscope camera. The

resolution is 1-2 microns, enabling us to see (e.g.) changes in the metal wires supporting the graphene and changes in the

reflectivity of the sapphire surface.

Electronanalyzer

Five tri-axial high voltage probes on manipulators

Extra ports for x-ray source, H cracker, etc.

Heated stage on manipulator

Microscope

100 mm

emitter contact

gate contact

anode contact

repeller

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3.2 Emission measurements

3.2.1 Emission test equipment

3.2.1.1 Vacuum chamber

We were able to view the sample, position probe wires, and measure the emission current and

electron energy spectrum all at the same time in a UHV environment. Measurements of this nature are

unusual (not published by other aut) and no similar complete systems are available commercially. We

purchased a custom vacuum chamber and equipped it with a microscope and wire probes similar to a

standard probe station. A rendered image of the chamber cross-section and a photograph of the exterior are

in Figure 8 (a) and (b). An image of a single device while in the vacuum chamber as imaged by the chamber

microscope is in Figure 8 (c). The micromanipulators had roller bearings on all three motions and provided

some ability to tilt the feedthroughs off axis (McAllister Technical Services). The manipulators provided

smooth motion in all three directions. A custom re-entrant tube with an optical window sealed to the end

supports a microscope objective 30mm over the sample surface (MPF Products). Mounting the tube on a

single axis z-motion stage with 2” travel allows imaging at a variety of sample positions, and allows removal

of the re-entrant tube away from the sample. The microscope objective is “infinity corrected”, allowing

large distances between the objective and the focus lens. We placed a half-silvered mirror between the

objective lens and focus tube, and used the mirror to direct light onto the specimen. A monitor placed near

the chamber provided a video image of the specimen and probe wires. A commercial energy analyzer

(Scienta-Omicron) is mounted at 60o with respect to the vertical axis, the input lens of the analyzer is also

tapered at a 60o angle such that the analyzer and re-entrant tube housing the microscope do not interfere.

We designed and purchased custom tri-axial feedthroughs for the manipulators (MPF Products).

The design consists of a large diameter tube brazed to a flange via a large diameter ceramic insulator, with

a wire brazed to the inside end of the large diameter tube via a ceramic insulator. This design allows us to

hold the outer tube at the same voltage as the wire. A drawing appears in Fiugre 9.

We built a sample stage in-house with an internal heater and a water-cooled mount. The heater is

a tungsten filament. The samples rest on a sapphire wafer that sits on a narrow lip in the copper cylinder.

Mounting the sample stage on the 2.75” motion port of a manipulator having a 6” o.d. main flange

(McAllister Technical Services) allows sample motion of +/- 0.5” perpendicular to the z axis and 2” along

the z axis. The chamber is equipped with both an ion pump (400 l/s) and a turbo pump (300 l/s), each with

separate gate valves. The chamber reaches vacuum pressures near 10-8 torr without baking, typically within

Figure 9. Drawing of a custom tri-axial vacuum feedthrough used to suppress leakage currents.

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16

16 hours. Extra ports facing the sample position allow accessories including an electron gun and an x-ray

source.

We vented the chamber with nitrogen and placed the specimen wafer on the stage, then evacuated

the chamber, with the mechanical pump, turbo pump, and ion pump. We did not bake the chamber.

Typically, we found better results after allowing the chamber to pump overnight and reach pressures near

10-8 torr. The microchannel plate detector within the energy analyzer requires similar pressure during

operation. The microchannel plate is hygroscopic and can crack if exposed to moisture, so we keep the

chamber under vacuum at all times other than during sample introduction or chamber service.

3.2.1.2 Electronics

We used up to four Keithley 237 source-measure units to measure the current and source the voltage

at the source, gate, drain, and hovering probe. The 237 units come with an IEEE-488 digital interface. We

wrote a Python program to set the I-V sweep parameters, trigger each of the instruments simultaneously to

start each measurement event, and retrieve the data. The 237 units use tri-axial connectors and cables

intended to reduce currents associated with leakage across dielectric components. We measured the leakage

of the cables connected to the custom feedthroughs as less than 0.1pA at 1000V.

The energy analyzer came equipped with software and electronics. The computer interface was via

IEEE-488 bus. Unfortunately, the IEEE-488 software used by the analyzer computer did not allow us to

control both the analyzer and the Keithley SMUs with the same computer. This arrangement did not allow

us to synchronize the current measurements with the energy analysis. In some cases, the current fluctuation

was large enough that the lack of synchronous current measurement created significant uncertainty. The

analyzer is capable of measuring 128 energies simultaneously; when we used that mode, the current

fluctuations did not affect the energy measurement itself. All of the spectra measured within a few eV of

the source Fermi level used the simultaneous mode.

3.2.1.3 Emission measurement methods

We measured the emission current from individual devices by first contacting the device source,

drain, and (sometimes) gate pads with the wire probes. Sometimes the gates were either missing or shorted

to the drain. In many cases we positioned a probe hovering (not in contact) above and adjacent to the

device.

As preliminary or device screening step, we measured the source-drain current as well as the current

at a “hovering” electrode placed in close proximity above the graphene edge and held positive with respect

to the drain electrode. Detecting current at the hovering probe wire proves vacuum emission occurred (but

does not prove field emission vs. other forms of vacuum emission). If the current measured at the hovering

prove was a consistent fraction of the drain current, and if both currents showed a threshold voltage, we

found the measured current was due to field emission. The electrons striking the drain electrode create

secondary emission; the current detected at the hovering probe was a combination of secondary emission

from the drain and primary field emission. The secondary emission is proportional to the field emission

current and not generated by surface leakage.

In some cases we measured source-drain current caused by surface leakage only or in combination

with field emission. The leakage current often started only after applying high drain-source voltages.

Typically, the leakage current increased with the time the leakage occurred. After the leakage current

increased, the voltage needed to cause leakage decreased. Often the voltage threshold disappears such that

low or near zero drain-source voltage caused current, and the current increased smoothly with voltage.

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17

The hovering probe also served to direct the electron beam toward the energy analyzer. To facilitate

energy analysis, we placed the source electrode at negative bias voltage with respect to the chamber, and

placed the hovering probe above the device and to one side. After biasing the drain enough to cause some

emission and setting the energy analyzer to detect energies near the Fermi energy of the source, the analyzer

detector frequently showed a signal. Adjusting the voltage applied to the hovering probe and sometimes

the probe position helped optimize the signal. Adjusting the angle of the device relative to the analyzer

axis and adjusting the source voltage also helped optimize the signal.

Placing the source at large negative voltage allowed us to set the analyzer to use a large pass energy.

The large pass energy increases the signal intensity and so is useful when the signal is low. On the other

hand, the larger electron beam energy makes it more difficult to deflect the beam. Thus in some cases we

used small source voltages. Typically, we used negative source voltages between 50 and 200V. In some

cases, the current reaching the analyzer was so high the pulse counters overloaded. In such cases, we could

deflect the beam away from the analyzer to reduce the signal.

Figure 10. (a)Rendered image of the symmetric device using CVD graphene. (b)Rendered image of the symmetric device using

reduced graphene oxide (RGO). (c) Optical microscope image of a typical device. (d) Raman spectra of the device in the optical

image, measured before and after cutting the graphene. (e) Color map of the intensity of the Raman 2D line.

3.3 Raman measurement

Raman spectroscopy is a good measure of graphene quality. A harmonic peak called “2D” is

generated only where the graphene has long-range order. We measured the Raman spectra of the graphene

to verify that graphene was present. Graphene of good quality will typically have a large intensity ratio of

the 2D peak near 2700 cm-1 relative to the G peak near 1600 cm-1. Processing of any kind can degrade the

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graphene, so we expected that etching the graphene would reduce the 2D peak intensity. In fact, this was

the case. Figure 10(a) and (b) show renderings of the two symmetric devices, and (c) shows an optical

micrograph. Figure 10(d) shows Raman spectra measured before and after etching the graphene. The 2D

peak is still present after etching, but with much reduced intensity. At the same time, the G peak become

broader. The image in (e) is a color map of the intensity of the 2D/G ratio. The resolution of the map is

about 1 micron. The color map indicates graphene is present between the source and drain, and that it is

missing in a line through the center. A few local areas have relatively high intensity.

-3 -2 -1 0 1 2

10-1

100

101

102

103

125V

145V

135VInte

nsity (

cp

s)

E-EF (eV)

Figure 12. Energy distribution of the electron beam produced by the CVD graphene in the symmetric device geometry. The

numbers indicate the source-drain voltage applied during the energy measurement; the intensities (count rates) are not scaled

or offset.

(a) (b)

Figure 11. (a) Drain current vs drain-source voltage measured from a symmetric device made from CVD graphene. The gate

voltage was 0,-60, -80, and -100V during the four sets of measurements. (b) The same currents plotted as ln(I) vs 1/V.

Page 26: Field Emission from Integrated Planar Graphene Edges

19

3.4 Emission measurements

3.4.1 Symmetric devices

3.4.1.1 CVD graphene

Some of the symmetric devices retained all three functioning electrodes and produced measureable

current. A set of field emission current vs. voltage curves measured at various negative gate voltages appear

in Figure 11(a). We applied negative voltages to the gate to help direct the electron beam away from the

suspended graphene edge on the drain side, and to reduce the gate current (the gate current as zero). The

current increased exponentially with drain-source voltage above a threshold voltage where the emission

current exceeded the leakage current. The leakage current was roughly 10pA below the threshold voltage.

The threshold voltages increased for more negative gate voltages. The field that appears at the graphene

edge source is a linear combination of the fields created by the gate and drain. In contrast, only one voltage

(between two electrodes surrounding the leaking surface) control the surface leakage current. This behavior

means that surface leakage currents cannot be the main cause of the measured current.

Plots of the emission current vs. 1/V appear in Figure 11(b). These curves are straight lines. The

lines shift when different gate voltages are applied. The curves should all fall on the same straight line if

both the gate and drain voltage are accounted for. However, instead of a single line, we observe two straight

lines; one line for the 0 and -100V curves and a second line for the -60 and -80V curves. Other curves also

fell on one of these lines. Something caused a fluctuation between the two curves. We cannot be sure of

the cause, but it appears that emission from a portion of the graphene edge fluctuated between two

conditions. The same fluctuation may well be responsible for observed fluctuations in the energy

distributions.

Energy distributions of the electrons emitted by the CVD graphene edge in the symmetric device

appear in Figure 12. The total emission current increased exponentially with the voltage applied between

the source and drain electrodes; the gate electrode was not connected in this device. The integrated count

rates scale with total current. In the two lower intensity spectra, the spectra seemed to consist of two peaks

near zero and -0.3 eV, the ratio of the peak intensities changed frequently during data acquisition. In the

highest intensity spectrum, a third peak appears near -1eV. This behavior suggests that π-bond initial states

produced the two peaks near EF whereas edge states produced the lower energy peak.

Field emission theory describes the energy distribution as the product of the tunneling probability

and the density of initial states. For a metal emitter, the density of initial states in simply the Fermi function,

so the energy distribution is:

Plotting this function next to the data in Figure 12 shows a poor agreement. The disparity can be

due to the different density of states in our etched graphene relative to a clean metal. The density of states

in graphene can be considered as two components; one component is due to the delocalized electrons in π-

type carbon bonds above and below the graphene surface. The density of states in π bonds is proportional

to the absolute value of the energy above or below the Dirac point. Since the states are delocalized, Fermi-

Dirac statistics determine the electron density in energy. Then the energy distribution would look like:

𝐼(𝐸) = 𝐴𝑒−𝐸/𝑑 (1

1+𝑒−𝐸/𝑘𝑇).

Page 27: Field Emission from Integrated Planar Graphene Edges

20

where the Fermi level is at energy Ea with respect to the Dirac energy.

If the Fermi level were located at a set of different energies at different positions along the edge, the energy

distribution would be a sum (integral) of the energy distributions at each local accumulation energy.

Additional electrons reside in local bonds at the graphene edge, or perhaps carbon bonds

reacted to other atoms or molecules such as H or OH. The total charge density and the fraction of that

charge in edge states determines the Fermi energy, or the accumulation energy relative to the Dirac point.

If no edge states exist, all the charge would have to be in π states and the accumulation energy would be

large, approximately 0.5eV. The field emission process can generate both heat and electronic energy, which

might disrupt the edge bonds. A change in the edge bonds might cause a change in the local Fermi energy.

This or a similar process could cause the observed fluctuations.

We fitted the energy distribution curves shown in Figure 12 using a combination of π and bonds.

At the two lower source-drain voltages (120 and 130V), we were able to use only π bonds with two

accumulation energies, i.e. the measured distributions fit the function

At the highest drain-source voltage, an additional term representing bonds was required:

where G(E) is a Gauss function and BDB is the density of edge charge (in dangling bonds). We do not apply

the Fermi function to the Gauss distribution since the edge bonds are not delocalized. This equation

generated the solid lines shown in Figure 12.

The measured energy distributions shown in Figure 12 contain counts both above and below the

fitted regions. The high energy or hot electron emission (above EF) increases dramatically in the emission

spectrum measured at highest current (black curve). Emission occurs up to 1.5eV above EF. The same

curve also shows a dramatic increase at energies 1-2eV below EF. It appears that the energy released by

the low energy emission causes the hot electron emission. This shows that the low energy emission does

𝐼(𝐸) = 𝑒−𝐸/𝑑 (1

1 + 𝑒−𝐸/𝑘𝑇{𝐴1|𝐸− 𝐸𝑎|})

𝐼(𝐸) = 𝑒−𝐸/𝑑 (1

1 + 𝑒−𝐸/𝑘𝑇{𝐴1|𝐸|+ 𝐴2|𝐸− 0.1|}).

𝐼(𝐸) = 𝑒−𝐸/𝑑 (1

1 + 𝑒−𝐸/𝑘𝑇{𝐴1|𝐸|+𝐴2|𝐸− 0.1|}+𝐵𝐷𝐵𝐺(𝐸− 1.1))

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21

not reflect a change in the local EF due to limited transport. The counts at low energies (below -2.5 eV) in

Figure 12 are probably electrons reflected from the drain or other surfaces after experiencing an energy

loss.

3.4.1.2 Reduced graphene oxide

We measured both I-V and energy distributions from the reduced graphene oxide edges. None of

the RGO devices had working gate electrodes. A set of energy distribution curves (EDCs) appears in Figure

13. All of the EDCs are nearly symmetric. Following the logic presented in the previous section, the

symmetry indicates the emission comes from edge states. There are two peaks with symmetric shape, a

main peak at the Fermi energy, and a second peak about 2eV below the main peak. Emission from an edge

state about 2eV below EF could be responsible for the low energy peak. The main peak appears near EF in

the first six EDCs shown (using VDS = 62, 64, 66, 68, 70, and 72 V). The EDCs measured at higher voltage

and current shift smoothly to lower energies. The shift is roughly proportional to log(I), indicating a circuit

element similar to a forward biased diode exists between the source contact and the emission site(s). The

metal-graphene interface often creates diode effects of this nature. The EDCs show substantial hot electron

emission extending to nearly 4eV. The hot electron tails also move to the left, confirming that the local EF

shifts at higher current.

3.4.2 Asymmetric devices

-7 -6 -5 -4 -3 -2 -1 0 1 2 3 4 5

100

101

102

103

104

105

Inte

nsi

ty (

cps)

E-EF (eV)

VDS=88-62V

Figure 13. Energy distribution of the electron beam produced by reduced graphene oxide in the symmetric device geometry.

The numbers indicate the source-drain voltage applied during the energy measurement. The lowest drain-source voltage was

62V; the bottom black curve resulted. Each curve resulted after increasing the voltage by 2V up to a maximum 88V (curves

are colored black, red, green, blue, black, red, etc. with each higher drain-source voltage). The intensities (count rates) appear

as recorded (not scaled or offset).

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We used CVD graphene provided by Graphenea to fabricate all of the asymmetric devices. We

found that the last few processing steps were very important and made big changes in the emission current

and energy distributions. Specifically, we needed to remove the germanium from the area between

electrodes and from underneath the graphene edges without etching the graphene or causing it to adhere to

the substrate. A common way to etch Ge selectively is XeF2 gas. However, exposing the graphene devices

to XeF2 gas resulted in multiple issues. When we removed the germanium with SF6 plasma the results were

much improved.

3.4.2.1 Wafers processed with XeF2

We processed the first set of devices by exposing them to XeF2 gas in hopes of removing the

exposed Ge and undercutting the Ge from beneath the graphene. Although the XeF2 did remove most of

the Ge, we found the etching rate was not uniform. Optical microscopy revealed that Ge remained in many

places near the graphene edge, even after repeating the XeF2 exposure step several times. During testing,

we found that the resulting devices were leaky; we suspect the incomplete Ge etching and surface residue

lead to the leakage.

After loading the devices into the vacuum chamber, we heated the wafer to 400oC in an attempt to

remove any adsorbed water or fluorine. We measured the graphene resistivity before and after heating

using the transmission line method. This method separates the sheet resistance from the contact resistance.

The sheet resistance was already below 3kΩ before heating, too low to affect the emission results at currents

below about 1mA. The resistance did become somewhat lower after heating.

Most of the devices were leaky in their initial condition. We returned the wafer to the XeF2

chamber, but with limited success. To remove the leakage path, we exposed the devices to the SF6 ICP.

After this treatment, some devices did emit significant currents. For example, one of the devices produced

over 1 microampere of drain current at VDS=120V, the I-V data are plotted in Figure 14. The current

collected at the hovering probe was about 10-20% of the drain current throughout the I-V curve, indicating

field emission.

We also measured the energy distribution of the vacuum electrons; these spectra showed that the

emission site was in poor contact with the source electrode. For example, in Figure 14b the field emission

peak occurs at 150eV but the source electrode was held at -190V, so a potential drop near 40V occurred

somewhere between the graphene edge and the source electrode. The most logical cause of this potential

is the interface between graphene and metal. It appears that the XeF2 diffused into the interface and caused

the large potential difference.

In some cases the currents measured between both the gate and source, drain-gate, and drain-

repeller were due to both field emission and leakage. We showed that some of the current was field

emission by measuring the change in drain current with gate voltage, as in Figure 16. The drain leakage

decreases with higher gate voltage because the drain-gate voltage is decreasing. However, the drain current

turns up again near 85V as the field emission component increases.

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Figure 15. Energy distribution of the vacuum electrons. The source electrode potential was -190V with respect to

ground during the measurement; the Fermi energy of the field emission source is marked. Most of the emission

occurred near 150eV, showing that the Fermi energy at the emission site was shifted by 40V. Electrons in-elastically

scattered from the drain or other electrodes produce the low energy tail extending to 90eV.

60 80 100 120 140 160 180 2000

1

2

3

Co

un

t ra

te (

MH

z)

Kinetic Energy (eV)

EF

Figure 14. Field emission current vs voltage applied to the drain with respect to the source. The blue curve is drain

current, red curve is current measured at the hovering probe.

0 10 20 30 40 50 60 70 80 90 100 110 120 130 140

1E-10

1E-9

1E-8

1E-7

1E-6

Cu

rre

nt

(A)

VDS

Page 31: Field Emission from Integrated Planar Graphene Edges

24

In general, the emission current is relatively stable in time at lower current levels but becomes noisy

at higher currents. The unstable current is typically associated with emission from initial states about 1eV

blow EF. Plots of the I-V curve of an example device appear in Figure 17(a). Plots of log(I/VDS2) vs. 1/VDS

and of log(I) vs. 1/VDS appear in (b) and (c). These plots should produce nearly straight lines, according to

field emission theory. However, both plots are non-linear; the slope of the log plots increases at higher

currents. This suggests that field emission is occurring via at least two different mechanisms. Sequential

measurements of the energy distributions measured at VDS=110V and VDS=120V appear in (d) and (e). At

lower current, the spectra are relatively stable, but show two distinct shapes that vary in time. With

VDS=120V (higher current), the spectra changed more dramatically in time. The spectra are generally

composed of two main peaks; one centered near 0eV and one near -1eV. The number labels shown in (e)

represent the chronological order of the measurements; the intensity of the two sub-peaks changed

randomly with time. The intensities of the lower energy peak is much higher than in the spectra measured

at lower voltage (lower current). It appears that the emission started from at least two initial state energies,

and that the current from the states at lower energy increases more quickly with voltage. This might account

for the higher slope portion of the curves in (b) and (c). Since the resistivity of the graphene sheet is too

low to affect emission, and because the results were not consistent, the presence of germanium and/or

germanium residue may be the cause of the spotty emission results.

Figure 16. In this case we measured the “drain” current at the repeller electrode and applied the gate voltage at the drain

electrode. The “drain” voltage remained at 150V during the measurement. At low gate voltage the drain-gate current was

high. As the gate-source voltage increased the drain-gate voltage was reduced and so the leakage current was also reduced.

However, the field emission current increased with the gate voltage, so the field emission part of the drain current began to

dominate at gate-source voltages over 90V.

40 60 80 100 120

0.2

0.4

0.6

0.8

1.0

Dra

in C

urr

en

t (n

A)

GateV

Page 32: Field Emission from Integrated Planar Graphene Edges

25

A

B C

D E

Figure 17. (a) Drain-source current vs drain-source voltage. (b) data from a plotted as log( I/V2) vs 1/V. (c) data from a plotted

as log(I) vs 1/VDS; (d) set of energy distributions when VDS=110V (e) set of energy distribution when VDS=120V.

0 50 100 1501E-11

1E-10

1E-9

1E-8

1E-7

1E-6

I DS

VDS

0 5 10 15 20 25

1E-8

1E-7

1E-6

1E-5

1E-4

0.001

0.01

0.1

I DS/V

DS

2

1000/VDS

0 5 10 15 20 25

1E-11

1E-10

1E-9

1E-8

1E-7

1E-6

I DS

1000/VDS

-5 -4 -3 -2 -1 0 1 2 3

1

10

100

1000

co

un

t ra

te (

Hz)

E-EF (eV)

VDS=110V

~220 nA

-5 -4 -3 -2 -1 0 1 2 3

100

101

102

103

104

1

2

3

4

5

6

7

8

9

10

Count ra

te (

Hz)

E-EF

Page 33: Field Emission from Integrated Planar Graphene Edges

26

An image of a device recorded after emission testing using the chamber microscope with the device

still in vacuum appears in Figure 18(a). The spotty white material at the graphene edge adjacent to the gate

electrode is germanium, a portion of the original germanium not removed by etching. There is a translucent

white fan-shaped area on the lower right side of the source. The white area appeared after emission testing

and disappeared after exposing the wafer to air. We suspect this area became partially reflective due to

electron-beam decomposition when the emitted electrons struck the substrate. Similar effects may be the

cause of the leakage current produced by operating the devices.

a b

c

Figure 18. (a) Image of a device recorded using the chamber microscope with the device still in the vacuum chamber after emission

testing. There is a white fan-shaped area on the lower right side of the source contact. The white area appeared after emission

testing. We suspect it is substrate material that became partially reflecting due to electron-beam decomposition (b) plot of the

current detected at the drain as the voltage applied to the hovering probe switched between -100V and +100V. We obtained this

result by placing the hovering probe over the same area where the translucent fan appeared (for a different device). (c) drawing of

the setup used to measure the current emitted from a local section of the graphene edge.

100 mm

emitter contact

gate contact

anode contact

repeller

0 50 100

-100

-50

0

50

100

gate

V

time (a.u.)

0.0

0.5

1.0

1.5

2.0

curr

ent (n

A)

6µm

substrateCenter trace collects current from local area

only

Page 34: Field Emission from Integrated Planar Graphene Edges

27

We tried to verify that the emission came from the edge near the white area. To do so, we placed

the hovering electrode near this area and measured the change in drain current as we changed the voltage

applied to the hovering probe. We were able to measure changes in the emission current this way, as plotted

in Figure 20(b). The change occurred only when the probe was near the side of the device, showing that

indeed emission occurred from the side. Emission from the side is possible because the lithographic mask

did not remove the graphene from the edges, such that exposed graphene appears at the sides. There is no

gate or drain at the side, but the sapphire surface could become positively charged, so help induce emission.

In a later mask design we removed the graphene from the sides, however we have not finished processing

any devices using this mask to date.

We were interested in knowing whether the devices emitted current evenly over their entire edge

length, or whether most of the emission came from only a small section. To try to find out, we built a new

hovering probe where we replaced the round probe wire with a section of flat quartz having a metal pattern

as shown in Figure 20(c). We held the outside edges of the electrode at the same voltage as the inside

electrode, and measured the current at the inside electrode only. When this patterned electrode is close to

(within a few microns of) the device top surface, the current measured should come from a small part of

the device edge, perhaps 5-10 microns. We suspended this electrode over several devices but we were

unable to detect any emission current. To improve the method, we redesigned the lithographic mask to

include isolated pads on either end of the drain electrode. If we fabricate the pads with thicker material

than drain, then place the patterned probe in contact with both pads, the gate-probe gap will be determined

by the relative pad thickness (eg 0.5µm). This close placement should allow local emission current

measurements.

3.4.2.2 Wafers processed with SF6 ICP

We removed the Ge from a second set of devices using the ICP etch tool and SF6 gas, completely

avoiding XeF2. Coating the graphene with oxide facilitated the selective Ge etch. Setting the CCP power

as low as possible (5W) and using 50W ICP power was effective in removing Ge without etching the silicon

oxy-nitride covering the graphene. An HF vapor etch removed the oxy-nitride following the ICP step. The

devices were much less leaky and a much larger fraction of the devices produced field emission current.

Several devices produced maximum currents in excess of 10 microamps, or about 1 mA/mm.

A plot of log(I) vs. 1/VDS measured from one of the devices appears in Figure 19. The plot is linear

from 10pA to 10µA. The transconductance reaches 23 µS/mm. A set of 20 energy distributions curves

(EDCs) measured consecutively over approximately 5 minutes appear in Figure 20(a). Relative to previous

devices, the EDCs are steady and consistent, and the intensity decreased exponentially both above and

below EF as predicted by field emission theory for metals. The same data sets, summed and plotted with

respect to EF, appear in Figure 20(b) as black dots. The red and blue curves are calculated using metal field

emission theory, where the field emission constant d=0.175 (blue) and 0.22 (red); and the temperature

T=300K (blue) and 650K (red). The parameters in the red curve match the slopes on the low and high sides

of EF respectively. Clearly, the experimental curve is broader than expected for a metal at room

temperature. Multiplying by the density of states function helps match the data on the low energy side but

not on the high-energy side. Emission from edge states and/or a variation of the Fermi energy along the

emitting edge could cause the broadening. We were not able to determine a best fit uniquely by adding a

contribution from edge states.

Page 35: Field Emission from Integrated Planar Graphene Edges

28

5 6 7 8 9 10 11 12

10p

100p

1n

10n

100n

10µ

Em

issio

n C

urr

en

t (A

)

1000/V

Figure 19. The field emission current measured from one of the devices processed using SF6 plasma, plotted as log(I) vs. 1/VDS.

a b

Figure 20. (a) Energy distributions plotted against electron kinetic energy measured with the source held at -100V. The plot shows 20

raw datasets measured sequentially over 5 minutes. (b) The same energy distribution data shown in Figure 19b, summed over all data

sets and referenced to the Fermi energy. The blue and red curves are calculated using standard 1D field emission theory for metals

assuming d=0.175 (blue) and 0.22 (red) and the temperature T=300K (blue) and 650K (red).

96 98 100 102 104

1

10

100

1000

10000

Inte

nsity (

cps)

Energy (eV)

-2 -1 0 1 2

0.001

0.01

0.1

1

Inte

nsity

E-EF (eV)

Page 36: Field Emission from Integrated Planar Graphene Edges

29

The relatively clean and stable emission current and energy spectra we measure after avoiding XeF2

gas and instead exposing the graphene to SF6 plasma suggests that the sulfur played a role, perhaps by

preventing fluorine from bonding to the graphene. This idea is supported by a recent publication that

showed that immersing fluorinated graphite in liquid organic solvents containing sulfur-bearing molecules

such as ethanedithiol removes fluorine from fluorinated graphite surfaces, restoring electric conductivity

[K. E. Whitener et.al.,“Graphene as Electrophile: Reactions of Graphene Fluoride” J. Phys. Chem. C 2015,

119, 10507−10512]. Replacing the SF6 with another gas such as C2F4 might show whether this idea is

correct.

The excellent emission results indicate that we have found a process that produces clean graphene

edges without significant post-processing such as heating in vacuum. Measurements of the emission

produced following other processing methods can confirm this is an optimal process.

4. Summary and Conclusions

We confirmed that field emission occurs from planar horizontal graphene edges integrated with

counter electrodes upon application of voltage to the electrodes. We developed a process to fabricate the

structures and methods to measure the emission current and energy distribution of the emitted electrons.

We showed that the field emission can occur from both local states at the graphene edge, and delocalized

bands created by the graphene long range order (sheet states). Emission from RGO is dominated by the

edge states, whereas the sheet states contribute more heavily to the emission from CVD graphene. The

processing methods impact both the I-V curve shape and the emission energy distribution. In a best case,

using graphene grown by CVD and processed using SF6 plasma, we found that the emission current scales

exponentially with the electric field at the graphene edge. The maximum total current we recorded was

over 10µA, extracted from a graphene edge estimated to be about 10µm long. This sets a lower limit on

the field emission current density near 1mA/mm. Electron-beam decomposition of the dielectric substrate

surface appears to have limited the maximum emission currents, not heating or decomposition of the

graphene. We observed no issues that fundamentally limit the emission current density.

Evaluation of the ultimate performance limits of graphene requires building a test device that

reduces the electron beam current incident directly on the substrate surface. For example, a device design

having vertically symmetric gate and field plate electrodes such as shown in Figure 4. This design also

focuses the beam and isolates the source from the drain.

Page 37: Field Emission from Integrated Planar Graphene Edges

30

Publications

Patent

U.S. patent 10,192,979, “Vacuum transistor structure using graphene edge field emitter and screen

electrode” Jan 2019; Shaw; Jonathan L., Boos; John Bradley, Jensen; Kevin, Champlain; James G., Pate;

Bradford B., Kong; Byoung Don, Park; Doewon, Yater; Joan E.

Refereed Journal Article

Jonathan L. Shaw, John B. Boos, Byoung Don Kong, Jeremy T. Robinson, and Glenn Jernigan, “Field

emission energy distribution and three-terminal current-voltage characteristics from planar graphene

edges” Journal of Applied Physics 125, 054502 (2019)

Conference Proceedings

“Planar Graphene Vacuum Transistor Performance Potential,” Jonathan L. Shaw; James G.

Champlain;Byoung-Don Kong; Kevin L. Jensen; J. Brad Boos; 2016 International Vacuum

Nanoelectronics Conference (IVNC)

“Field Emission from Planar Graphene Edges” Jonathan L. Shaw, J. Brad Boos, Byoung-Don Kong,

Jeremy T. Robinson; 2017 International Vacuum Nanoelectronics Conference (IVNC).

"Planar Graphene Edge Vacuum Field Emission Transistor, Jonathan L. Shaw, J. Brad Boos, Byoung-

Don Kong; 2018 International Vacuum Electronics Conference (IVEC).

“Field Emission Energy Distribution from Planar Integrated Graphene,” Jonathan L. Shaw; Jeremy T.

Robinson; Glenn G. Jernigan, J. Brad Boos; Byoung-Don Kong; 2018 International Vacuum

Nanoelectronics Conference (IVNC).

“Planar Graphene Edge Field Emitter Design with Improved Emission Current” Jonathan L. Shaw, J.

Brad Boos, and B.D. Kong; 2019 International Vacuum Electronics Conference (IVEC).

“Improved Field Emission Current from Planar Graphene Edges” Jonathan L. Shaw, J. Brad Boos, and

B.D. Kong; 2019 International Vacuum Nanoelectronics Conference (IVNC).