fault collapsing via functional dominance
DESCRIPTION
Fault Collapsing via Functional Dominance. Vishwani D. Agrawal Rutgers University, Dept. of ECE, Piscataway, New Jersey, USA [email protected] http://cm.bell-labs.com/cm/cs/who/va A. V. S. S. Prasad and M. V. Atre Agere Systems, Bangalore, India. Test Vector Generation Flow. DUT - PowerPoint PPT PresentationTRANSCRIPT
May 15, 2003 Agrawal et al.: Fault Collapsing 1
Fault Collapsing via Functional Dominance
Vishwani D. AgrawalRutgers University, Dept. of ECE, Piscataway,
New Jersey, USA
http://cm.bell-labs.com/cm/cs/who/va
A. V. S. S. Prasad and M. V. AtreAgere Systems, Bangalore, India
May 15, 2003 Agrawal et al.: Fault Collapsing 2
Test Vector Generation Flow
DUT
Generate fault list
Collapse fault list
Generate test vectors
Fault Model
Required fault coverage
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Background• Single stuck-at fault model is the most
popularly used model.• Two faults f1 and f2 are equivalent if the
same tests detect f1 and f2 (f1=f2)• If all tests of fault f2 also detect fault f1,
then f1 is said to dominate f2 (f2f1).
a0 a1
b0 b1
c0 c1
a1 c1: Dominanceb1 c1: Dominance
a0 = b0 = c0 : Equivalence
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Background• Both equivalence and dominance relations are
transitive in nature.[ (f1 f2) and (f2 f3) => (f1 f3) ]
• If f1 dominates f2 and f2 dominates f1 then f1 and f2 are equivalent.[ (f1 f2) and (f2 f1) => (f1 = f2) ]
• Number of faults in a 2-input AND gate reduces from 6 to 4 (by equivalence) and to 3 (by dominance) collapsing.Example: c6288, #faults =12576
#equ. = 7744 (0.62), #dom. = 5824 (0.46)
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Problem Statement• To devise a new method for fault collapsing
with following attributes:– A single procedure for equivalence and
dominance– Global analysis (independence from
direction, and other choices, in collapsing)– Use functional equivalences and
dominances– Hierarchical fault collapsing (collapsing in
large circuits using pre-collapsed sub networks)
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• A fault in the circuit is represented by a node in the graph.
• A directed edge from f2 to f1 indicates that f1 dominates f2 (f2 f1).
• Edges can represent either structural or functional relations.
Dominance Graph
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Dominance Matrix• Graph is represented as a connectivity matrix• Each fault is assumed to be equivalent to itself• Treats functional and structural relations
identically• (f1 f2) and (f2 f1) =>
f2 = f1. Appear as symmetrical components in the matrix (e.g., a0,b0,c0)
• #faults = 6 (dimension of dominance matrix) 2-input AND gate
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Transitive Closure
• Transitive closure (TC) of the dominance matrix gives all dominance relations between faults.
• TC is computed by the O(n3) Floyd-Warshall algorithm, where n is the dimension of the dominance matrix.
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Transitive Closure• (F1 F2) and (F2 F3) => (F1 F3)
F1 F2 F3
F1 F2 F3
F1 1 1
F2 1 1
F3 1
Graph
F1 F2 F3
F1 F2 F3
F1 1 1 1
F2 1 1
F3 1
Transitive Closure
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ExampleA
B
C
D
E
A0 B0
D0
E0
C0
A1 B1
D1
E1
C1
Dominance Graph
Transitiveclosureedges
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Functional Dominance
f1
f0
f2
Always 0
f1 dominates f2
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Functional Equivalence
f1
f0
f2
Always 0
f1 dominates f2 and f2 dominates f1
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Functional Equivalence
f0
f2
Always 0
Always 0f1
f2
f1
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XOR Circuit
Functional Equivalences : (c1,f1), (g1,h1,i1), (g0,m0),
c1
f1
g1
h1
i1
g0m0
(d1,f0) and (e1,c0); additional dominances not shown
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XOR Circuit
Structural equivalence collapsing16 faults
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XOR Circuit
Functional equivalence collapsing10 faults
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XOR Circuit
Functional dominance collapsing4 faults
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Design Hierarchy• Large designs are modular and hierarchical.
• Advantageous to store the fault information of repeated blocks in a library.
• When configured as a library cell the fault list includes cell PI & PO faults for transitivity.
Top module
B1 B1B0C0 C0
C1
C0 C0
C1
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8-bit Ripple Carry Adder
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Fault Collapsing Using Functional Dominances of xor
Number of collapsed faults
Flat
structural only
Hierarchical
with functional
Equ. Dom. Equ. Dom.
xor cell 24 16(0.63) 13(0.54) 10(0.41) 4(0.17)
Full-adder 60 38(0.63) 30(0.50) 26(0.43) 14(0.23)
8-bit adder 466 290(0.62) 226(0.49) 194(0.42) 112(0.24)
c499exp 2710 1574(0.58) 1210(0.45) 950(0.35) 586(0.22)
Circuit name
All faults
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References• A. Lioy, “Looking for Functional Equivalence,” Proc.
ITC, 1991, pp. 858-863.• A. V. S. S. Prasad, V. D. Agrawal and M. V. Atre, “A
New Algorithm for Global Fault Collapsing into Equivalence and Dominance Sets,” Proc. ITC, 2002, pp. 391-397.
• H. Al-Asaad and R. Lee, “Simulation-Based Approximate Global Fault Collapsing,” Proc. Int. Conf. VLSI, 2002, pp. 72-77.
• V. D. Agrawal, A. V. S. S. Prasad and M. V. Atre, “Fault Collapsing via Functional Dominance,” Proc. ITC, 2003 (accepted).
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Conclusion• A new algorithm for global fault collapsing• With functional equivalence number of faults
for ATPG reduces• Fault set reduced below 25% with functional
dominances (Caution: fault coverage not correct when redundant faults are present)
• Library based hierarchical fault collapsing is a useful concept
• Further studies are being carried out on independent fault sets